This chapter summarizes the major contributions in this thesis as well as the conclusions drawn from the work undertaken in this thesis. An overview of the future work to be embarked on is also included in this chapter.
7.1 Conclusion
The Grain Flipping Probability (GPF) channel model was proposed in Chapter 3 as an alternative to the highly accurate but time consuming micromagnetic channel model commonly used by magnetic researchers. The GFP model which consists of a multi-dimensional look-up table (LUT) populated from the micromagnetic model showed its ability to reproduce grain magnetizations about 100 times faster than the micromagnetic model on average. While the conventional micromagnetic model is useful in accurately studying the magnetic phenomenon associated with the read and write process of an isolated magnetic recording channel, the proposed GFP model is useful for studying a channel integrated with signal processing components from a system’s perspective. The development of this model also serves as a pre-requisite for developing new signal processing techniques in other parts of the thesis. In Chapter 4, the GFP model is used in two novel system level studies for the emerging Shingled Magnetic Recording (SMR) and Heat Assisted Magnetic Recording (HAMR) channel.
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The performance of the SMR channel integrated with the state-of-the-art iterative detector-decoder and Generalized Partial Response (GPR) equalizer showed a high sensitivity to variations in the track pitch, TP, and bit length, BL, of the channel. This was attributed to the inter track interference (ITI) and inter symbol interference (ISI). A large TP and BL was shown to give a good channel Signal-to-Noise Ratio (SNR) but low media density. On the contrary a small TP and BL give a poorer SNR but higher media density. As the operating code rate, Rop, in the high SNR region is higher than that in the low SNR region, the storage density at large TP and BL tends to be higher than that at small TP and BL. From the analysis of the storage densities across a range of TP and BL values, an operating region where TP = 28 - 30 nm and BL = 12 - 13 nm is proposed in this thesis for the SMR channel under the simulated conditions.
The HAMR channel showed sensitivity in performance to three key parameters of its thermal hot-spot. Firstly, the peak temperature of the hot-spot, Tpeak, determines the ease of grains flipping and the ideal operating Tpeak value was found to be close to the Curie temperature of the media. Secondly, the width of the thermal hot-spot, Tsig, was shown to affect the number of grains that are magnetized within the vicinity of the applied thermal field and concurrently affects the bit-aspect-ration (BAR) of the bits written. The interaction between the effects of varying Tsig, is fairly complex but in general, a large Tsig results in better channel performance.
Lastly, the horizontal offset distance between the write field and thermal field, disx, affects the alignment of the gradients of both fields. An optimal disx was identified for a HAMR channel under the simulated conditions and was found to correspond to the down-track location where the gradient of both the thermal and magnetic field align maximally.
The Joint Viterbi Detector Decoder (JVDD) was proposed in Chapter 4 as an alternative to the sub-optimal state-of-the art iterative detector-decoder. The JVDD initially showed a high computational complexity that would not be feasible in a practical system. A class of JVDD codes was thus proposed specifically for the JVDD. They consists of the Gaussian Distribution Linear Diagonal (GDLD) and proportionate row weight codes. The proposed codes effectively reduced the computational complexity of JVDD by about 70% on average. The minimum distance, dmin, and column weight distribution, wcol, of the codes are however sensitive to the
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design parameters chosen for the code. As such, the proposed codes were analytically optimized using the Response Surface Methodology (RSM).
With the optimized codes, the JVDD showed a performance gain of up to 2 dB over the state-of-the-art iterative detector for an ISI channel as well as a magnetic recording channel that uses the GFP model. The complexity of the JVDD and the iterative detector-decoder measured in terms of computation time were found to be identical at short codeword length, N. The computational time of the JVDD however grew significantly larger as N increases and SNR decreases. In the worst case scenario, a difference of up to 10 times was shown. The proposed JVDD is thus suitable for practical applications that operate at short or intermediate N and good channel SNR. The JVDD was also implemented in a non-binary form coined as 2D-JVDD for application to 2D channels. The study indicated a performance gain over the conventional 2D iterative detector-decoder at short N value of < 128. The exceptionally high complexity of the 2D-JVDD hinders it from being potentially applied in a real application.
The Joint Factor Graph Detector Decoder (JFGDD) was proposed in Chapter 5 as a second alternative to the state-of-the-art iterative detector-decoder. The JFGDD displayed a performance loss of about 1 dB (at its saturation point) over the iterative detector-decoder. The presence of short length-4 cycles in the factor graph of JFGDD causes a significant deterioration in its performance. Two measures were proposed to mitigate or completely remove the short cycles in the channel factor graphs. Firstly, a non-binary implementation of the algorithm was proposed where the grouping of symbols instead of bits resulted in lesser edges and therefore lesser cycles in the graph. The non-binary JFGDD showed an improvement in performance over the binary JFGDD. It attains an identical performance as the iterative detector-decoder over an ISI channel and a magnetic recording channel with the number of detector iterations, Idet, = 6.
Despite not outperforming the iterative system like the JVDD, the non-binary JFGDD has an advantage over the iterative detector-decoder in hardware implementation as it is parallelizable. Secondly, the design of constrained GPR targets was proposed and showed a marginal improvement in error rates for JFGDD. An overall performance loss of about 1.25 dB to the iterative detector-decoder was discovered. Despite theoretical predictions that suggest
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this technique could enhance the performance of JFGDD, the contrary was observed in the simulations. This was attributed to the fact that in practice, although an equalizer can be effectively used in reducing short cycles in a channel graph, it results in coloration of noise which causes performance deterioration. Comparing the JFGDD and the JVDD schemes, the JVDD proves to be more promising and has a higher potential of replacing the conventional iterative detector-decoder.
In Chapter 6, four novel equalization schemes were proposed for 2D magnetic recording channels to counter the effects of ITI and ISI introduced by such channels. They consist of the SMR equalizer, Two-Dimensional Magnetic Recording (TDMR) equalizer, Symmetric TDMR equalizer and Asymmetric TDMR equalizer. All four proposed schemes displayed a better performance than the conventional Perpendicular Magnetic Recording (PMR) equalizer used today. In the best case scenario, an approximate 9% performance gain was shown. The four proposed equalizers however require multiple reader heads unlike the PMR equalizer which operates with just a single reader. The cost associated with multiple reader heads and the complexity of the design should be weighed when considering the proposed equalizers as alternatives to the conventional PMR equalizer. Out of all the proposed equalizer designs, the TDMR equalizer performed best, at the expense of higher complexity associated with 2D detection. The SMR equalizer displayed a slight performance gain of 0.25 dB over the Symmetric TDMR equalizer at the expense of lower throughput. The difference in performance displayed was attributed to the Mean Square Error (MSE) obtained in each equalizer design.
When a complete integration of each of the proposed equalizers with a detector and decoder component is considered, the combination of the proposed equalizers with the JVDD resulted in a better system performance than when combined with the state-of-the-art iterative detector-decoder over a channel with good SNR. The integration of the proposed equalizers with the iterative detector-decoder is an ideal choice for channels with poor SNR.
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7.2 Future Work
In view of the scope of the work that is not fully explored in this thesis, this section proposes several relevant ideas that can be considered as a sequel for future research.
7.2.1 Mitigation of Colored Noise
In Chapters 4 and 5, the performance of the proposed JVDD and JFGDD were first compared with that of a state-of-the-art iterative detector-decoder over an ISI channel and subsequently a PMR channel using the GFP model. The JVDD and JFGDD were both implemented based on the fact that the noise in the channel is white. The noise in a PMR channel is, however in actual fact, colored. The integration of a Data Dependent Noise Predictor (DDNP) with the JVDD and JFGDD is thus proposed as a recommended future work to effectively whiten the colored and data dependent noise in a realistic magnetic recording channel. This may enable the JVDD and JFGDD to obtain an improved performance over colored noisy channels. In a recently published work [83], the authors reported a 4 dB performance improvement over conventional systems when DDNP is integrated with their proposed equalizer and detector systems. Similarly, in [83], performance loss was mitigated for an SMR system through the implementation of DDNP in forward and backward recursions (bi-directional DDNP) of the conventional BCJR detection algorithm.
The DDNP can be implemented as an auto-regressive channel model as illustrated in Figure 7.1.
Noise whitening can be performed by passing the read-back signal through the inverse auto-regressive model [84][85]. With the integration of DDNP, the computation of branch metric in the JVDD and the number of states in its channel trellis requires modification. Similarly, for the JFGDD, the connections between nodes in the channel factor graph and the computation of messages passed along the nodes of the JFGDD have to be implemented in a different manner.
The required modifications for both detection schemes and the evaluation of their noise whitening performance are recommended as a future work of this thesis.
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Figure 7.1 Auto-regressive channel model for noise whitening [85].
7.2.2 Hardware Implementation
The channel model and algorithms proposed earlier in this thesis were implemented and simulated using clusters of servers. While computer simulations gives a good first indication on error rates and complexity, an extension of the work to hardware simulation environment would be a useful next stage of analysis. For example, the implementation of the proposed JVDD and JFGDD algorithms on hardware such as field-programmable gate array (FPGA) or graphics processing unit (GPU) would give a more accurate benchmark of computational time and complexity of the proposed algorithms with the state-of-the-art iterative detector-decoder.
An LDPC coded magnetic recording system can be evaluated down to a frame error rate (FER) of 10-8 through hardware implementation [86][87]. Such low level of error floor is not attainable when simulations are carried out using central processing unit (CPU). Hardware implementation and analysis of the ideas proposed in this thesis are useful for a more accurate assessment of the algorithms as a viable future signal processing scheme. Knowledge on hardware implementation is however categorized under a different field of expertise and research, and the cost of acquiring hardware resources to embark on the proposed future research work could be costly.
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7.2.3 Joint Detection and Decoding with Non-Binary Codes
In Chapters 4 and 5, the JVDD and JFGDD algorithms were proposed for a binary coded ISI channel. The proposed joint detection and decoding schemes can also be extended to a non-binary coded ISI channel (1D and 2D) by introducing several key modifications that takes into account the encoding and decoding using a non-binary error correction code and the integration of a binary (for 1D ISI channel) or non-binary (for 2D ISI channel) detector with the non-binary decoder. The introduction of non-binary LDPC coded signals to various joint/iterative detection and decoding have resulted in significant performance improvement in a few notable recent works [87][88][89]. The suggested future work extension can be especially useful when the algorithms are applied to a 2D ISI channel such as a TDMR or SMR channel.
This would, however, come at the expense of increased computational complexity. For example, the application of non-binary LDPC codes to JFGDD would result in a super-factor graph with considerably greater number of variable, channel and parity nodes, each of which would be involved in the computation of symbol probabilities instead of bit probabilities (as in the case for binary LDPC code). Novel measures for managing the trade-off between increased complexity and better performance is a possible future area of research that is closely linked to the exploration of detection algorithms with non-binary codes suggested here.