2. THEORETICAL BACKGROUND
In this Chapter the basic theory related to this project is presented. The focus will be on the traditional receiver architectures followed by the introduction to Multi-Portreceiver.
2.1 INTRODUCTION
Configurable radio terminals require receivers able to support as many services as possible at different operation frequencies. Classical well-kown receivers architectures are limited in this aspect, being designed for specified modulation and demodulation schemes and following certain communication standards. However, other architectures have been introduced, such as six-port receiver. The six-port technique was firstly introduced in the 1960s and 1970s as a flexible and elegant way to perform microwave measurements.
Conventional heterodyne receivers require filters at the RF and IF, which can usually only be implemented by bulky surface acoustic wave or crystal filters. Hence, an integration on a single chip and, thus, small size and low cost, cannot be achieved.
For that reason, designers have been directing their effort toward the homodyne receiver ,better known as the direct conversion receiver. The direct conversion receiver has gathered much attention, particularly within the research community since then. There are many problems due to analog impairments to be solved when implementing a direct conversion receiver. Therefore, other receiver architectures are sought after. One promising architecture is the multi-port. Moreover, there is always a certain mystery about it. Some publications name it as a “Black box with two inputs and four outputs”.
The output ports are terminated with power detectors [7]
Among the first publications on the application of the multi-port communications receivers was Li et al. proved the concept of calculating the complex ratio of an incoming signal and a known local oscillator (LO) signal by using the six-port.
Originally, the Multi-Portwas found to be a very good means to measure the complex
reflection coefficient of a microwave device [7]. The initial idea of using a multi-port structure to determinate the phase of a microwave signal was first presented in 1964 by Cohn and Weinhouse [8].
Multi-port configurations are made with the interconnection of several passive circuits, mainly couplers and power dividers. Some examples of multi-port networks are shown in Figure 2.1 [9]. The higher the frequency, the smaller the passive circuit and the easier the integration in a Monolitic Microwave Integrated Circuit design.
Figure 2.1 Examples of Multi-Port network topologies.
2.2 RECEIVER ARCHITECTURES
The RF front end is a term for all the circuitry between the antenna up to and including the mixer stage. It consists of all the components in the receiver that process the signal at the original incoming radio frequency (RF), before it is converted to a lower intermediate frequency (IF) or to the dc (baseband). This downconversion of the RF signal can be realized in one or several steps [11]. Depending on this, two types of receivers architectures can be distinguished, I.e, the homodyne receiver and the heterodyne receiver. In the homodyne receiver, the carrier frequency is equal to the frequency of the LO signal at the input of the mixer. If the RF and LO1 frequencies are different, the receiver is called the heterodyne.
Today, due to multitude of wireless communication standards, achieving a multi-mode and multistandard receiver is highly desirable. Such receiver must satisfy the
requirements to have broadband or multi-band RF stages, to have low cost, size, and power consumption, and to be compatible with the digital signal processing section. In order to obtain theses properties, the RF stage architecture must be chosen properly.
The most usual receiver architectures are presented in Figure 2.2 and 2.3. In Figure 2.2, a direct conversion receiver is shown in form of a block diagram. In this receiver, the RF signal is received by the antenna, filtered and amplifed by the low-noise amplifier (LNA). After amplication, the RF signal is downconverted directly to the zero frequency (baseband) as the LO frequency is equal with the carrier frequency of the input RF signal. The main advantage of this receiver architecture is its simplicity and to this contributes also the absence of the image rejection filter, as ωIF = ω0 – ωLO = 0. The main disadvantage is the presence of dc-offsets that might affect correct functionality of the next stages.
Figure 2.2 Direct conversion (homodyne) receiver architecture.
Heterodyne receiver is the most widely used reception technique and finds numerous applications from personal communication devices to radio and TV tuners. It has been extensively used and is well understood. It comes in a variety of combinations but essentially relies on the same principle. The RF signal is first amplified in a frequency selective low noise stage, then translated to a lower intermediate frequency (IF) with significant amplification and additional filtering, and finally down-converted to baseband with either a phase discriminator or straight mixer, depending on the modulation format. This technique is illustrated in Figure 2.3.
BPF1 LNA BPF2
LO Mixer Receiver
Baseband Antenna
Figure 2.3 Heterodyne receiver architecture.
For most heterodyne architectures Figure 2.3, the RF front end consists of:
An impedance matching circuit to match the input impedance of the receiver with the antenna, so the maximum power is transferred from the antenna.
A band-pass filter (BPF) to reduce strong out-of-band signals and image frequency response.
An RF amplifier, often a low-noise amplifier (LNA). Its primary responsibility is to increase the sensitivity of the receiver by amplifying weak signals without contaminating them with noise, so that they can stay above the noise level in succeeding stages. It must have a very low-noise figure (NF). The RF amplifier may not be needed and is often omitted (or switched off) for frequencies below 30 MHz, where the signal-to-noise ratio is defined by atmospheric and man-made noise.
A first local oscillator (LO1) which generates a signal at a frequency offset from the carrier signal. By mixing operation, the RF signal is downconverted to an intermediate frequency (IF), ωIF.
The second mixer in Figure 2.3 downconverts the IF signal to zero frequency by choosing ωLO2 = ωIF.
2.3 FREQUENCY-CONVERSION
Frequency conversion is the process of shifting the spectrum of a signal. There are several reasons for doing this, i.e., the separation of a certain number of signals on a transmission medium (using different carrier frequencies) or to be able to radiate a signal by an antenna. The signal Xbp(f) is shifted by f0 resulting in Xbp(f-f0). We can concluded that the frequency shift can be achieved by multiplying the signal Xbp(f) with
the exponential function. This function must be reduce into cos(2πf0t ) and sin(2πf0t).
Then, we can expand the cos(2πf0t) to 1/2(ej2πf0t+e-j2πf0t) reveals that the real frequency conversion results in two separate frequency shifts of the original spectrum Xbp(f).
(Figure 2.1 [14]).
Figure 2.4 Real frequency conversion.
2.4 The MULTI-PORT RECEIVER
The multi-port receiver consists of the Multi-Port correlator and a few components, diodes or transistors, used to perform power detection and thus to complete the process of down-conversion from carrier frequency to either IF-frequency or baseband frequency. It was firstly used for microwave measurements. First work for microwave measurements with the multi-port correlator has been conducted by G. F. Engen and C.
A. Hoer [4,5].
The multi-port correlator is shown in Figure 2.5. It consists of one Wilkinson power divider (WPD) and three quadrature branch line couplers (QBLC), [15]. These are passive structures using the propertiey of quarter-wave transmission (λ/4) lines to delay the incoming signals with a accurately phase difference, i.e., 90°. In addition, when two input signals are used, as shown in Figure 2.5, superposition of these signals takes place, so that at the output ports, P3 - P6, the signals can be written as:
P3: SRFt− j
2
2 + SLOt− j
4
2 = −SRF
2 + SLO
2 (1)
P4: SRFt− j
3
2 + SLOt− j
3
2 = j SRF
2 + jS LO
2 (2)
P5: SRFt− j
2
2 + SLOt− j
3
2 = −SRF
2 + jS LO
2 (3)
P6: SRFt− j
3
2 + SLOt− j
2
2 = j SRF
2 + −SLO
2 (4)
The superposition of the LO and RF signals at ports P3 to P6 can be written in time-domain as:
P3: - ARF cos α + ALO cos (β + π/2) = - ARF cos α - ALO sin (β) (5)
P4: ARF cos (α + π/2) - ALO cos (β) = - ARF sin α - ALO cos (β) (6)
P5: ARF cos (α) + ALO cos (β) (7)
P6: ARF cos (α + π/2) - ALO cos (β + π/2) = - ARF sin α - ALO sin(β) (8)
Where α = ωLO t + θ (t) and β = ωLO t.
Figure 2.5 Multi-Port correlator with assigned input signals sRF and sLO [16].
The multi-port correlator can be used together with power detection diodes in order to implement a Multi-Port receiver. The multi-port receiver shown in Figure 2.6 allows separation of I and Q base-band channels working as a quadrature demodulator. With reference to Figure 2.5, the modulated radio frequency (RF) signal applied to P1 and containing the I and Q data is linearly combined with LO signal applied at P2. The output signals O3-O5 and described by (5) to (8) in Figure 2.6 are processed by the diodes with squaring operation, (●)2, generating after LP filtering the down-converted signals W3-W5.
Figure 2.6 Direct conversion Multi-Port receicer using diodes as power detectors [17].
The corresponding equations modelling above described process of down-conversion are presented as follows.
SRF (t) = R (t) cos (ωLO t + θ (t)) (9) SLO (t) = ALO cos (ωLO t) (10) W3(t) = - ABB,I cos (θ (t)) (11) W4(t) = ABB,I cos (θ (t)) (12) W5(t) = - ABB,Q sin (θ (t)) (13) W6(t) = ABB,Q sin (θ (t)) (14)
W3-W5 equations demostrate that the multi-port correlator together with the nonlinear processing of the power detectors allow to separate the I and Q baseband channels. In reality, the demodulated signals W3-W5 will not only contain the desired baseband information but also a dc offset terms.
In a multiport heterodyne receiver, the carrier frequency ω is similar in value to the local oscillator frequency ω0. Hence, if ω0 =ω, I/Q direct conversion is obtained in a homodyne architecture. This fact can be considered as an important advantage of the proposed receiver compared to the conventional down-conversion receiver. The same multiport front-end can be used for both heterodyne and homodyne architectures.
Moreover, signal to noise ratio is improved using a multiport circuit. In addition, it it used two Shottky diodes is compensated by the reduced cost of the IF stage. When digital modulation schemes are involved, quadrature mixers are emplyed to both modulate the carrier and demodulate the digitally modulated RF signal. In this case, the baseband signal is processed and mapped into in-phase (I) and quadrature phase (Q) signals, where it is worth to mention att I- and Q- are still baseband signals [13].
3. HETERODYN RECEIVER MODELLING
The use of simulation to design electrical systems and components is not only of practical meaning, but also necessary as the complexity of communication systems constantly increases. Designing and optimizing these systems and components often requires a good understanding of the systems and of the parameters and variables that influence the system performance. Simulation lets the designer take these variables into account in a only one environment and helps reduce the time for system design.
In this project, the Advance Design System from Keysight Technologies will be used. In this chapter, a heterodyne receiver will be implemented and simulated as a reference design for complex receivers. This receiver will make use of circuits described on behavioral level and no real-world circuits will be designed or used. Focus will be on simulation set-ups for this kind of receivers. Then, in the next chapters, a homodyne multi-port receiver will be implemented. In this second case, the main circuits of the receiver will be designed using real-world components described by vendor´s models.
The ADS implementation of the heterodyne receiver is shown in Figure 3.1. The received signal is an RF QPSK modulated signal. Simulations are perfomed using a 60 GHz carrier frequency and the IF of the heterodyne receiver was chosen at 900 MHz.
The second frequency conversion using behavioral mixers regenerated the I-and-Q-baseband signals.
The RF stage contains the amplifier (AMP1), mixers 1-2 and BPF Butterworth filter and I/Q mixer. It can be seen the typical architecture of a IF and baseband stage:
IF down-converters (MIX1, MIX2, LPF1, AND LPF2) and a couple of sample-and-hold circuits (SAMP1 and SAMP2).
The general overview of the heterodyne receiver simulation block diagram, using ADS software, can be seen in Figure 3.1.
Figure 3.1 ADS multiport heterodyne receiver.
It can be seen the characteristics heterodyne receiver in Figure 3.2. It had been used two mixers (Sideband UPPER IMAGE REJECTION), two Butterworth filters and two ampliers.
Each of them have some characteristics that are sumarized below:
Mixer (Sideband UPPER IMAGE REJECTION): It produces symmetricimage rejection at the upper and lower image band edges.
BFP Butterworth is one of the most basic filter. It is used in order to obtain the flattest possible response to the cutoff frequency.
The frequency response of the filter is extremely flat (with minimum ripples) in the passband.
In comparison with the Chebyshev filters (They are used in the demodulation stage), they have a difference response at low frequencies because they allow curled in one of his bands.
Most Amplifiers works reasonably well at lower frequencies, but at high frequencies often the device S.S. Model is not accurate enough. So, using s-parameters can be a good way to obtain a accurate amplifier. The s-parameter design uses relationships between input and output powers, forward and reflected powers. They are used to improve the overall gain of the receiver.
DT
3.1 TRANSMITTER BLOCK DIAGRAM
Figure 3.2 ADS transmitter block diagram.
Simulations are perfomed using a 60 GHz carrier frequency, the IF of the heterodyne receiver was chosen at DELTA_FR (900 MHz) in order to obtain a QPSK signal. It is used a 100 Mbps QPSK signal generated at the signal transmitter with two baseband data generators connected to the I/Q modulator block (see Figure 3.1).
(a)
(c)
Figure 3.3 Simulated Results. (a) Ibb signal in ADS, (b) Qbb signal in ADS and (c) RFTxC signal in ADS.
3.2 RF to IF – PROCESSING BLOCK
Figure 3.4 ADS processing block.
The RF stage contains the amplifier (AMP1), mixers 1-2 and BPF Butterworth filter and I/Q mixer (Figure 3.4). It can be seen the typical architecture of a IF and baseband stage (Figure 3.5).
(b)
(c)
Figure 3.5 Simulated Results. (a) MixInSt1 signal in ADS, (b) IFIout signal in ADS and (c) IFIFilt signal in ADS.
3.3 IF to BASEBAND PROCESSING BLOCK
Simulation results are shown in Figure 3.7. The I/Q components are amplified and the signals go throw the MIXER2 obtaining the two baseband signals IBBout and QBBout. Coming up next, they are filtered.
A m p l i f i e r 2
(a)
(b)
Figure 3.7 Simulated Results. (a) IFIamp signal in ADS and (b) IBBout signal in ADS.
Signal before/after the mixer.
3.4 SAMPLING I/Q SIGNALS
In this step the analog to digital conversion of the baseband signals are taken. We obtained the same digital I/Q signals and I/Q transmitted data (see Figure 3.8).
(a)
(b)
(c)
Figure 3.8 Simulation Results. (a) QBB signal in ADS, (b) Q signal in ADS and (c) I signal in ADS.
Figure 3.9 Sampling of the final signal.
V f _ S q u a r e
4. PASSIVE COMPONENTS
In this chapter it is introduced the basic theory of the microwave passive components, i.e., the quadrature branch line coupler and Wilkinson power divider. Also, the design of these components is presented.
BRANCH COUPLER
Directional couplers can be made in many different forms, they are four-port circuits where one port is isolated from the input port. All ports are matched, and the circuit is lossless. Most of the times, they are used for sampling a signal. They usually use distributed properties of microwave circuits, for example, the coupling feature is generally quarter-wavelengths. One of the ports is called “coupled”, another one is called “isolated” which is normally terminated, the third one is called “through” (where the signal incident exists) and the last one is called “input”. The coupled port is a function of which port is the incident port.
It is shown in Figure 4.1 [18]:
Figure 4.1 Geometry of a branch-line coupler.
THE QUADRATURE (90
O HYBRID):
The 90º Hybrid Coupler is a 4-port device, It is known as the quadrature coupler or branch-line coupler. Its scattering matrix has the symmetric solution for a matched, lossless, reciprocal 4-port device. They have a 90º phase difference between “through”
and “coupled” outputs. It is used in microstrip and stripline. Other 3 dB couplers can also work as a quadrature coupler.
It works as follows, power goes through port 1 and it is divided in ports 2 and 3, with a 90ophase shift between these outputs. No power goes through port 4 (isolated port).
Observe that the branch-line hybrid has a high degree of symmetry, as any port can be used as the input port. Any port can be used as a input port. The output ports will always be on the opposite side of the junction from the input port, and the isolated port will be the remaining port on the same side as the input port. This symmetry is reflected in the scattering matrix, as each row can be obtained as a transposition of the first row.
Thus, the [S] matrix will have the following form [18]:
EVEN - ODD MODE ANALYSIS:
We first work with the schematic circuit of a branch-line coupler in normalized form, as in in Figure 4.2. Each line represents a transmission line with indicated characteristic impedance normalized to Z0 .The common ground return for each transmission line is not shown. We assume that a wave of unit amplitude A1 = 1 is incident at port 1.
The circuit can be descomposed into the superposition of an even-mode excitation and odd-mode excitation (Figure 4.2 [18]). The superimposing of the two sets of excitations produces the original excitation and since the circuit is linear, the actual response can be obtained from the sum of the responses to the even and odd excitations.
Due to the symmetry or antisymmetry of the excitation, the four-port network can be descomposed into a set of two decoupled two-port networks.
Figure 4.2 Descomposition of the branch-line coupler into even-odd mode excitations.
Since the amplitudes of the incident waves for these two-ports are +/- ½, the amplitudes of the emerging wave at each port of the branch-line hybrid can be expressed as [18]:
B1 = 12 ρe + 12 ρo , (1) B2 = 12 Te + 12 To , (2) B3 = 12 Te - 12 To , (3) B4 = 12 ρe - 12 ρo , (4)
Where ρe , oa n d Te , oare the even-and odd-mode reflection and transmission coefficients for the two-port networks.
First consider the calculation of ρe andTe , for the even-mode two-port circuit.
Ρe = AAB−C− DB−C− D = −1 j− j1/
2−1 j j1/
2 = 0 (5)Te = AB−C− D2 = −1 j j−1/2 2 = −12 (1+j) (6)
Which gives the reflection and transmission coefficients as [9]:
ρ0 = 0 (7)
T0 = 1
2 (1-j) (8)
Then, we obtain the following results [9]:
B 1 = 0 (port 1 is matched), (9)
B2 = − j
2 (half-power, -90o phase shift from 1 to 2), (10) B3 = (half-power, -180o phase shift from 1 to 3), (11)
B4 = 0 (no power to port 4), (12)
The results match with the [S] matrix. The bandwidth of a branch-line hybrid can be increased to a decade or more by using multiple sections in cascade.
4.1 SCHEMATIC LEVEL DESIGN in ADS
Firstly, the PCB substrate is defined. his substrate (FR4) will be used through the entire thesis.
Figure 4.3 FR4 substrate representation in ADS.
In order to characterized the FR4 substrate it has made some adjustments:
The top light part should be AIR.
On the layer “cond”, the material should be Copper with a thickness of 18 micron and without any surface roughness.
On the layer “hole” the material should be PERFECT_CONDUCTOR and none surface roughness.
On the substrate layer “FR_4” it should have a thickness of 0.8 milimeter.
Between Air and substrate layer “FR_4”, the interface should be a strip plane, and the bounding are layer and they should be inherit from the substrate.
The last interface, in yellow colour, should be cover with a thickness of 0 micron.
The circuit will be simulated for both transient behaviour and S-parameters estimation. They will be working for the specified central frequency, in this case, 2.5 GHz. It has been created a variable called f_0 for this value. The frequency response of the circuit will be chosen for +/- 1GHz, using a step size of 10 MHz. The time-domain simulation has a StopTime of 3.5 nsec, and a maximum step-size of 10 nsec.
The substrate FR4 was defined with a TanD of 0.02, it has arelative permittivity (εr) of 4.6, it has 0 mm of roughness and a relative permeability (μr) of 1 (Nonmagnetic material). The remainder of the power from port 3 passes through to the output port (pin 2). At the center frequency (2.5 GHz).There is a phase difference of 90º between the outputs. The coupling coefficient specifies the ratio of the input power to the coupled power. Pin 4 is the isolated port, and it is typically well isolated from the input port near the center frequency.
The substrate FR4 was defined with a TanD of 0.02, it has a relative permittivity (εr) of 4.6, it has 0 mm of roughness and a relative permeability (μr) of 1 (Nonmagnetic material). The remainder of the power from port 3 passes through to the output
The substrate FR4 was defined with a TanD of 0.02, it has a relative permittivity (εr) of 4.6, it has 0 mm of roughness and a relative permeability (μr) of 1 (Nonmagnetic material). The remainder of the power from port 3 passes through to the output