Dead time effect

)) (

)

(( _{AB DE CA FD}

AD v v v v

v = − − − ,

3 / )) (

)

(( _{BC EF AB DE}

BE v v v v

v = − − −

3 / )) (

)

(( _{CA FD BC EF}

CF v v v v

v = − − −

(32)

This method can be preferred way for output voltage measurement since it avoids electromagnetic interferences, as will be explained later. However, it is quite impractical since requires measurement and arithmetical operation with four voltages simultaneous, which is a demanding task.

2.2.2. Dead time effect

Dead time is a necessary blanking interval (pause) between the turn-on signals for two legs switches in voltage source inverter (Ta1 and Ta2 in Fig. 10), due to their serial connection.

Therefore, deadtime Tb is introduced at each commutation (change of the leg output as the switch previously on is turning off and vice versa). Although is often neglected in the global analysis of inverters output, it significant influences output voltage due to a parasitic effect of this interval which makes nonlinear and distorted [27]. Huge efforts have been exerted to resolve this problem [28], [29]. A consequence of the deadtime is delay of the leading edge of the pulse (i.e.

positive slope), whereas the trailing edge remains unchanged. Only in the two boundary cases when duty cycles are 100 % and 0 % the deadtime interval does not exist since there is no need for commutation.

Behavior of the command signals is illustrated in Fig. 12(a) where trace 2 (upper) shows commanded duration of pulse at switching period Ts = 50 μs, Td = 1.28 μs for duty cycle d = 4%

(t_d^∗= 2 μs). The leading edge is delayed for value of Td whereas the trailing edge is unaffected.

The same can be seen on Fig. 12(b), for d = 96% (t_d^∗ = 48 μs). It may look that command signal is simply delayed for Td, and pulse can be compensated for this amount at the trailing edge.

However, this is not the case since antiparallel diodes are also commutating during the deadtime interval but in an uncontrollable manner. The state of the two diodes depends on the leg current sense [27]. Therefore, the loss of the duty cycle shown in Fig. 12 requires compensation that is more complex, instead of a simple extension of the trailing edge it has to take into account also sense of the current.

td

Tb Tb

Ts- td

(a)

Ts - td

Tb Tb

td

(b)

Fig. 12. Dead time effect (Td = 1.28 μs, Ts = 50 μs) on duty cycle duration (a) 4 % (td = 2 μs), (b) 96 % (td = 48 μs).

The total deadtime effect is voltage loss or gain, depending on the sense of the current, as illustrated in Fig. 13. For the positive current leading edge loss remains uncompensated by trailing edge diode conduction, whereas for negative sense trailing edge becomes

“overcompensated”. The two cases are

• Positive current: When lower switch turns off there is a dead time (1.28 μs) which does not affect output voltage. It can be seen that the turn-on time of mosfet and the turn-off time of the mosfet plus turn-on time of the diode are approximately equal.

• Negative current: When lower switch turns off there is a dead time (1.28 μs) which affects output voltage significantly. First, there is a delay due to upper diode turn-on time. Since it is less than deadtime there is a voltage gain. Then, after the upper mosfet finishes its duty and turns off, upper diode remains on for deadtime and lower mosfet turn-on time.

The overall effect to the voltage pulses is illustrated in Fig. 14(a), and to the voltage fundamental harmonic in Fig. 14(b). When the commutation between two voltage vectors is performed by one leg commutation only, the inverter applies the outgoing or the incoming voltage vectors depending on the sign of the output current in the commutating leg. Thus, the voltage vector applied to the load during the dead time is one of the expected adjacent vectors, if

Equ.

volt. loss SH

IA

S_L VAN

D→Tr

commut. Tr→D

commut.

Delay Delay

Td

Ideal duration

Tc Tc

Td

(a)

volt. gainEqu.

S_H

IA

SL

VAN

commut.D→Tr commut.Tr→D

Delay Delay T_d Ideal duration

Tc Td Tc

(b)

Fig. 13. Consequences of the dead time effect depending on the leg current (a) positive and (b) negative sense.

(a) (b) Fig. 14. Effect of dead time on single inverter and dual inverter (b) fundamental output voltage result

there is no another commutation during the period affected by deadtime effect. On the contrary, when the commutation between two voltage vectors is obtained by two simultaneous commutations, the voltage vector could be different from proper adjacent vectors during the dead time, leading to a spurious voltage pulse.

In the case of the dual inverter, if the two single inverter references v_H^∗ and v_L^∗ are chosen to be collinear (the reason will be comprehensively treated in the next chapter), dead time effect of the two inverters is canceling itself, having for v_H^∗ = v_L^∗ almost undistorted output. This is the averaged effect, instantaneous discrete vectors of the single inverters are still affected by dead time. The reason for the cancellation is illustrated on Fig. 15(a) and experimentally proved in Fig. 15(a), where is shown average effect of the dead time. If the references v_H^∗ and v_L^∗ are opposite, as it is usually case in order to provide symmetry among two inverters the average value of the errors are opposite. On the other side, the corresponding leg currents for inverters H and L have opposite senses (Fig. 10), giving in total equal errors that are canceling each other due to (27). This characteristic represents additional benefit of the dual inverter structure that can be important in some applications.

(a) (b)

(c) (d)

Fig. 15. Comparison of the dead time effect for dual inverter (a), (c) two-level and (b), (d) dual inverter open-loop current output.