DQ V REF Training (cont’d)

The V_REF stepsize is defined as the stepsize between adjacent steps. However, for a given design, DRAM has one value for V_REF step size that falls within the range.

The V_REF set tolerance is the variation in the V_REF voltage from the ideal setting. This accounts for accumulated error over multiple steps. There are two ranges for V_REF set tolerance

uncertainity. The range of V_REF set tolerance uncertainity is a function of number of steps n.

The V_REF set tolerance is measured with respect to the ideal line which is based on the two endpoints.

Where the endpoints are at the min and max V_REF values for a specified range. An illustration depicting an example of the stepsize and V_REF set tolerance shown in Figure 46.

Figure 46 — Example of V_REF set tolerance(max case only shown) and stepsize

Vref Straight Line

(endpoint Fit) Vref Set

Tolerance

Vref Stepsize

Digital Code

Actual Vref

Output

JEDEC Standard No. 209-4 Page 92

4.20 DQ V_REF Training (cont’d)

The V_REF increment/decrement step times are define by V_REF_time-short, Middle and long. The

V_REF_time-short, V_REF_time-Middle and V_REF_time-long is defined from TS to TE as shown in Figure 47 where TE is referenced to when the V_REF voltage is at the final DC level within the V_REF valid

tolerance(V_REF_val_tol).

The V_REF valid level is defined by V_REF_val tolerance to qualify the step time TE as shown in Figure 47.

This parameter is used to insure an adequate RC time constant behavior of the voltage level change after any V_REF increment/decrement adjustment. This parameter is only applicable for DRAM component level validation/characerization.

V_REF_time-Short is for a single stepsize increment/decrement change in V_REF voltage.

V_REF_time-Middle is at least 2 stepsizes increment/decrement change within the same V_REFDQ range in V_REF voltage.

V_REF_time-Long is the time including up to V_REFmin to V_REFmax or V_REFmax to V_REFmin change across the V_REFDQ Range in Vref voltage.

TS - is referenced to MRS command clock TE - is referenced to the V_REF_val_tol

Figure 47 — V_REF_time for Short, Middle and Long Timing Diagram The MRW command to the mode register bits are as follows.

MR14 OP[5:0] : V_REF(DQ) Setting MR14 OP[6] : V_REF(DQ) Range

T0

CK_t CK_c

T1 T2 T3 T4

TIME BREAK CA MRW-1MRW-1MRW-2MRW-2

T5 Ta0 Ta1 Ta2 Ta3 Ta4 Ta5 Ta6 Ta7 Ta8 Ta9 Ta10 Ta11 Ta12

DES

COMMAND DES VRFF(DQ) Value/Range Set DES

DES

Vref_time-Short/Middle/Long CS

CKE

DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES DES

Updating VRFF(DQ) Setting

Old Vref Setting New Vref Setting

Vref Setting Adjustment

TE TS

JEDEC Standard No. 209-4 Page 93

4.20 DQ V_REF Training (cont’d)

The minimum time required between two V_REF MRS commands is V_REF_time-short for single step and V_REF_time-Middle for a full voltage range step.

Figure 48 — V_REF step single stepsize increment case

Figure 49 — V_REF step single stepsize decrement case

Stepsize

Vref Voltage

Time

Vref DC (VDDQ DC)

V

ref_val_tol

t1

Stepsize

Vref Voltage

Time

Vref DC (VDDQ DC) V

ref_val_tol

t1

JEDEC Standard No. 209-4 Page 94

4.20 DQ V_REF Training (cont’d)

Figure 50 — V_REF full step from V_REFmin to V_REFmax case

Figure 51 — V_REF full step from V_REFmax to V_REFmin case

Full Range

Step

Vref Voltage

Time

Vref_val_tol

Vref DC (VDDQ DC)

t1 Vrefmax

Vrefmin

Full Range

Step

Vref Voltage

Time

Vref_val_tol

Vref DC (VDDQ DC) t1

Vrefmax

Vrefmin

JEDEC Standard No. 209-4 Page 95

4.20 DQ V_REF Training (cont’d)

Table 32 contains the DQ internal V_REF specifications that will be characterized at the component level for compliance. The component level characterization method is TBD¹.

Table 32 - DQ Internal V_REF Specifications

NOTE 1 V_REF DC voltage referenced to V_DDQ_DC.

NOTE 2 V_REF stepsize increment/decrement range. V_REF at DC level.

NOTE 3 V_REF_new = V_REF_old + n*V_REF_step; n= number of steps; if increment use "+"; If decrement use "-".

NOTE 4 The minimum value of V_REF setting tolerance = V_REF_new - 1.0%*V_DDQ. The maximum value of V_REF setting tolerance = V_REF_new + 1.0%*V_DDQ. For n>4.

NOTE 5 The minimum value of V_REF setting tolerance = V_REF _new - 0.10%*V_DDQ. The maximum value of V_REF setting tolerance = V_REF_new + 0.10%*V_DDQ. For n< 4.

NOTE 6 Measured by recording the min and max values of the V_REF output over the range, drawing a straight line between those points and comparing all other V_REF output settings to that line.

NOTE 7 Measured by recording the min and max values of the V_REF output across 4 consectuive steps(n=4), drawing a straight line between those points and comparing all other V_REF output settings to that line.

NOTE 8 Time from MRS command to increment or decrement one step size for V_REF .

NOTE 9 Time from MRS command to increment or decrement V_REFmin to V_REFmax or V_REFmax to V_REFmin change across the V_REFDQ Range in V_REF voltage.

NOTE 10 Only applicable for DRAM component level test/characterization purpose. Not applicable for normal mode of operation. V_REF valid is to qualify the step times which will be characterized at the component level.

NOTE 11 DRAM range 0 or 1 set by MR14 OP[6].

NOTE 12 Time from MRS command to increment or decrement more than one step size up to a full range of V_REF voltage withiin the same V_REFDQ range.

NOTE 13 Applies when VRCG high current mode is not enabled, specified by MR13[OP3] = 0.

NOTE 14 V_REF_time_weak covers all V_REF(DQ) Range and Value change conditions are applied to V_REF_time_Short/Middle/Long.

1. As of publication of this document, under discussion by the formulating committee.

Parameter Symbol Min Typ Max Unit Notes

V_REF Max operating point Range0 V_REF_max_R0 30% - - V_DDQ 1,11

V_REF Min operating point Range0 V_REF_min_R0 - - 10% V_DDQ 1,11

V_REF Max operating point Range1 V_REF_max_R1 42% - - V_DDQ 1,11

V_REF Min operating point Range1 V_REF_min_R1 - - 22% V_DDQ 1,11

V_REF Stepsize V_REF_step 0.30% 0.40% 0.50% V_DDQ 2

V_REF Set Tolerance V_REF_set_tol -1.00% 0.00% 1.00% V_DDQ 3,4,6

-0.10% 0.00% 0.10% V_DDQ 3,5,7

V_REF Step Time

V_REF_time-Short - - 100 ns 8

V_REF_time_Middle - - 200 ns 12

V_REF_time-Long - - 250 ns 9

V_REF_time_weak - - 1 ms 13,14

V_REF Valid tolerance V_REF_val_tol -0.10% 0.00% 0.10% V_DDQ 10

JEDEC Standard No. 209-4 Page 96

In document JESD209-4 LPDDR4 (Page 95-100)