I/O Ports

The ATmega16 features four I/O ports. Each of these ports has three distinct I/O memory address locations: one for the data register PORTx, one for the data direction register DDRx, and a third for the port input pins PINx. The lowercase x can be replaced with A to D representing Port A to Port D. Beside the general digital I/O functionality, each port has alternate functions, which interfere with the general digital I/O functionality.

Figure 5.4 is a UML class diagram depicting the classes of the Simulator package

5.3 Microcontroller

ATMega ATMega16

Device

Port

PortA

SRAM Registers

Register

DataDirectionRegister PinRegister PortRegister

PortB PortC PortD

Fake

Visual Paradigm for UML Standard Edition(RWTH Aachen)

Figure 5.4: Classes of the Simulator package related to I/O ports.

5 State Space Building in [mc]square

that model the I/O ports of the ATmega16. The ATmega16 is represented by the ATMega16 class. The four I/O ports are represented by the four Port classes: PortA, PortB, PortC, and PortD. The three I/O registers used to operate the ports are modeled by the three Register classes: PortRegister, DataDirectionRegister, and PinRegister. The alternate port functions of the specific ports are modeled within the specialized Port classes or in external devices, which are represented by classes of type Device. These external devices use the Register classes to communicate with the corresponding Port. The properties of the I/O ports are modeled within the refined Port classes. Each Port has specific methods and fields to model the behavior of the corresponding port. The I/O registers are modeled in the same way. They have, for example, an address and a value. The addresses of the I/O registers are stored within the corresponding Register classes, but the values of the I/O registers are not stored within the Register classes. These values are stored in the array representing the SRAM. The Register classes are used by other classes such as the Port to access this array (see also Sect. 5.3.2).

In the following, we first detail the modeling of the three I/O registers used to operate the I/O ports. Afterwards, we explain the modeling of an alternate port function represented within a Port.

Port x Data Direction Register (DDRx) selects the direction of the pins of an I/O port. If a bit of this register is set to one, the corresponding pin is used as an output pin. If a bit of this register is set to zero, the respective pin is used as an input pin. That is, it determines which pins of this port are used for output and which pins are used for input. This register influences the behavior of the other two registers of this port.

The DataDirectionRegister class models the DDRx registers. The value of the DataDirectionRegister is deterministic. It always returns the value assigned to it. The DataDirectionRegister influences the value of the PinRegister and the function of the PortRegister.

Port x Data Register (PORTx) serves two purposes. If the port is used as an input port, PORTx activates and deactivates the pull-up resistors of the pins. A one activates the pull-up resistors. A zero deactivates them. When the port is used as an output port, the value of PORTx is used as the output. Writing a one drives the pin high. Writing a zero drives it low.

The PortRegister class models the PORTx registers. Like the DataDirection-Register, it is deterministic and always returns the value assigned to it. We did not model the pull-up resistors because our simulation does not involve real hardware. If the Port is used for output, which is determined by the DataDirectionRegister, the value of PortRegister is used as output.

5.3 Microcontroller

Port x Input Pins Address(PINx) is used to read the actual value of the port. If a pin is used as an input pin, the value externally applied to the pin is read. If a pin is used as output, the value written to the corresponding bit in PORTx is read.

The PinRegister class models the PINx registers. The value of the PinRegister is dependent on the value of the DataDirectionRegister and the PortRegister.

The bits set to one in the DataDirectionRegister are deterministic and return the value of the PortRegister because they are used for output. The bits set to zero in the DataDirectionRegister are nondeterministic as they are used as input. For example, if the DataDirectionRegister is set to 0xff, the PinRegister returns the value of the PortRegister. If the DataDirectionRegister is set to 0x00, reading the PinRegister returns all 256 possible values. If the DataDi-rectionRegister is set to 0x0f, the four topmost bits are nondeterministic and the four lower bits are deterministic. In this case, reading the PinRegister returns 16 different values.

We did not use the TBDM for the values of these three Register classes because abstraction techniques are not used for Register classes representing I/O ports, and hence, nondeterministic values are not assigned to them. The value of the PinRegister is only nondeterministic if the corresponding DataDirectionRegister is configured as input.

Beside this general I/O functionality, every port has alternate functions. Port A is used as the analog input for the ADC. Port B is used as input and output for the SPI, as input for the analog comparator, to connect External Interrupt 2, as input for Timer/Counter0 and 1, and to connect the external clock for USART. Port C is used for connecting external timer oscillators, as input and output for the JTAG interface, and as input and output for the two-wire serial interface. Port D is used for input and output of Timer/Counter1 and Timer/Counter2, as input and output for USART, and to connect External Interrupt 0 and External Interrupt 1.

As an example for the modeling of an alternate port function, we explain the modeling of External Interrupt 0. Pin 2 of Port D is used as the input for External Interrupt 0. If External Interrupt 0 is enabled, this pin triggers the interrupt independently of the mode of the pin. If the pin is used for input, the interrupt is triggered from outside. If the pin is used for output, the interrupt is triggered by the program. That is, it is triggered when a one is written to PORTx. The flag in the General Interrupt Flag Register (GIFR) is set even if the interrupt is not enabled.

External Interrupt 0 is modeled within PortD. If this alternate port function is enabled, PortD triggers the corresponding bit in the representation of the GIFR. It triggers this bit nondeterministically if the DataDirectionRegister is configured as input (see also Sect. 5.6). If the DataDirectionRegister is configured as output, PortD triggers the bit deterministically whenever values are written to the PortRegister.

5 State Space Building in [mc]square

Modeling the devices accurately helps to minimize the size of the state space and to reflect the behavior of the microcontroller. If the I/O ports are not modeled accurately, reading a PINx register always returns all 256 possible values even if the port is used for output. This is an over-approximation of the behavior of the port that is too coarse to verify interesting properties involving the port. Hence, it is important to accurately model the devices of the microcontroller as far as possible.