Simulator modeling approach

There are three important system components which are closely coupled, interact and affect each other (Fig. 5.2). It includes, the user interaction with the system through the user interface and its relations with the worm manager, the interconnect and the worm classes. The user creates the interconnect type and worms, determines the worms' routes and sizes, and instructs the worm manager when to model the simulation. The interconnect class is the main physical structure that the worm is using in order to propagate from source node to its destination. The interconnect properties may change, which affect the worm routing flexibility and resources it can use (such as virtual channels) to avoid deadlock and thus, a retransmission.

Figure 5.2: Class relationship diagram

The worm manager class records worm data, determines arrival and departure of worms using the worm generation algorithm to load balance the number of worms processed simultaneously within the interconnect. In the center, the worm class routes itself through the interconnect and flags the worm manager when it is completely modeled or if has entered deadlock/livelock and needs to be retransmitted. The routing algorithm, used by the worm, adaptively enables the worm to find its best path possible to its destination as network traffic increases and the interconnect resources become occupied.

The cyclic diagram (Fig. 5.3) depicts the relationship between the interconnect architecture, the simulator and the physical properties of resources available. The interconnect architecture represents the physical structure and includes all the hardware required to implement it. The properties represent two types of parameters: physical parameters of electrical components comprising the interconnect (such as wire delays, switching delays, routing delays), and parameters of additional features, which enhance the interconnect performance (for example, channel partitioning, virtual channels,

interconnect configuration). The simulator emulates the interconnect functionality in order to evaluate and compare different configurations and settings.

Figure 5.3: Cyclical relationship

The simulation setup (Fig. 5.4) is an abstract view of high level system components and their interaction in order to initialize and execute simulation. First, the simulation properties are set for the simulation.

Figure 5.4: Simulation setup

The properties are set by the user and are crucial for worm generation, timing delays, and other simulation aspects. Then, the messages (worms) are created and are placed in a data structure (jar). Since the interconnect can change configurations, PEs and

memories change their location accordingly, and therefore, source/destination addresses must be correctly set before the worms can be generated. When the user chooses to run the simulation, the properties and the data of the worms in the jar are recorded in separate files. The interconnect receives worms from the jar of generated worms according to a probability called worm generation rate (GR) which is controlled by the user. In addition, the user can determine how many worms can occupy the interconnect at all simulation cycles by changing the value of the max worms in interconnect variable (MWII). If no value is set for this variable, the default value is unlimited number of worms. The worms that enter the interconnect are modeled until they reach their destination. All runtime worm data is collected in a separate output file which provides individual details about each worm. After the complete simulation is modeled, a file is generated recording the performance of the simulation.

Fig. 5.5 shows a UML class diagram of the interconnect architecture. A single type of interconnect is a set of faces which each comprise of multiple nodes. Within each node there are multiple ports. A node can be modeled as either a memory or a PE. Hence, the node still possess the same structure and functionality as any node, but it reserves one port as an I/O port to the device. Interconnect properties affect worm routing flexibility and resources it can use, while propagating through the interconnect, such as virtual channels (VC) and/or sub-channeling (SC). The port class contains VCs and SCs which are modeled as logical topologies on top of the physical network architecture. VCs as well as SCs have a great effect on the worms transmission success/failure rates and deadlock/livelock avoidance. Although VCs improve routing accuracy and reduce worm

transmission failure rate, it also increases worm latency and interconnect implementation costs.

Figure 5.5: UML class diagram of interconnect architecture

The worm manager class records worm data, arrival and departure time stamps of worms, and controls the worm generation rate in order to load balance the number of worms processed simultaneously within the interconnect. The worm class encapsulates the properties of a worm such as a header with source/destination fields and shortest path coordinates. The worm class shares data and collaborates with all other classes. It routes itself through the interconnect, while continuously being monitored by the worm manager. The adaptive routing algorithm is used by the worm to determine the best

available path that it can take to reach destination. The worm updates its shortest path coordinates with each movement to ensure its optimal path even when it is required to take a detour as a result of hot-spot node.