The Blocker Macro

We use a blocker macro within the partial area to support module relocation. The purpose of this blocker is to prevent the signals belonging to the static part of the system route through the partial area. As illustrated in Figure 2.14, the static sig- nals that route through the partial area will be cut when the partial area is being reconfigured.

The blocker occupies wires within the partial area, such that the static signals cannot enter the partial area. Therefore, the static signals are forced to route around the partial area. This method is similar to the original design flow of GoAhead [1]. However, they occupy all the wires in the partial area by the blocker, except thetun- nel wires. Tunnel wires are unblocked wires in the blocker that forms a path to the connection primitives. By doing this, they force the interface signals to route through particular wires (binding). They leave one particular routing path (tunnel) available for each signal to reach the corresponding connection primitive. However, we use propertyHD.PARTPIN LOCS to constrain the router to route a signal through a spe- cific wire. Therefore, we only have to block the wires that cross the border between the static area and partial area, except the interface wires. This concept is illustrated in Figure 5.6. The reason that this method does not work in the original design flow

5.2. IMPLEMENTING THE STATICSYSTEM 73 of GoAhead is that the interface signals have then multiple routing options to the connection primitives. Therefore, the binding might fail. Consequently, there might be no proper communication.

Figure 5.6: The wires that cross the boundary between the partial and static areas are blocked, except the interface wires. The interface signals can route via the interface wires and free wires towards the connection primitives.

The TCL Commands

During the implementation of the static system in Vivado, the blocker is a signal that is being routed via the wires that must be blocked. By doing this, the static signals cannot use these wires, since they are occupied by the blocker. Consequently, the static signals have to route via another (unblocked) wires.

The blocker is generated by using the ROUTE property [16]. This property is also called the directed routing string. The directed routing string represents the tree structure of a physical route by using nested brackets to represent branching. As we have seen in Section 2.1.3, the INT tiles contain PIPs that can be enabled to route a signal from one location to one or multiple other locations. By using the propertyROUTE, we can specify the physical route of a signal by defining the PIPs connections.

Figure 5.7 illustrates the tree structure of the blocker signal. We use only a nest- ing depth of two. Note that we start with a virtual node. This means that there is no defined start location of the blocker signal. The rest of the tree comprises individual PIP connections and, therefore, wires that are being blocked. The corresponding routing string is the following.

74 CHAPTER 5. IMPLEMENTATION

Figure 5.7:The tree structure of the routing net for the blocker macro.

A PIP connection connects a begin port to an end port. Therefore, for each PIP connection that we use in the directed routing string, we block two wires. This is illustrated in Figure 5.8. In this figure, a single INT tile is shown that has several blocked wires and several free wires, depending on the enabled PIPs. Note that the ports that are connected to the logic tile are also used for the blocker macro. In principle, we only have to block the wires that connect two INT tiles, because the purpose of the blocker is to prevent routing within the partial area. However, we require an end port and begin port to block wires. We might run out of these ports, and therefore, we use the ports that are connected to the logic tile such that all the desired wires can be blocked.

Figure 5.8: The blocker is a directed routing string that enables PIP connections, which are used for the blocker signal. A PIP connects a begin port and end port, and therefore, two wires are being blocked.

5.2. IMPLEMENTING THE STATICSYSTEM 75 1 s e t _ p r o p e r t y R O U T E "( \ 2 { I N T _ L _ X 2 6 Y 9 9 / L V B _ L 1 2 I N T _ L _ X 2 6 Y 9 9 / W W 4 B E G 2 } \ 3 { I N T _ L _ X 2 6 Y 9 9 / L V B _ L 0 I N T _ L _ X 2 6 Y 9 9 / S W 6 B E G 2 } \ 4 .. 5 { I N T _ R _ X 3 1 Y 0 / L O G I C _ O U T S 7 I N T _ R _ X 3 1 Y 0 / E E 2 B E G 3 } \ 6 { I N T _ R _ X 3 1 Y 0 / L O G I C _ O U T S 7 I N T _ R _ X 3 1 Y 0 / E L 1 B E G 2 } \ 7 ) " [g e t _ n e t s b l o c k e r _ n e t _ B l o c k S e l e c t i o n ]

Listing 5.14:The property ROUTE is used to generate the blocker.

The CommandsBlockSelection andBlockWiresInSelection

The commandBlockSelection is an existing command in GoAhead that blocks the wires that are connected to an INT tile. By default, the command blocks all the wires of the INT tiles in the current selection. However, in GoAhead, we can prevent a particular port from blocking. As illustrated in Figure 5.6, the wires that do not cross the border from the partial area to the static area should be prevented from blocking in the partial area. The command in GoAhead that prevents these wires from blocking is BlockWiresInSelection. Note that these commands are applied to the current selection of tiles. Therefore, before using these commands, we have to select the tiles belonging to the partial area, as illustrated in Listing 5.15.

The CommandsBlockLUTInputPortsInSelection andSaveAsBlocker

The commandBlockSelectiondoes not only block wires between INT tiles but blocks also the wires that are connected to the logic tiles. As mentioned before, we connect a single input signal to the connection primitives. We use one of its input pins to connect the input signal. Therefore, we have to prevent the path (wires) towards this input pin from blocking. Otherwise, the particular input pin on the LUT cannot be reached by the signal since the wire is occupied by the blocker. Note that there is one unique path from the INT tile towards each input pin of the LUT.

We use the command BlockLUTInputPortsInSelection to prevent the path to- wards the input port of the LUT from blocking. The parameter InputPortsRegex specifies the port name on the INT tile that directs to the input pin of the LUT. This port should be prevented from blocking. Note that there are different types of CLBs on the FPGA fabric. Also, the LUTs belonging to these CLBs have different naming. Therefore, the port names that direct to all these particular input pins of the LUTs are also slightly different. Now, to prevent the particular input port of all the LUTs from blocking, a regular expression is used to specify all these different port names.

76 CHAPTER 5. IMPLEMENTATION The last group of wires that must be prevented from blocking are the interface wires. The unblocking of the interface wires is part of thePrintInterfaceConstraints- ForSelection command, as illustrated in Listing 5.6. By setting the parameterPre- ventWiresFromBlocking toTrue, we prevent these specific wires from blocking.

Now that we defined which wires should be blocked and which wires should be prevented from blocking in the partial area, we use the GoAhead commandSaveAs- Blocker to generate a TCL script that includes the blocker.

1 # s e l e c t p a r t i a l a r e a 2 C l e a r S e l e c t i o n; 3 S e l e c t U s e r S e l e c t i o n U s e r S e l e c t i o n T y p e= P a r t i a l A r e a ; 4 5 # p r e v e n t w i r e s w i t h i n the p a r t i a l a r e a f r o m b l o c k i n g 6 B l o c k W i r e s I n S e l e c t i o n; 7 B l o c k L U T I n p u t P o r t s I n S e l e c t i o n 8 I n p u t P o r t s R e g e x= . * ( L | M ) * _ ( A | B | C | D ) 4; 9 10 # b l o c k all o t h e r w i r e s 11 B l o c k S e l e c t i o n 12 N e t l i s t C o n t a i n e r N a m e= d e f a u l t _ n e t l i s t _ c o n t a i n e r ; 13 14 # g e n e r a t e d i r e c t e d r o u t i n g s t r i n g 15 S a v e A s B l o c k e r 16 N e t l i s t C o n t a i n e r N a m e s= d e f a u l t _ n e t l i s t _ c o n t a i n e r 17 F i l e N a m e=./ s t a t i c _ b l o c k e r . tcl ;

Listing 5.15: The commands BlockWiresInSelection and

BlockLUTInputPortsInSelection are used to prevent blocking ports

within the partial area. The blocker net is generated by using the commandsBlockSelectionandSaveAsBlocker.