Time Multiplexing Track Trigger (TMTT) approach

Another discussed approach for the CMS track trigger is based on a time mul- tiplexed trigger concept, which has been developed for the ECAL trigger for the Phase-I upgrade of CMS [96, 97]. Hall et al. presented it in [98, 99]. The data processing of the Time Multiplexing Track Trigger (TMTT) approach is

ATCA crate Pulsar IIb PRM

Figure 4.4.: Overview of the hardware used for the AM approach CMS track trigger. Photos courtesy of: Pentair/Schroff, Fermilab.

performed by FPGAs only. The main idea of the time-multiplexing concept is that for each event the data of the whole detector, or at least a large part of it, are processed within a single processor node. However, different events are processed by different processor nodes. Therefore, the processing takes place parallel in time and not parallel in towers as with the AM approach. This is especially useful when an algorithm works on global data. In doing so, the time-multiplexing trigger concept avoids data sharing between processors. As the tracks processed by the CMS track trigger are relatively straight and, there- fore, the algorithms do not need data of large parts of the detector, this point is of no advantage for the CMS track trigger.

Figure 4.5 visualizes the concept of a time multiplexed trigger. The data from the detector are sent to a first layer of front end-boards. Each front-end board receives the data of the connected detector modules for every single event. The different events, visualized by different colors, arrive after each other at the front-end boards. In the case of the CMS track trigger, the DTCs implement the first layer, and there is no difference to the AM approach so far. The track processors form the second layer and perform the actual tasks of track finding and track fitting. The data of one event (same color) is processed by only one track processor. The data from different events (different colors) are processed by different track processors. The task of the first layer is to transfer the data of one event to the corresponding track processor. As every first-layer board needs to be connected with every track processor in the second layer, the two layers are connected by an interconnect with a high bandwidth.

As each track processor needs to process all the data of one event, every track processor is exactly the same. The track processors are not only built on the same hardware but are also configured with the same firmware and the same

4.3. Proposed CMS track trigger concepts Front-end Boards Layer 1 Interconnect Track Processors Layer 2 L1 Trigger

Figure 4.5.: The time-multiplexing concept applied by the TMTT approach. The different colors visualize data of different collision events. Source:[99]. parameters. This is the biggest advantage of the time-multiplexing approach for the CMS track trigger. To employ only equal processing nodes facilitates the expansion of the system, i.e. in the case of missing computing power simply more track processors are added. The additional track processors can also be used to create redundancy to ensure the track trigger functionality in case of broken track processors.

Unlike the time-multiplexed trigger for the ECAL at the Phase-I upgrade, the TMTT is not able to transfer the data of the complete tracker to one track processor. The number of optical links would be simply too large. Therefore, the TMTT splits the detector into eight sectors and duplicates the data at the sector borders. Compared to the AM approach with 48 sectors, the TMTT approach processes a much larger part of the detector within one track finding processor. The assignment of the stubs to a sector and the transformation from detector-specific to physical coordinates is done in the DTCs.

Any further processing takes place at the track processor whose data flow is shown in Figure 4.6. The first step in the track processor is the geometric processor. Due to the smaller number of sectors in the TMTT, the number of

Geometric Processor DTC

DTC

Hough

Transform rz-filter TrackFitter L1 Trigger Processor Node

Figure 4.6.: TMTT data flow.

stubs that need to be processed by a track processor is higher than at the AM approach. To facilitate the processing of this amount of data, the stubs are assigned to geometric segments, which can be seen as a kind of smaller sectors. Each sector is divided into four segments along ϕ direction and nine along η. In the following steps, each geometric segment is processed by an independent processing block. The geometric processor also performs some preprocessing on the stub data, such as coordinate transformations.

The stubs of each geometric segment are then processed separately by the track finding stage that is implemented on the base of a Hough transform in an FPGA [100, 101]. The Hough transform is an image processing method that facilitates finding lines within an image [40]. The TMTT applies the Hough transform to the data of a geometric segment in the rϕ-plane to find particle tracks. The Hough transform takes the coordinates of a stub and transforms them into a line in the transformed space. A point in the transformed space rep- resents one track in the detector, and its coordinates are the track parameters: ϕ0 and R. The transformed line represents all tracks that possibly go through

the given stub coordinates. As shown in Figure 4.7, the Hough transform is applied to every stub of the geometric segment. The points of the resulting lines are then accumulated in a 32 × 32 histogram. Because all stubs that lie on the same track cross at one point in the transformed space, a peak appears in the histogram at locations that correspond to a detected track. Track candidates are then created from histogram positions that have been filled by stubs from at least five different layers At the end, the stubs that build a track candidate are transferred to the rz-filter.

The track candidates are built only in the rϕ-plane. Therefore, it is possible that stubs of a track candidate do not belong to the same track because they do not lie on a line in the rz-plane. The rz-filter removes these undesirable stubs. The working principle is similar to the track candidate builder (Section 5.2.4) of the AM approach. Firstly, seeds are built from all possible combinations of two stubs from the PS modules. Secondly, seeds whose origin is not close enough

4.3. Proposed CMS track trigger concepts 1 2 3 4 5 6 A Hough Transform pT ϕ0 1 2 3 4 5 6 A

Figure 4.7.: The principle of track finding by Hough transform: The six hits (1-6) of the particle produce six lines in the transformed space. These six lines cross each other in a single point whose coordinates correspond to the parameters (ϕ0, pT) of the track. The line generated by the single hit (A)

does not cross this point, as it does not belong to this track. Source: [100]. to the interaction point or cross the geometrical section border are rejected. Lastly, the remaining seeds are projected to the other layers, and stubs close to the projected points are searched.

The track candidates with enough stubs are then processed by the track fitter that determines the real track parameters. Two possible track fitting algorithms are under discussion. The first option is a linearized χ2 _{fit as it is used by the}

tracklet method, described in the next section. The alternative is a Kalman filter based track fitter [40]. The last stage is a duplicate removal whose task is to remove all tracks that have more than four stubs in common with another stub. The track with stubs on the fewest layers would be removed. This step may be combined with the rz-filter or the track fitter.

The groups around the TMTT have developed a very powerful processing board—the Imperial Master Processor Virtex-7 (MP7) [102, 103]. The MP7, as shown in Figure 4.8, has been designed as a generic processing board ac- cording to the Micro Telecommunications Computing Architecture (MTCA) standard [104]. It consists of a large Xilinx Virtex-7 FPGA and an optical interface with an enormous bandwidth of 740 Gbit/s in each direction. To provide this bandwidth, the MP7 contains six Avago MiniPOD [105] receivers and six Avago MiniPOD transmitters. Each of the Avago MiniPODs provides twelve optical links running at 10.3 Gbit/s. Around the MP7 board, a firmware framework has been developed that provides functions to communicate with

Figure 4.8.: The MP7 processor board with the MiniPOD optical connectors on the left hand side and the FPGA in the center covered by the heat sink. Courtesy of Imperial College [102].

the interfaces of the board and standardized interfaces for the communication between the functional blocks within the FPGA. This facilitates the testing and commissioning of new functions.

At the current state of the development, it is expected that one processor node can be realized by at most five MP7 boards. To cope with the high event repetition rate, each processor node is duplicated 36 times for time multiplexing. For each of the eight sectors, one of these systems exist. A total of 1440 MP7 boards is necessary, which are mounted in at least 120 MTCA crates with twelve slots.