Introduction to TMS320C55x Digital Signal Processor
2.4 TMS320C55x Addressing Modes
The TMS320C55x can address a total of 16 Mbytes of memory space. The C55x supports the following addressing modes:
. Direct addressing mode . Indirect addressing mode
. Absolute addressing mode
. Memory-mapped register addressing mode . Register bits addressing mode
. Circular addressing mode
To explain the different addressing modes of the C55x, Table 2.3 lists the move instruction (mov) with different syntax.
As illustrated in Table 2.3, each addressing mode uses one or more operands. Some of the operand types are explained as follows:
. Smem means a data word (16-bit) from data memory, I/O memory, or MMRs.
. Lmem means a long data word (32-bit) from either data memory space or MMRs.
. Xmem and Ymem are used by an instruction to perform two 16-bit data memory accesses simultaneously.
. src and dst are source and destination registers, respectively.
. #k is a signed immediate 16-bit constant ranging from 32 768 to 32 767.
. dbl is a memory containing a long data word.
. xdst is an extended register (23-bit).
Table 2.3 C55x mov instruction with different operand forms
Instruction Description
1. mov #k, dst Load the 16-bit signed constant k to the destination register dst
2. mov src, dst Load the content of source register src to the destination register dst
3. mov Smem, dst Load the content of memory location Smem to the destination register dst
4. mov Xmem, Ymem, ACx The content of Xmem is loaded into the lower part of ACx while the content of Ymem is sign extended and loaded into upper part of ACx
5. mov dbl(Lmem), pair(TAx) Load upper 16-bit data and lower 16-bit data from Lmem to the TAx and TA(x1), respectively
6. amov #k23, xdst Load the effective address of k23 (23-bit constant) into extended destination register (xdst)
TMS320C55X ADDRESSING MODES 51
2.4.1 Direct Addressing Mode
There are four types of direct addressing modes: data-page pointer (DP) direct, stack pointer (SP) direct, register-bit direct, and peripheral data-page pointer (PDP) direct.
The DP direct mode uses the main data page specified by the 23-bit extended data-page pointer (XDP). Figure 2.10 shows a generation of DP direct address. The upper seven bits of the XDP (DPH) determine the main data page (0±127). The lower 16 bits of the XDP (DP) define the starting address in the data page selected by the DPH. The instruction contains the seven-bit offset in the data page (@x) that directly points to the variable x (Smem). The data-page registers DPH, DP, and XDP can be loaded by the mov instruction as
mov #k7, DPH ; Load DPH with a 7-bit constant k7 mov #k16, DP ; Load DP with a 16-bit constant k16
These instructions initialize the data pointer DPH and DP, respectively, using the assembly code syntax, mov #k,dst, given in Table 2.3. The first instruction loads the high portion of the extended data-page pointer, DPH, with a 7-bit constant k7 to set up the main data page. The second instruction initializes the starting address of the data-page pointer. The following is an example that initializes the DPH and DP pointers:
Example 2.1: Instruction mov #0x3, DPH mov #0x0100, DP
DPH 0 DPH 03
DP 0000 DP 0100
Before instruction After instruction The data-page pointer also can be initialized using a 23-bit constant as
amov #k23, XDP ; Load XDP with a 23-bit constant
This instruction initializes the XDP in one instruction. The syntax used in the assembly code is given in Table 2.3, amov #k23, xdst, where #k23 is a 23-bit address and the destination xdst is an extended register. The following example initializes the data-page pointer XDP to data data-page 1 with starting address 0x4000:
DP (16 bits)
@x (7 bits) DPH (7 bits)
DP direct address (23 bits) +
XDP
Figure 2.10 The DP direct addressing mode to variable x
Example 2.2: Instruction amov #0x14000, XDP
DPH 0 DPH 1
DP 0000 DP 4000
Before instruction After instruction The following code details how to use DP direct addressing mode:
X .set 0x1FFEF
mov #0x1, DPH ; Load DPH with 1
mov #0x0FFEF, DP ; Load DP with starting address .dp X
mov #0x5555, @X ; Store 0x5555 to memory location X mov #0xFFFF, @(X+5) ; Store 0xFFFF to memory location X+5 In this example, the symbol @ tells the assembler that this access is using the direct address mode. The directive .dp does not use memory space. It is used to indicate the base address of the variable X.
The stack pointer (SP) direct addressing mode is similar to the DP direct addressing mode. The 23-bit address can be formed with the extended stack pointer (XSP) in the same way as the direct address that uses XDP. The upper seven bits (SPH) select the main data page and the lower 16 bits (SP) determine the starting address of the stack pointer. The 7-bit stack offset is contained in the instruction. When SPH 0 (main page 0), the stack must not use the reserved memory space for MMRs from address 0 to 0x5F.
The I/O space address mode only has a 16-bit address range. The 512 peripheral data pages are selected by the upper 9 bits of the PDP register. The 7-bit offset determines the location inside the selected peripheral data page as illustrated in Figure 2.11.
2.4.2 Indirect Addressing Mode
Indirect addressing modes using index and displacement are the most powerful and commonly used addressing modes. There are four types of indirect addressing modes. The AR indirect mode uses one of the eight auxiliary registers as a pointer to data memory, I/O space, and MMRs. The dual-AR indirect mode uses two
@x (7 bits) Lower (7 bits) Upper (9 bits)
PDP direct address (16 bits) +
PDP
Figure 2.11 The PDP direct addressing mode to variable x
TMS320C55X ADDRESSING MODES 53
auxiliary registers for dual data memory access. The coefficient data pointer (CDP) indirect mode uses the CDP to point to data memory space. The coefficient-dual-AR indirect mode uses the CDP and the coefficient-dual-AR indirect modes for generating three addresses. The coefficient-dual-AR indirect mode will be discussed later along with pipeline parallelism.
The indirect addressing is the most frequently used addressing mode because it provides powerful pointer update/modification schemes. Several pointer modification schemes are listed in Table 2.4.
The AR indirect addressing mode uses an auxiliary register (AR0±AR7) to point to data memory space. The upper seven-bit of the extended auxiliary register (XAR) points to the main data page, while the lower 16-bit points to a data location on that page. Since the I/O space address is limited to a 16-bit range, the upper portion of the XAR must be set to zero when accessing I/O space. The next example uses indirect addressing mode, where AR0 is used as the address pointer, and the instruction loads the data content stored in data memory pointed by AR0 to the destination register AC0.
Example 2.3: Instruction mov *AR0, AC0
AC0 00 0FAB 8678 AC0 00 0000 12AB
AR0 0100 AR0 0100
Data memory Data memory
0x100 12AB 0x100 12AB
Before instruction After instruction
Table 2.4 The AR and CDP indirect addressing pointer modifications Operand ARn/CDP pointer modifications
*ARn or *CDP ARn (or CDP) is not modified.
*ARn or
*CDP ARn (or CDP) is modified after the operation by:
1 for 16-bit operation (ARnARn1)
2 for 32-bit operation (ARnARn2)
*ARn(#k16) or*CDP(#k16)
ARn (or CDP) is not modified.
The signed 16-bit constant k16 is used as the offset for the base pointer ARn (or CDP).
*ARn(#k16) or*CDP(#k16)
ARn (or CDP) is modified before the operation.
The signed 16-bit constant k16 is added as the offset to the base pointer ARn (or CDP) before generating new address.
*(ARnT0/T1) ARn is modified after the operation by 16-bit content in T0 or T1, (ARn ARnT0/T1)
*ARn(T0/T1) ARn is not modified.
T0 or T1 is used as the offset for the base pointer ARn.
The dual-AR indirect addressing mode allows two data-memory accesses through the auxiliary registers AR0±AR7. It can access two 16-bit data in memory using the syntax, mov Xmem, Ymem, ACx given in Table 2.3. The next example performs dual 16-bit data load with AR2 and AR3 as the data pointers to Xmem and Ymem, respect-ively. The data pointed at by AR3 is sign-extended to 24-bit, loaded into the upper portion of the destination register AC0(39:16), and the data pointed at by AR2 is loaded into the lower portion of AC0(15:0). The data pointers AR2 and AR3 are also updated.
Example 2.4: Instruction
mov *AR2, *AR3 , AC0
AC0 FF FFAB 8678 AC0 00 3333 5555
AR2 0100 AR2 0101
AR3 0300 AR3 02FF
Data memory Data memory
0x100 5555 0x100 5555
0x300 3333 0x300 3333
Before instruction After instruction
The extended coefficient data pointer (XCDP) is the concatenation of the CDPH (the upper 7-bit) and the CDP (the lower 16-bit). The CDP indirect addressing mode uses the upper 7-bit to define the main data page and the lower 16-bit to point to the data memory location within the specified data page. For the I/O space, only the 16-bit address is used. An example of using the CDP indirect addressing mode is given as follows:
Example 2.5: Instruction mov *CDP(#2), AC3
AC3 00 0FAB EF45 AC3 00 0000 5631
CDP 0400 CDP 0402
Data memory Data memory
0x402 5631 0x402 5631
Before instruction After instruction
In this example, CDP is the pointer that contains the address of the coefficient in data memory with an offset. This instruction increments the CDP pointer by 2 first, then loads a coefficient pointed by the updated coefficient pointer to the destination register AC3.
TMS320C55X ADDRESSING MODES 55
2.4.3 Absolute Addressing Mode
The memory can also be addressed using absolute addressing modes in either k16 or k23 absolute addressing modes. The k23 absolute mode specifies an address as a 23-bit unsigned constant. The following example loads the data content at address 0x1234 on main data page 1 into the temporary register, T2, where the symbol, *( ), represents the absolute address mode.
Example 2.6: Instruction
mov *(#x011234), T2
T2 0000 T2 FFFF
Data memory Data memory
0x01 1234 FFFF 0x01 1234 FFFF
Before instruction After instruction
The k16 absolute addressing mode uses the operand *abs(#k16), where k16 is a 16-bit unsigned constant. The DPH (7-bit) is forced to 0 and concatenated with the unsigned constant k16 to form a 23-bit data-space memory address. The I/O absolute addressing mode uses the operand port(#k16). The absolute address can also be the variable name such as the variable, x, in the following example:
mov *(x), AC0
This instruction loads the accumulator AC0 with a content of variable x. When using absolute addressing mode, we do not need to worry about what is loaded into the data-page pointer. The drawback of the absolute address is that it uses more code space to represent the 23-bit address.
2.4.4 Memory-Mapped Register Addressing Mode
The absolute, direct, and indirect addressing modes introduced above can be used to address MMRs. The MMRs are located in the data memory from address 0x0 to 0x5F on the main data page 0 as shown in Figure 2.6. To access the MMRs using the k16 absolute operand, the DPH must be set to zero. The following example uses the absolute addressing mode to load the 16-bit content of the AR2 into the temporary register T2:
Example 2.7: Instruction mov *abs16(#AR2), T2
AR2 1357 AR2 1357
T2 0000 T2 1357
Before instruction After instruction
For the MMR direct addressing mode, the DP addressing mode must be selected. The example given next uses direct addressing mode to load the content of the lower portion of the accumulator AC0(15:0), into the temporary register T0. When the mmap()qualifier for the MMR direct addressing mode is used, it forces the data address generator to act as if the access is made to the main data page 0. That is, XDP 0.
Example 2.8: Instruction mov mmap(@AC0L), T0
AC0 00 12DF 0202 AC0 00 12DF 0202
T0 0000 T0 0202
Before instruction After instruction
Accessing the MMRs using indirect addressing mode is the same as addressing the data memory space. The address pointer can be either an auxiliary register or a CDP. Since the MMRs are all located on data page 0, the XAR and XCDP must be initialized to page 0 by setting all upper 7-bit to zero. The following instructions load the content of AC0 into T1 and T2 temporary registers:
amov #AC0H, XAR6 mov *AR6 , T2 mov *AR6, T1
In this example, the first instruction loads the effective address of the upper portion of the accumulator AC0 (AC0H, located at address 0x9 of page 0) to the extended auxiliary register XAR6. That is, XAR6 0x000009. The second instruction uses AR6 as a pointer to copy the content of AC0H into the T2 register, and then the pointer decrements by 1 to point to the lower portion of AC0 (AC0L, located at address 0x8 of page 0). The third instruction copies the content of AC0L into the register T1 and modifies AR6 to point to AC0H again.
2.4.5 Register Bits Addressing Mode
Both direct and indirect addressing modes can be used to address one bit or a pair of bits of a specific register. The direct addressing mode uses a bit offset to access a particular register's bit. The offset is the number of bits counting from the least significant bit (LSB), i.e., bit 0. The bit test instruction will update the test condition bits, TC1 and TC2, of the status register ST0. The instruction of register-bit direct addressing mode is shown in the next example.
Example 2.9: Instruction btstp @30, AC1
AC1 00 7ADF 3D05 AC1 00 7ADF 3D05
TC1 0 TC1 1
TC2 0 TC2 0
Before instruction After instruction
TMS320C55X ADDRESSING MODES 57
Using the indirect addressing modes to specify register bit(s) can be done as follows:
mov #2, AR4 ; AR4 contains the bit offset 2 bset *AR4, AC3 ; Set the AC3 bit pointed by AR4 to 1 btstp *AR4, AC1 ; Test AC1 bit-pair pointed by AR4
The register bit-addressing mode supports only the bit test, bit set, bit clear, and bit complement instructions in conjunction with the accumulators (AC0±AC3), auxiliary registers (AR0±AR7), and temporary registers (T0±T3).
2.4.6 Circular Addressing Mode
Circular addressing mode provides an efficient method for accessing data buffers continuously without having to reset the data pointers. After accessing data, the data buffer pointer is updated in a modulo fashion. That is, when the pointer reaches the end of the buffer, it will wrap back to the beginning of the buffer for the next iteration.
Auxiliary registers (AR0±AR7) and the CDP can be used as circular pointers in indirect addressing mode. The following steps are commonly used to set up circular buffers:
1. Initialize the most significant 7-bit extended auxiliary register (ARnH or CDPH) to select the main data page for a circular buffer. For example, mov #k7, AR2H.
2. Initialize the 16-bit circular pointer (ARn or CDP). The pointer can point to any memory location within the buffer. For example, mov #k16, AR2 (the initialization of the address pointer in the example of steps 1 and 2 can also be done using the amov #k23, XAR2 instruction).
3. Initialize the 16-bit circular buffer starting address register (BSA01, BSA23, BSA45, BSA67, or BSAC) associated with the auxiliary registers. For example, mov #k16, BSA23, if AR2 (or AR3) is used as the circular addressing pointer register. The main data page concatenated with the content of this register defines the 23-bit starting address of the circular buffer.
4. Initialize the data buffer size register (BK03, BK47, or BKC). When using AR0±
AR3 (or AR4±AR7) as the circular pointer, BK03 (or BK47) should be initialized.
The instruction, mov #16, BK03, sets up a circular buffer of 16 elements for the auxiliary registers, AR0±AR3.
5. Enable the circular buffer configuration by setting the appropriate bit in the status register ST2. For example, the instruction bset AR2LC enables AR2 for circular addressing.
Refer to the TMS320C55x DSP CPU Reference Guide [1] for details on circular addressing mode. The following example demonstrates how to initialize a four integer circular buffer, COEFF[4], and how the circular addressing mode accesses data in the buffer:
amov #COEFF, XAR2 ; Main data page for COEFF[4]
mov #COEFF, BSA23 ; Buffer base address is COEFF[0]
mov #0x4, BK03 ; Set buffer size of 4-word mov #2, AR2 ; AR2 points to COEFF[2]
bset AR2LC ; AR2 is configured as circular pointer mov *AR2, T0 ; T0 is loaded with COEFF[2]
mov *AR2, T1 ; T1 is loaded with COEFF[3]
mov *AR2, T2 ; T2 is loaded with COEFF[0]
mov *AR2, T3 ; T3 is loaded with COEFF[1]
Since the circular addressing uses the indirect addressing modes, the circular pointers can be updated using the modifications listed in Table 2.4. The use of circular buffers for FIR filtering will be introduced in Chapter 5 in details.