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7.3 Power Stage

7.3.2 Tracking Performance

To evaluate the performance of the peak power tracker under repeatable conditions, the converter was attached to two crystalline Silicon series-connected solar cells illuminated by a halogen lamp to produce I-V characteristics similar to that produced by the micro- burner. This enabled characterization of the converter without the added complexity of the micro-reactor dynamics.

Shown in Fig. 7.22 are plots of power versus time, illustrating the peak power tracker performance. In the top plot, the tracker is started with a duty cycle set to operate at a voltage that is higher than Vmpp. The bottom plot shows the corresponding data when the

starting voltage is set below Vmpp. In both cases, the converter correctly finds the maximum

power point and tracks it to within the resolution of the duty cycle command and the noise in the power measurement. The tracking efficiency, ηtrack, is a measure of how precisely

the MPP is tracked, and is given by: ηtrack = PhPM P Pini, and is above 98% in both cases in Fig. 7.22.

Fig. 7.23 shows a plot of converter input power versus input voltage, which illustrates the I-V characteristics of the source, which is similar to the plot shown in Fig. 5.3. In addition, the discretization of the input voltage illustrates the finite achievable voltage step-size. The minimum step-size is limited by the resolution of the digital pulse-width modulator.

7.3.3 Conclusions

We have presented a distributed MPPT architecture for use with a portable TPV power generator. By employing intelligent, local, tracking of the MPP, the overall energy of the system can be increased. A discrete power converter implementation has been designed and tested with the full TPV power generator, showing efficient power conversion and tracking of the optimum operating point of the TPV cells. To address the high control losses and non-optimum power transistor sizes associated with the discrete prototype, a fully

7.3 Power Stage 0 10 20 30 40 50 60 0.2 0.25 0.3 Power P[W]

Power vs. time − starting from high voltage, η

track=98.2% 0 10 20 30 40 50 60 0.2 0.25 0.3 Sample Interval Power P[W]

Power vs. time − starting from low voltage, η

track=98.9%

Figure 7.22: Time-domain plot of the converter input power, showing maximum power point track- ing.

integrated design was developed in 0.35 µm CMOS technology. Custom low-power voltage and current sensing techniques were developed, together with a low-power conting-based ADC that is suitable for loss-less current sensing. A digital perturb and observe algorithm was implemented in CMOS logic, along with a counting-based DPWM and integrated gate drive circuitry and power transistors. We perform a detailed performance comparison for a variety of inductors and frequencies, and combine measured and modelled data to map out the possible size and efficiency trade-offs for the power stage. Finally, we show experimental results with excellent tracking of the MPP, along with high conversion efficiency and very low control losses.

Integrated Distributed MPPT in 0.35µm CMOS 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 0.18 0.2 0.22 0.24 0.26 0.28 0.3 0.32

Converter Input Voltage [V]

Converter Input Power [W]

Power vs. Voltage step range

Figure 7.23: Plot showing the power and voltage dependence of the experimental power source, using the same data as that which generated Fig. 7.22. The voltage step-size is limited by the resolution of the digital pulse-width modulator.

7.3.4 Future Work

Here we outline a few areas that could benefit from additional research:

Low-Power High Frequency DPWM

In this work we employed a simple counting based DPWM for its simplicity and small area. As digital control becomes more prevalent in power electronics, more power efficient DPWM designs will be required. Many alternative DPWM implementations trade-off die- area for power loss, making a high-resolution, high-frequency, low-power DPWM take up considerable size. There is thus room for further innovation in this area to develop compact and efficient DPWM solutions digital control of power electronics.

7.3 Power Stage

Theoretical Analys of Optimum Resolution of PWM and Sensing

While much work has been done to come up with different algorithms for performing maxi- mum power point tracking, much less attention has been paid to the important area of how to implement these algorithms. Particularly in a fully integrated solution, where one has complete control of the resolution of the DPWM and the ADC, it is important to allocate the control power budget to the area where it provides the most benefit. Since once can easily trade-off ADC resolution/speed and power consumption, it is important to quantify what are the appropriate design parameters. A theoretical analysis of this trade-off would be highly valuable for many designers of MPPT circuitry.

Power MPPT from Low-Voltage Input

In this application, the MPPT is powered from the 4 V output voltage (owing to the existence of a voltage buffer on the output). In many other applications, such a voltage buffer may not exist, and the circuit needs to be powered from the low-voltage input. A boot-strap circuit that starts the circuit up from a low (< 1 V) input voltage would therefore be desirable.

Chapter 8

Solar Photovoltaic Applications

8.1

Motivation

With rising world-wide energy demands and soaring prices of fossil fuels, interest in renew- able energy sources has increased. Among these, solar photovoltaic (PV) energy has seen a rapid growth in the last few years, resulting in decreased prices of PV cells as production capacity increases at a fast pace. As the PV cell prices decrease, the cost of the power electronics required to extract the maximum power of the PV modules and to interface the PV system to the grid is becoming a larger part of the overall system cost [57]. Much attention has therefore been given to the development of power electronics that enable a cost reduction of the overall system. In addition, much research is focused on increasing the efficiency of the power processing stage, as well as on improving the power yield of the overall system [58, 59]. This chapter investigates techniques for implementing low-voltage distributed power electronics in a solar photovoltaic system, and explores the achievable system output power improvements under real-world conditions.