IMPLEMENTATION
S. Abendroth 1;2
, R. Heuze 1;3
, S. Weiss 1
1
Dept. Eletronis &Computer Siene, University of Southampton, UK
2
University of Karlsruhe, Karlsruhe, Germany
3
Eole Superieured'Ingenieursen Eletrotehnique etEletronique, Paris, Frane
s.weisses.soton.a.uk
Abstrat. We report on the implementation of a
softwaredened radio (SDR)basedon
state-of-the-artdigitalsignalproessors(DSPs). Whiletime
rit-ialoperationsareexeuted onspeialisedtransmit
and reeiveproessorswith a xedblok struture,
thebasebandproessingisperformedonhighly
exi-bleDSPs. WeommentontheSDRbuildingbloks,
and the software implemented on this test-bed
in-ludingblindsynhronisation,equalisation,and
ar-rier reovery for dierentially enoded quadrature
amplitude modulation. The funtionality has been
testedby audiotransmission. Weonlude withan
analysisofapabilities andlimitationsofthe
imple-mentedSDRstruture.
1 INTRODUCTION
Thedesign of highly exibledigital ommuniation
systems has beome an area of onsiderable
inter-est. Partiularlyformobilewirelesstransmissionvia
hand-helddevies,sizeandostompetitiveness
usu-ally set limitations when trying to implement
sys-tems ompatible with multiple standards that
ex-istthroughouttheworld. Similarly,upoming
stan-dardswilloverlapwithexistingonesforasigniant
interimperiod,suhasforexampleforthetransition
fromGSMtoUMTS[1,2℄.
This hasmotivated the onept of asoftware
de-ned radio (SDR), whereby the digital-to-analogue
andanalogue-to-digitalonversionare performedas
loseaspossibleto theradiofrequeny. The aimof
extendingthe digitaldomain is to implement
mod-ulation,demodulation,hannelodingandother
re-quiredproessingtasksinsoftware[3,4℄. Therefore,
users, servieproviders,and manufaturersbeome
more independent of the realisation of one spei
data transmission standard, sine by downloading
appropriate software ode, a dierent funtionality
anbeadopted bytheommuniationssystem.
Inthis paperwereport onthe implementation of
asoftware radio test-bed with an SDR transmitter
C6711digitalsignalproessorsperformingthe
base-band operations. Theonversionbetweenbaseband
and an intermediate frequeny (IF) is ahieved by
separate,fastdigitaltransmitandreeiveproessors
assuggestedin [5,6℄. Thetransmittedandreeived
IFsignalshavearesolutionof12and14bits
respe-tively,andanbesampledatamaximumof65MHz.
We rst disuss the hardware employed in
real-ising the SDR transmitter and reeiver in Se. 2.
Software implementations, partiularly for the
re-eiverfuntionssuhasblindadaptivearrier
reov-ery, synhronisation,and equalisation, are outlined
in Se. 3. Se. 4highlightsthetesting and running
of a 96 kbit/s data link aross the SDR, while in
Se.5onlusionsaredrawn.
2 HARDWARE PLATFORM
ThegeneralsetupoftheimplementedSDRtranseiver
isshowninFig.1. TwooatingpointDSPsoperate
asbasebandunitsinboththetransmitterandthe
re-eiver,while dediated iruitryin form ofadigital
transmitproessor(DTP)andadigitalreeive
pro-essor (DRP) are employed for the onversion and
proessing stages between baseband and IF. In the
following,weommentrstonthetransmitfuntion
in Se. 2.1 and thereafter on thereeiverhardware
in Se.2.2.
2.1 Transmitter Ciruit
The transmitter hardware enompassesa Texas
In-struments C6711 oating point DSP for baseband
proessing. Based on a suitable input signal, this
proessorprovidesastreamofomplexvalued
sym-bols for transmission, whih are then passed to a
DTP,forwhihanAnalogDeviesAD9856hasbeen
utilised. TheseletedDTPhasanon-board
digital-to-analogueonverter,(DAC)tonallytransformthe
digital data into an analogue signalat IF. As
indi-ated in Fig.1, the iruit is ompleted by an
ingtasks that arehighly demanding in termsof
re-quiredomputationalomplexity. and antherefore
enompasstaskssuhassoureandhanneloding.
The C6711 DSP used here, evaluating 900 million
oatingpointoperations per seondat a lokrate
of 150 MHz, resides on a low-ost DSP starter kit
(DSK)board, whih permitsaessto variousports
and interfaes of the DSP. For the ommuniation
between DSP and DTP, both the DSP's data bus
andoneofitstwomultihannelbueredserialports
(MBSP) have been utilised. Inphase and
quadra-tureomponentsoftheomplexvaluedsymbolsare
presented to the DTP interleavedand in a parallel
fashionovertheDSP'sexpansionmemoryinterfae,
whereby 12 bits parallel data and aontrol line to
enabletransmissionareoupied. Theinitialisation
oftheDTPandalsoitsontrol duringtransmission
areserviedviaanMBSPbytheDSP.overa
num-berof ontrol lines. Finally, theseond MCBSPon
the baseband board is onneted to a low ost
on-boardanalogue-to-digitalonverter(ADC)aquiring
a12bitsingle-hannelaudiodatastream ata
sam-plingrateof8kHz. Inoursetup,thisanalogueinput
isurrentlyusedtoprovideaudiodatafor
transmis-sionasshownin Fig.1.
The baseband data is transfered to the DTP via
ustom build lathes, with inphase and quadrature
dataomponentsinterleaved. TheDTPisplaedon
anevaluationboardomprisinganAD9856
quadra-turedigitalup-onverter. Withinthis up-onverter,
itispossibletodownloaddierentsetsofoeÆients
for transmit ltering and hoose dierent
oversam-pling ratiosin theinterpolationstages. Atthe
out-put of the interpolation stage, aquadrature
ampli-tude modulation is plaed, where the inphase and
quadraturesignalomponentsaremultipliedbysine
and osinewaveforms. At amaximum input
band-width of 25 MS/se (onsidering both inphase and
quadratureomponents),themaximumsamplingrate
attheoutputoftheDTPis160MHz,whihis
lim-itedby a65MHz lowpasslterand therateof the
on-board digital-to-analogueonverter(DAC).This
DAChasaresolution of 12bits, and is followedby
audio
DAC
audio
ADC
I/Q data
control
clock
I/Q data
control
12 bit
digital IF
14 bit
digital IF
clock
RF unit
channel
12 bit
8kHz
12 bit
8kHz
DSP
baseband
receive
DSP
transmit
baseband
quadrature
upconverter
digital
digital
receive
processor
gain
DAC
ADC
ontrol.Thisgainamplieranberegulatedthrough
the transmit proessor, whih in turn is ontrolled
viatheDSP'sserial port.
AsindiatedinFig.1,theanalogueIFsignalould
nowbefurthermodulateduptoradiofrequenyand
betransmittedviaanantenna. Amathinganalogue
iruitouldreeivethetransmitantennasignal,and
down-onvertittoIF.Inourtest-bed,thishardware
stage is urrently omitted, and the IF signal from
theDTPispassedstraightbakintoadigitalreeive
proessor(DRP).
2.2 Reeiver Ciruit
Onthereeiverside,theanalogueIFsignalisfedto
an AD6644ST analogueto digitalonverter(ADC)
sampling at a maximum of 80 MS/se with 14 bit
resolution. As shown in Fig.1, this data is passed
to the DRP over a parallel port. Here, this
ded-iated proessor is an AD6620, whih has a
maxi-muminput bandwidthof 65MS/seforrealsignals
or 32.5MS/sefor omplex valueddata. Overtwo
stagesofasaded-integrator-omb(CIC)lterswith
denable deimation ratios, nally aprogrammable
reeivelteroforder255anbeappliedtothedata
in thedown-onversionproess.
FromtheDRP,theinphaseandquadraturedatais
then serially transmitted to theseond C6711 DSP
hosting the baseband reeiver funtions. Although
theseletedDRPalsoallowsaparallelinterfae,the
employed DSK board permits only to write to the
MBSPbutnotthedatabusontheexpansion
mem-ory interfae. Through the MBSP, the DSP an
also ontrol the parameterson the DRP, inluding
the deimation ratiosaswell astheseletionof the
CICsandthereeivelter.
In the baseband reeiver DSP, the oversampled
data is fed into a synhronisation and equalisation
stage,whih willbedesribedinSe.3. Thereafter,
the omplexdata symbolsare translatedintoa
bit-stream. Fromthis bitstream, another
synhronisa-tion proess is required to extrat the transmitted
data words. Finally as shown in Fig. 1, our
on-board DAC viathe seondMBSPto outputan
analogueaudiowaveform.
3 IMPLEMENTATIONS
After setting up thesoftware ontrollingthe
dier-ent devies as well as ommuniation between the
baseband DSPs and the transmit and reeive
pro-essors,theSDR platformoutlined in Se.2is
rea-sonably exible and an be programmed in C for
anyfuntionalitywithin theapabilitiesof the
test-bed. While in priniplethe bandwidthof the DTP
and DRP would permit the implementation of
W-CDMAwith arequiredbandwidthof 5MHz,using
theMBSP1in the reeiverDSPand thebaseband
proessingsetlimitations. Hene,inthefollowingwe
desribethe implementation of adata link of lower
bandwidth suh as found in GSM using the
previ-ouslydened hardwareplatform.
3.1 Modulation and Demodulation
Inthebaseband DSPof thetransmitter, the12 bit
audiosampleswereonvertedintoabitstream,whih
inturnwassubjetedtoaGrayenodeddierential
QPSK(D-QPSK)sheme. Dierentialenodingwas
seletedtoenableblind synhronisation and
equali-sationwithoutphaseambiguityinthereeiver. The
D-QPSKsymbolsareupsampledbyafatoroffour,
andpulse shapingwith aroot raisedosinelter is
appliedpriortotransferringthedatatotheDTP.
Theloksinthetransmitterandreeiveriruits
are governed by the baseband DSPs. As after
de-modulation a lok mismath will lead to aarrier
frequeny oset, a time-varying rotationof the
re-eived D-QPSK symbols and a slight dierene in
the transmittedand reeived data rates an result.
Inordertomitigatetheseproblems,thereeive
base-bandDSPrequiressynhronisationandarrieroset
reovery[7,8℄. Thissynhronisationisperformed
to-getherwithtimingsynhronisationandequalisation,
whihwill beoutlinedin thenextsetion.
3.2 Synhronisation and Equalisation
Amongstavarietyofalgorithmsforarrierand
tim-ingoset ompensation, suh asphase-loked-loops
and early-late-gate methods [7℄, adaptive ltering
washosenasaonvenientwayofsolvingthe
dier-entsynhronisationissues. Wehereapplya
fration-allyspaedadaptiveequaliser,wherebytheinputis
oversampledattwiethesymbolratetoahieve
tim-ing greater resolution over standardsymbol-spaed
equalisers[9℄.
To reoverthe D-QPSK symbols, dierent
adap-tiveshemesanbeinvoked. Standardadaptive
al-gorithm an be employed if a training sequene is
available. ForourSDRtest-bed,ablind
synhronisa-tionandequalisationshemewaspreferred,whereby
x
[
n
]
h
[ ]
m
0
1
[ ]
m
h
[ ]
m
x
0
[ ]
m
x
1
[ ]
m
y
g
[ ]
m
[ ]
m
e
2
2
Fig. 2: Frationally spaed adaptive equaliser in
polyphase realisation with deision-direted
updat-ing.
basedontheknowledgeofthetransmittedsymbol
al-phabetonly. Awellbehavedlassofadaptive
equalis-ers belong to the family of onstantmodulus
algo-rithms (CMA) [10℄. The CMA howeverleaves the
phase of the reeived symbols ambiguous.
There-fore, as speially D-QPSK modulation had been
seletedfordataenoding,adeision-diretedsheme
without phase-ambiguitywasseleted, asshown in
Fig.2.
Withtheoversampledreeiveddatax[n℄,boththe
reeiveddata available to the equaliserat sampling
period m as well as the equaliser oeÆients h[m℄
anbedenoted invetornotationas
x m = x 0;m x 1;m ; h m = h 0;m h 1;m ; (1) whereby x T i;m = x i [m℄ x i
[m 1℄ x
i
[m L+1℄ (2) h T i;m = h i;m [0℄ h i;m
[1℄ h
i;m [L 1℄
; (3)
with i=f0;1g. Theoutputy[m℄ oftheequaliser is
fed into a QPSK deisiondevie with output g[m℄.
Thedierenebetweentheinputandoutputofthis
slier thereforedenes theerroroftheequaliser,
e[m℄=g[m℄ y[m℄=g[m℄ h H
m x
m
: (4)
Inoursheme,thedeisionoftheorretslier
out-put is basedonthelosest viinity ofaQPSK
on-stellation points
l;k
= ( 1) l
+j( 1) k = p (2),with j = p
1and l;k 2 f0;1g, to the reeived symbol
y[m℄,
g[m℄=argmin
sl;k
jy[m℄ s
l;k
j : (5)
With asuitableerrorminimisationriterion,for
ex-ampleadeision-diretednormalisedleastmean
squa-res(NLMS)adaptivealgorithm
h m+1 =h m +~ x m kx m k 2 e
[m℄; (6)
thelteroeÆientsintheequaliseranbe
automat-iallyadjusted[9,11℄.
The frationallyspaed equaliser desribed above
is apable of arrier oset reovery by following a
dynami optimumsolution,
ai
aq
Symbols after timing recovery
ai
aq
Symbols after carrier recovery
imaginary
(b)
imaginary
(a)
real
real
0
0
-j
-1
0
0
-j
-1
Fig.3:Reeivedonstellationpattern(a)withoutand(b)witharrierosetreoverybytheadaptiveequaliser.
whereby
inv
isthelineartime-invarianthannel
in-verseregularisedbythehannelnoise,and
o and
#
o
arethearriernormalisedangularfrequenyand
phaseosets,respetively. Timingreoveryisahieved
by
inv
modelingafrationaldelaylter,wherebythe
equaliser benets from an inreased resolution due
to frationalspaing. Therefore,as longasthe
ini-tialstartingvalue forh
m
is reasonablyloseto the
true solution, and the arrier frequeny oset
o
is within limits, the adaptive algorithm in (6) an
onvergeto and trakthe optimumsolutionforthe
equalisationproblem.
4 OPERATIONANDAUDIO
TRANSMIS-SION EXAMPLE
TheoperationoftheSDRanbeveriedby
aess-ingallmemory loationsandregistersontheDSPs
viathesoftwaretoolsprovidedfortheC6711. An
ex-ample for theoperation of thearrier reoveryand
synhronisation isgiven in Fig.3(a)and(b), where
thereeivedonstellation overashort time interval
showstherotationofthesymbolswhihinFig.3(b)
hasbeenorretlyompensatedtoretrievethedata.
Thereforewith the orret operation of the
over-allSDRhardwareandsoftwareasoutlinedinFig.1,
a96 kbit/stranseiverfornarrowbandspeeh/
au-dio an be performed. This data rate agrees with
the 12bit word length and 8kHz sampling rate of
thebasebandunit on-boardADC/DACs. Thedata
was modulated to and demodulated from D-QPSK
symbolsinbothbasebandDSPsandfourtimes
over-sampled. Adjustments were made in theDTP and
DRPsuhthatanIFof5MHzwasahieved. Inthe
reeivebasebandDSP,allsynhronisationtaskwere
performedblindlyandadaptively.
5 DISCUSSION ANDCONCLUSIONS
Asoftwareradiodesignhasbeenimplementedbased
on state-of-the-art DSPs. The time ritial
opera-ialized proessors with a xed but programmable
blok struture, whilethe basebandfuntionality is
fully programmable on oating point DSPs. The
riuitandtheappliation toanaudiosignal
trans-mission at96kbpshasbeenoutlined.
The limitationsof thestruture are urrently the
useoftheserialportforommuniationbetweenthe
digital reeive proessor and the baseband reeive
DSP, as well as the speed of the baseband DSPs.
Theselimitationsmanifestthemselvesinarestrition
toapproximately256kbit/sbandwidthfor
transmit-tedD-QPSKdata. WhileGSMorsimilarstandards
an bewellimplementedwithin suh limits, for
ex-ample W-CDMAhasatoohigh bandwidth
require-mentforourspei SDRrealisation.
The exibility of the presented struture has to
be based on variation of D-QPSK transmission, or
potentiallythetransmitandreeiveltering,orthe
hannel oding. Some of our urrent work fouses
on implementingadierential16-QAMdata
trans-mission,wherebyblindsynhronisationshemeshave
tobemoreelaborateasinthesimplerD-QPSKase.
TheultimateaimistoapplyadaptiveQAM,whereby
the modulation level is adjusted to hostility of the
hannel, i.e. high level QAM shemes with a high
data throughput are all on whenever the hannel
qualitypermitsthis.
6 ACKNOWLEDGEMENT
WewouldliketothankProf.L.Hanzofor
enourage-ment and advie, andM. Shlosser and J.Stefanov
for theirontributionin form of anearly versionof
thepresentedtestbed.
7 REFERENCES
[1℄ \SpeialIssueonSoftwareRadio," IEEE
Jour-nal on Seleted Areas of Communiations, vol.
3rd Generation Mobile Communiation
Stan-dards," in IEEE 6th International Symposium
on Spread Spetrum Tehniques and
Applia-tions, Pisataway, NJ, September 2000, vol. 2,
pp.637{640.
[3℄ C.Bonnet, G.Caire,A. Enout,P.A.Humblet,
A.Montalbano,andD.Nussbaum, \Open
Soft-ware Radio Platform for New Generations of
MobileCommuniationSystems," in3rd
Euro-peanDSP Eduation andResearh Conferene,
Paris,September2000.
[4℄ M. Jian, S. R. Bai, K. T. Heng, and W. H.
Yung, \A Software Radio Development
Plat-form PCP200 | Partnering 'C6x with Virtex
FPGA," in 3rd European DSP Eduation and
Researh Conferene,Paris,September2000.
[5℄ T.Hentshel,M.Henker,andG.Fettweis,\The
Digital Front-End of Software Radio
Termi-nals," IEEE Personal Communiations, vol.6,
no.4,pp.6{12,August1999.
[6℄ M. Shlosser, \Software radio development,"
Diploma thesis, University of Southampton,
Southampton,UK,May2000.
[7℄ E. A. Lee and D. G. Messershmitt, Digital
Communiation, KluwerAademiPublishers,
Boston,2ndedition,1994.
[8℄ U. Mengali and A. d'Andrea, Synhronization
TehniquesforDigitalReeivers,PlenumPress,
NewYork,1997.
[9℄ R. Heuze, \Software Synhronisation and
Equalisation," Tripartite fth year projet
re-port,UniversityofSouthampton,Southampton,
UK,May2001.
[10℄ C.R.Johnson,P.Shniter,T. J.Endres,J.D.
Behm, D. R. Brown, and R. A. Casas, \Blind
EqualizationUsing theConstantModulus
Cri-terion: A Review," Proeedings of the IEEE,
vol.86,no.10,pp.1927{1950,Otober1998.
[11℄ S.Abendroth,\DevelopmentofaDigital
Front-End for a Software Dened Radio," T
ripar-tite fth year projet report, University of
