Rochester Institute of Technology
RIT Scholar Works
Theses
Thesis/Dissertation Collections
6-2004
The computer-aided design of nano-scaled digital
circuits
Frank Alva Krueger
Follow this and additional works at:
http://scholarworks.rit.edu/theses
This Thesis is brought to you for free and open access by the Thesis/Dissertation Collections at RIT Scholar Works. It has been accepted for inclusion in Theses by an authorized administrator of RIT Scholar Works. For more information, please contactritscholarworks@rit.edu.
Recommended Citation
The Computer-aided Design of
N ano-scaled Digital Circuits
by
Frank Alva Krueger
A Thesis Submitted
III Partial Fulfillment
of the
Requirements for the Degree of
MASTER OF SCIENCE
in
Electrical Engineering
Approved by:
PROF. _ _
S_e_r-=-9_
e-"....-y_L-"...-y_sh_e_v_s_k_i _ _
_
Sergey E. Lyshevski (Advisor)
Vincent Amuso
PROF. ____________________________________ _
Vincent Amuso
PROF. _ _ _ _ _
D_a_n_ie_I_P_
h
_
i
I----,Iip'---S
_ _ _ _
_
Daniel B. Phillips
Robert Bowman
PROF. ____________________________________ _
Robert J. Bowman (Department Head)
DEPARTMENT OF ELECTRICAL ENGINEERING COLLEGE OF ENGINEERING
ROCHESTER INSTITUTE OF TECHNOLOGY ROCHESTER, NEW YORK
Thesis/Dissertation Author Permission Statement
Title of thesis: The Computer-aided Design of Nano-scaled Digital Circuits
Name of author: Frank Alva Krueger Degree: Master of Science
Program: Electrical Engineering College: College of Engineering
I understand that I must submit a print copy of my thesis or dissertation to the RIT Archives, per current RIT guidelines for the completion of my degree. I hereby grant to the Rochester Institute of Technology and its agents the non-exclusive license to archive and make accessible my thesis or dissertation in whole or in part in all forms of media in perpetuity. I retain all other ownership rights to the copyright of the thesis or dissertation. I also retain the right to use in future works (such as articles or books) all or part of this thesis or dissertation.
Print Reproduction Permission Granted
I, Frank A. Krueger, hereby grant permission to the Rochester Institute of Technology to reproduce my print thesis or dissertation in whole or in part. Any reproduction will not be for commercial use or profit.
Signature of Author: _ _
F_r_a_n_k_A_o_K_ru_e-=9c-e_r
__
Date:L?5cf)-
~~
Inclusion in the RIT Digital Media Library Electronic Thesis fj Dissertation (ETD) Archive
I, Frank A. Krueger, additionally grant to the Rochester Institute of Technol-ogy Digital Media Library (RIT DML) the non-exclusive license to archive and provide electronic access to my thesis or dissertation in whole or in part in all forms of media in perpetuity.
I understand that my work, in addition to its bibliographic record and ab-stract, will be available to the world-wide community of scholars and researchers through the RIT DML. I retain all other ownership rights to the copyright of the thesis or dissertation. I also retain the right to use in future works (such as articles or books) all or part of this thesis or dissertation. I am aware that the Rochester Institute of Technology does not require registration of copyright for ETDs.
I hereby certify that, if appropriate, I have obtained and attached written per-mission statements from the owners of each third party copyrighted matter to be included in my thesis or dissertation. I certify that the version I submitted is the same as that approved by my committee.
Abstract
Theuse ofCMOS-based transistorsto implementdigital logicisthe prevalent
means of modern computation. It is, however, not the onlymeans. Advances innano-scienceandengineeringdemonstratethatnano-scaleintegratedcircuits
are in fact a viabletechnology for computation. The dominant means for in formationpropagation in thesedevicesisquantumtunneling
-a phenomenon
that isnot whollycompatible with currentdesigntechniques. Thispaperisan
explanation of one process usedtoboth designand simulatedigitallogiccircuits
utilizing thetopologyofthehypercube. Theaim ofthepaperis todemonstrate theease ofdesigningandimplementing astreamlined designenvironment and
to demonstrate the utility thatsuch an environment affordsthe designer. The
hypercubetopology is usedasthe dominantexample forconstructing 3D cir cuits. In this topology, each device isrequired to operate as a doubly gated
switch and computationis performed utilizing a concept similarto pass-gate technology. Thepaperdetailsthesoftware requiredtogeneratethelogiccircuit
and themeans of simulation. Each deviceofthe structure ismodeled usinga
non-linearstate-space representation. Thepaper concludes with twoexamples
ofimplementabletechnologies: single-electrontransistors(wrap-gatestructures
Table
ofContents
Abstract ... ii
Table ofContents . . . . iii
ListofFigures . v
1. Introduction 1
1.1. Nano-scale digital circuits 1
1.2. Computer-aided design ... 2
1.3. Overview . . . 2
1.4. Practicalconsiderations . . . 3
2. Representations oflogic functions 6
2.1. Circuits asdirectedgraphs. . 6
2.2. Schemeprogramminglanguage . ... 9
2.3. Binarydecision diagramsandtrees . 12
2.4. Hypercubes . . . , . 14
2.4.1. BDDtohypercubetransformation algorithm 14
2.4.2. Methods of optimization .... 15
3. Simulationof3D logic circuits 17
3.1. Cellularnon-linear networks . 17
3.1.1. Cellularautomata . 18
3.1.2. Cellular nonlinear networks . 20
3.1.3. Higher-orderconfigurations ... 22
3.1.4. Higher meaning . . 26
3.2. Extensionofthemodeltothehypercube. 28
3.2.1. Logiccircuitdesigner 30
3.2.2. Dynamic modelintegrator 38
3.2.3. Matlabsimulation 45
3.3. Sample hypercubedesign and simulation . 61
3.4. Conclusion . .66
4. Technology-specific integration 70
4.1. Integrationof single-electrontransistors ... .70
4.1.1. Physicalmodeling 71
4.1.2. Example integration . . . . 78
4.2. Integrationof molecular components . ... . . 84
4.2.1. PhysicalmodelofN@C6o 85
4.2.2. N@C6o asalogic device . 92
5- Conclusion 96
A.
Displaying
thehypercube structures 97List
ofFigures
1 Example feed-forward logiccircuit . 7
2 Example feddback logiccircuit 7
3 Examplebinary decision diagram . . ... 12
4 Example3Dhypercube . 15
l Output function for CNNnode ... . 21
2 Exampleprogression ofCNNstates overtime . . 24
3 Exampleprogression ofCNNstates . 25
4 Simulationof reaction-diffusion equation 26
5 Reaction-diffusionsimulation with randominitialconditions 27
6 Multipleinput, single output node 29
7 Singlenode simulation . . . ... 30
8 Hypercubeof exclusive-or 37
9 4Dhypercubeexample 38
10 5D Hypercubeexample ... 39
n Comparisonoflinear andhermitian outputfunctions 41
12 Anexample oftwoautomaticallygenerated inputfunctions 59
13 Sample6Dhypercube . . 64
14 Outputof6Dhypercube . . ... .66
15 Input parametersto6D hypercube . . 67
16 Samplemodel script 68
17 Samplesimulation script . . 69
1 Single-electrontransistor 71
2 Single-electrontransistorequivalent circuit . 75
3 SETmodel script . . 83
4 C60cage . ... 84
5 PotentialmapofC+N>C electron path. 88
6 Currentvs. voltagefor fullerene. ... . . 93
7 Differentialconductance vs. voltage for fullerene . 93
i.
Introduction
ThisTHESISisthedetailed descriptionof a process usedtodevelopa
computer-aideddesignenvironmentforthecreation ofthree-dimensionalnano-scale dig ital circuits. Its goal is to demonstrate how the concepts of (i) logic design,
(ii) the transformation (or compilation) ofthose designs to physical devices,
(iii) methods forsimulation, and (iv) the derivationof physical models canbe integrated into one cohesive environment and used tosolve specific problems. Thatspecific problemis the dynamic analysis of nano-scaledigitalcircuits.
Tothatend thedetailed descriptionofthesoftwaredesign processisgiven in addition to all code usedto implement the designenvironment. Although thiscodeimplementsonly theminimum of what shouldbe includedinadesign environment, it is, nonetheless,a sophisticated applicationthat can adaptto and beadaptedtoa varietyof circumstances.
An introduction to the concept ofthe design environment is presented in thischapterinadditiontoadescriptionandjustificationofthegeneraldirection taken throughout theremainder ofthethesis.
1.1. Nano-scale digital circuits
The choice of problem area, nano-scale digital circuits, stems from a present needtoperformexploratoryresearch. There isageneralunderstanding in the design community that CMOS technology, the present ubiquitous solution to large-scale logic design, will somedayhaveto besupplantedinorder to satisfy desires for more complex devices. Ofcourse, there is neither consensus nor general understanding of what form this new technology will take. Present studies are,therefore,in their exploratory phase.
Thestudyof physical sciences atthenano-scalehasbeenenhancedgreatly in thelastyearsthrough theuse of computer simulation. Technologyisbeginning toreach the point whereit has become feasibleto simulate (or model) multi-electronsystemsinorderto determinetheirproperties [4]. While thephysical and mathematicalunderstandingofthese systemsismore than ahalf-century old, the computationalcost of analyzing themin a meaningful way had been toogreattoundertake.
Thecouplingoftherecent (withinthelastdecade) availabilityofthis com putational power with other advances in fields, such as biotechnology, offers scientists and engineers an amplefieldtoinvestigate foralternatives toCMOS technology. Today, structures that act upon the influence ofsingle electrons and other particles canbeconsideredforuse as computational devicesthrough theuse of simulations.
1.2.Computer-aideddesign 2
absolutenecessityfor thoroughlydevelopingthesenew computationaldevices, simulations are requiredtoexaminethe earlyfeasibilityof each ofthesedevices. Which of the many possible physical combinations of nano-scale elements is worthinvestigatingcanonlybe determinedthroughaccurate simulation. There is, therefore, a needto create simulation tools and environmentsthat canac curatelymodelthesenovel physical systems.
Thesetoolsmust also providethescientistandengineer(heretoforereferred toasthedesigner) withthefreedomtoexperiment withdifferentconfigurations ofdeviceswith an eye alwaystowards thedesignof computationaldevices. That isthegoal ofthegoal ofthecomputer-aided designenvironment.
1.2. Computer-aided design
Thisthesis definesthe maintool of explorationfor designersasthe computer-aided design (CAD) environment with ideastowards rapid prototyping. This CADenvironment, asdefinedin thisthesis, iscomprised ofthreeparts:
1. Logic Synthesizerthat is ableto transformhigher-level descriptionsofa computation (perhapsan entireprogram)and synthesize the digitallogic functionsbywhich it canbeimplemented.
2. Logic Designerthatisabletotransformthoselogic functionsintoahard ware(physical) representation.
3. Simulatorthatutilizesthe physicalproperties ofthe devicesusedto im plementthelogic functionstogeneratea reliable view ofhow thephysical deviceswould operate shouldthey bebuilt and assembled as perthe re quirementsofthelogicdesigner.
Thisthesisconcentrates onthesecondandthirdelements oftheCADenvi ronment, thelogicdesignerandthesimulator. However,foraysinto thepossible implementationofthe logicsynthesizer are madefromtime totime.
1.3. Overview
Theremainderofthisthesisissplitintothreechaptersthat cover, (i)justifica tionsforthedesignoftheCADenvironment, (ii)thedesignof saidenvironment, and (iii) theuse oftheenvironment.
Chapter 2 provides anintroduction topossible notationsthat maybe used to specify logic functions. Logic circuits, Scheme functions, binary-decision
1.4-Practicalconsiderations 3
Chapter 3 details the design of the CAD environment based around the
hypercubetopologyand a state-spacemodel ofdevices. Theuse ofthatenvi
ronmentis demonstrated inan examplethatmakes useofnearly-idealdevices. Chapter 4 extendsthe discussion oftheuse ofthe developed design envi
ronmentbyconsideringtheintegrationof non-ideal devicesinto thehypercube
topology. Two examples are given based upon two promising technologies:
single-electrontransistors and endohedralfullerenes.
1.4. Practical considerations
Throughoutthisthesis, practicalimplementationsof alldiscussedideaswillbe shownintermixedwiththeideasthemselves. That is,this thesisnotonlyseeks
to reveal the concepts involved withthe computer-aided design of nano-scale
digital circuits, it also serves as a reference or an example ofhow thoseideas canbepractically implementedand used.
Thetwodominant languagesusedthroughout thediscussionareSchemeand Matlabm-scripts. Eachisusedin theareas wheretheyarethemost powerful
- Scheme
as an evaluator andinterpreteroflanguages (includingmathematics)
andm-scripts asnumerical workhorses.
Schemeisusedpredominantly through the discussionbecauseit servesdis
tinctly as the most clear and thoroughly unambiguous description of ideas.
Although the readermay notbe familiarwith Scheme, they should findthat its syntax (or, lack thereof) willbe readily comprehended. When in need of
reference, theuser is directedto [1] and [10].
Scheme statements in this thesis (and in general) are distinctive in their abundant use of parenthesis andindentation toshow program structure. They are alsoreadilyrecognizable dueto theirreliance upon a prefix notationfor all functionsand syntax. Asanexample,aScheme functiontocalculatethevalue ofex
throughn iterationsisgivenby,
(define (my-fact n) (define (iter i val)
(if (= i 0)
val
(iter (- i 1) (* val i)))) (iter n 1))
(define (my-exp x n) (define (iter i val)
(if (>= i n)
val
(iter (+ i 1)
i-4- Practicalconsiderations 4
(my-fact i))))))
(iter 0 0))
Whentheexpression (my-exp 1 30) isevaluated (withthe intentionof calcu
lating thevalueofe),aScheme interpreterwillgive,
2403440095914245030058787948979
2.7182818284590452353602874.
884176199373970195454361600000
Becauseexact numbers (1and30)were providedto theinterpreter, itreturned an exact value forthefirstthirtytermsoftheTaylorexpansion ofe1
Matlabm-scripts are used whenthevast librariesandplotting functional ityoftheMatlabenvironment are needed. Giventheextent oftheselibraries, therearemany operationsthatcan bewrittenin Matlabmuch morequickly
than inScheme. ThiswillbeseenveryplainlywhenMatlabisused asthesim ulationengineforperformingdynamicanalysis of nanoscaleintegrated-circuits.
Asimilar exampleto that givenfor Schemecanbewrittenasan m-script:
function val =
my_exp(x, n) val = 0;
for i = 0
: (n-1) val =
val + x"i / my_fact(i); end;
function val =
my_fact(n)
val =
1;
for i = 1 : n val =
val * i; end;
Whentheexpressionmy_exp(l, 30) is evaluated, Matlab returnsthevalue,
2.71828182845905.
Here,Matlabinterpretsall numbersusing the64-bitIEEEfloating-pointstan dardandthereforedoes not attempt an exact solution.
Asafinalnotefor assistance whenreadinglanguagesused inthisthesis, it
should benotedthatSchemeprograms areusuallywritteninafunctionalstyle of programming. That is, they are written without using explicit variables. This is the traditional way ofcoding in Scheme. Matlab m-scripts, on the
otherhand,are writteninan imperativestyle
-itstraditionalwayof coding.
This thesis will demonstrate the comfortable relationship established be tween Matlab andSchemecode. In truth, allofthecodeinthis thesiscould have beenwritten in one language orthe other. However, neither language is
particularly well suited to the full scope ofthis thesis. For example, Scheme hasno standardfacilities forsolving differentialequations orforplottingresults
manipulat-1.4- Practicalconsiderations 5
ing expressions. Therefore, each language (and its accompanying libraries) is usedinthe areaswhere it isthemost useful.
You thinkyouknowwhen youlearn, aremore sure when youcan write, even more when you can teach, butcertain when you can program.
2.
Representations
oflogic functions
This chapter briefly discusses four different notations for representing logic
functions. The firstnotation, the use oflogiccircuits, isapredominant means
for specifying simple circuits. However, due to notational difficulties when
those circuits becomecomplex, it must be abandonedin favor of more robust methods. The high-level (in terms of abstraction from hardware) means of specifying logic throughout this thesis is then presented. It isshownthrough
example that thisnotation is capable ofspecifying all manner oflogic circuits
- from
combinational logic to memory circuits. The high-level approach is
then abandoned fortwo notations that have simple and direct expressions in
hardware. The last ofthese notations, thehypercube, is used throughout the
remainderofthis thesisasthedominantexampleinlogic-circuit topology.
2.1. Circuits as directed graphs
Thetypicalrepresentation for logic functions isthelogiccircuit. Thesecircuits
graphically providesthe datapathsthrough which information may propagate
alongwith gatesordevicesthat may modifya singlesignal or agroupof signals.
Such gates include logic functions such as and and or or ways ofcombining
or extracting information from the signals (multiplexers, switches, &c.) To
continue withtheelectrical circuitanalogy,thedatapaths are often referredto
simplyas wires.
Logiccircuitsmay employmultipleinputsand multiple outputs. Inthecase
ofthe latter,thecircuit trulyrepresents amulti-valuedfunction.
Furthermore, logic circuitstypically utilize feed-forward datapropagation. That is, each device and each data path is used once and only once during the computation of the output or outputs. If a component of the circuit is
reused, thereexists some sort ofintrinsicstate
-theoutput ofthecircuit will
not necessarilytakeonthesame valuesfor alltimegiven constant inputs.
Theterm "feed-forward" isused forthissimpler typeof computationsince
logic circuits are often drawn as directed graphs. Each device is represented
as a node onthe graph and its outputs are directedto new nodes forwardin thegraph. When componentsarereused, thenthedirectionofthegraph must
necessarily go
"backwards"
torelocatedused nodes. Thus,computationsthat
require Illimitable!!! state are saidtoutilizefeedbackor backpropagation.
Asexamples ofthese two typesofcircuits, Fig. 2.1 and Fig. 2.2are given. Fig. 2.1 demonstrates a simplefeed-forwardcircuit. It isusedtorepresentthe
logic function,
2.1.Circuits asdirectedgraphs
Figure2.1. Anexample of alogiccircuitthatusesonlyfeed-forward datapaths.
Figure 2.2. Anexample ofalogic circuitthatusesonlyfeed-forwardandfeed back datapaths. Thisis thebasic D-type latch.
whereA andVarethebinary-operatornotationforthelogic functionsandand orrespectively andthenotation27isusedtorepresentthecomplement ofthe input (or function parameter)x.
In ordertodeterminethe output value ofthe circuit given in Fig. 2.1, one must simply substitute the inputs into the circuit and use the definitions of thecircuitelementsto simplifyor computeintermediatevalues ofthefunction. These substitutions and simplifications may happen at any time and in any order
-so long as they are done correctly, the output of the circuit will be consistent.
Forexample,onemaybeobligedtocomputethevalueofthecircuit withthe inputsx\ =0,X2=1,
x3=0, wherethesymbols0 and 1are usedto represent thelogicvalues
"false"
and "true" Thiscanbe donebyfirstsubstituting these symbols into the definition ofthelogic function (which is readily determined fromthe logicdiagram):
/(0, 1,0) =0V(0A1) V(0A1). (2.2)
Next,thedefinitions forAandV alongwithcomplementmaybeusedtosimplify the expressionto,
[image:14.529.160.369.104.170.2] [image:14.529.161.376.215.301.2]2.1. Circuitsasdirectedgraphs 8
and
/(0,1,0) =0V0V1.
(2.4)
One lastsimplificationstep (actually,twobecausetherearetwomore operators
to satisfy) are usedtodetermine/(0,1,0) = 1.
This is thesubstitution method fordetermining thevalue offunctions. It
workswonderfullyforall functionsthat contain nointrinsicstate
-those that
can be drawnas circuitsusing onlyfeed-forward datapaths.
Onthe other hand, thecircuit given in Fig. 2.2 does haveintrinsic state
-itsoutputisnot readilycomputable given itsinputs. The feedback datapaths
requireustousesomedefinitionoftime inordertodeterminetheoutput ofthe
circuit. Specifically, additional steps must beperformed in order to calculate
the output ofthe function. First, because the feedback datapaths cannot be determinedimmediately, it isrequiredtoutilizeinitialconditionsforthosegates
that are drivenby feedback datapaths. Oncethis isdone, the output ofthe circuit, inaddition to thetrue values ofall thedatapaths, maybe determined using thesame substitution methoddescribeearlier.
However,one complete substitution and simplificationiteration maynot be adequate to represent the output ofthe circuit since it represents merely the output ofthecircuit at one instantintime. Instantaneousvaluesaretypically
not of interest. Usually, knowledge ofthe steady-state value ofthe output is
required
-thosevaluesthatact asiftheyare nottime dependent. To determine
the steady-stateoutput, the circuit must be continually solved (through the
substitutionmethod) untiltheoutputhas stabilizedto a set of valuesthatcan not change (determinable byobserving the internalstates ofthecircuit).
Returningattentionbackto Fig. 2.2, it isfirstnotedthatit is impossibleto
write aclosed-formdefinitionofthefunctionusingbasicmathematical notation.
Therefore, theoutput ofthe circuit mustbesolved forby utilizing the circuit
directly. This is best donebylabelingstates in thecircuit asthevalues ofthe datapaths. Fortunately, the only states in the circuit are already labeled as
thetwo outputs.
Theinitial conditions shallbechosen somewhat mischievously. Sincethere
aretwo feedback paths, two initialconditionsmustbespecified: g(0),and <j(0).
Since q andq are complementary, there is anopportunity to forcethe circuit
intoan illogical initialstate. Itwill then beinformative tosee how thecircuit respondstosuchapredicament. Theinitialconditions arebothsetto thesame value, 0.
It isnow possibletosolvethecircuitusing thesubstitutionmethod. This is donein fourtime incrementswhile thetwostates (q, andq)are tracked. This is solutionisgiven in Table2.1.
Attime step2,thecircuit reached itssteady-statevalue; however, thesim
ulation was continued for another time step to test that this was in fact the
2.2. Schemeprogramminglanguage
t d elk q q
0 110 0
11111
2 1110
3 1110
Table2.1. Sample timeprogression ofoutputsofFig. 2.2.
was expected. Ifhowever, the circuit were arbitrary and at all complex, the
simulationwouldhave had tocontinue foralonger periodto demonstratethe factthat ithadreached steady-state.
Theuse oflogiccircuitdiagrams havenowbeen demonstrated fordescribing two types of logic functions: those with and thosewithout state. While the logic circuit isuseful for simple logic, it becomes somewhat less useful when the number ofinput,outputs, andinternalstagesincreases. Atthis point, the
designer becomesencumberedby followingwires(datapaths) andisdistracted from his true goal ofdevelopinga computationalfunction.
Let us therefore consider a more compact and efficient representation of
logic functions: theuse of a computer programminglanguage.
2.2.
Scheme
programming languageA directmeans for specifyinga logic functionis to use a notation specifically
designedto express mathematicalfunctions. Such a notation was used in the
previous sectionto define thelogic function / in (2.1). That notation isvery
convenient because it is similar to the notation used to define the values of
functions used throughoutmathematics and is therefore familiar to scientists
and engineers. However,such notations are nottypically used wheninterfacing with a computer. Instead, oneofmany programminglanguages maybe used
to define the values offunctions. Forreasonsthat will be discussed here and re-enforcedthroughout thisthesis, theScheme programming language is used asthemeansfordefininglogic functions.
The function given in (2.1) can be written, slightly more verbosely, in Schemeas,
(define f
(lambda (xl x2 x3)
(or x3
(and xl (not x2))
(and (not xl) x2))))
Thelambdafunctioncreatesafunctionthatacceptsthe threeargumentsxl,x2,
[image:16.529.224.308.99.155.2]2.2.Schemeprogramming language 10
theoutputofthelastor gate.
TheuseoftheScheme keyworddefine,here,simplyassociatesthefunction createdbylambdawiththesymbolf.
When Schemeisusedtodefine functionssuch asthis, thegeneral shape of thefunction (asrevealedinits typographicconventions)revealsthe distribution
ofcomplexity ofthat function. Forinstance, in theabove example it is easily surmised at a glance that the functionultimately has to compute some three quantitiesbeforeitcan performthefinalor operation and computethevalueof thefunction. It isalso seenthat thecomputation ofthose threepartsare rather simplistic. This convenient structureismaintained so longasthe function has no intrinsic state.
Let us now turnour attention to developing a Scheme function forofthe
second example logic function: the D-type latch. This logic function differs fromtheprevious intwo importantways: it hasmultiple output values andit contains state. For those reasons, the Scheme definitionofthefunction willbe slightlymore complex.
InordertomodeltheD-type latchgivenin theprevioussection,a function withlocal state must be created. Before, the lambda functionwas utilized to create thestateless function; now, adifferent (custom) constructor is needed. Thatconstructor andthefunction thatitconstructs are givenintheirentirety:
(define make-d-latch (lambda (qO nqO)
(let ((q qO) (nq nqO))
(lambda (d elk)
(let ((new-q (nand (nand d elk) nq))
(new-nq (nand q
(nand (nand d elk)
elk))))
(set! q new-q)
(set ! nq new-nq)
(list q nq))))))
There are a lot ofinteresting concepts usedto create this function, and some moments will be spent to discuss them to contrast the simplicityof thefirst functionf.
2.2. Schemeprogramminglanguage 11
The constructing functionthentrulycreatesthelogic functionutilizing the lambdafunction. Becausethe lambdaexpressionis deeper inlexicalscopethan
the let expression that createsq and nq, thatcreated function has access to
thosestates. The logic function itself hastwo inputs, dand elk andthose are givenexplicitlyasthefirst parameterto the lambda function.
Similarto thesimplerfunctionfdefinedearlier, thisnewfunctionnow goes onto computethevalue ofitsoutput; however,in afunctionwith state, those statesmustadditionally becalculated. This isalldonein alet statementthat
creates the two new values ofq and nq. Once that is done, the states ofthe
functionare updatedusingset! (theexclamationisusedtomarkthefactthat
this function has side-effects) andtheoutput values are returned as alist. The natural lexical structure ofScheme functions may again be employed toseethat the computation ofq (as seeninthe definition ofnew-nq) ismore involved (by oneadditionalnandgate) than thecomputation of q. In discrete hardware implementationsoflogic functionsthathavesuch unbalanced output datapaths, there exists possibilities for mismatched outputs. Typically some sort ofauxiliary synchronizationcircuit must be usedto compensatefor this.
Coincidentally,suchtimingcircuits are often comprised oflatchessuchasthese.
Thisthesiswill not considerthe synchronization problem asit is well covered inbasictextsondigital design.
Nowthattheconstructorhas beencreated,a newfunctiondmaybe defined thatrepresentstheD-type latchwith aspecific set ofinitialconditions. Inorder
tokeepparitywiththeexamplesimulation oftheprevioussection,letusdefine dthusly,
(define d (make-d-latch #f #f))
Theconstants#t and#f are usedtorepresentsthelogicalvaluestrueandfalse, respectively.
Asbefore, dmaybetestedagainstboth inputsbeingsetto#t. Onthefirst
computation ofd, it isseen thattheoutputsareboth #t:
(d #t #t) -> (#t #t)
Once, however, the second andthird iterations arecomputed, the output sta bilizes to theproper values:
(d #t #t) -> (#t #f)
(d #t #t) -> (#t #f)
It has therefore been demonstrated that Scheme is a sufficient and even convenient way to define and simulate digital logic functions. The notations usedfor logic functions can behigh-level (easierto comprehend, and generate
2.3. Binarydecision diagramsandtrees 12
Figure 2.3. An exampleof abinarydecision diagram for the logicfunctionof
(2.1).
previous section.
Attentionwill nowbeturnedback tomore low-level structures asit isdif ficult tolocate hardware that implements theScheme programminglanguage. However, in the next chapter, the transformation (or compilation) ofScheme definitions for functionsinto theseother low-level notations willbe considered
in depth.
2.3.
Binary
decision diagrams and treesThe binary decision diagram (BDD) is yet another notation for representing
digital logic functions. Itsredeeming attribute is itssimplicity: thereareonly
three elements that comprise the notation as opposed to the nearly infinite
variety of components used in the previous two notations (logic circuits may
haveany typesofgates,andScheme functionsmaydefinearbitraryfunctions).
Thosethreeelementsaredatapaths,functionalnodes, andterminalnodes.
The BDD for the example logic function (2.1) isgiven as Fig. 2.3. It will be
usedasareference asthegeneralstructure oftheBDD is discussed.
For eachinput to the function, there exists a decision layer. Such a layer iscomprised of a set offunctional nodes (circles in thereferencefigure). The
[image:19.529.168.364.96.324.2]2.3- Binarydecision diagramsandtrees 13
number offunctionalnodesfor a p-inputfunctionis,
Nf(p)= 2"- 1.
(2.5)
Each diagramortreeis rooted withtheoutput functionalnode. Thisnode branchestotwonodesthatrepresentthenextinputto thefunctionand, equiv alently,thenextdecisionlayer. One branch designatesthepathofinformation flow inthecasethattheinput islogicallytrue(shownasl'sinthefigure)while theotherbranch designatesthepathfortheinputbeingfalse (0). Eachofthese nodesthenbranchesto twonodesthatrepresentthenextinputparameter. The totalset of nodes associated withthis lastinput formsthenext decisionlayer. Each functionalnode is essentially adecision node: if the inputassociated withit islogicallytrue,then theappropriatepathis takenuntilanother nodeis reached. Thevalue oftheinput associated withthat nodeisthenexamined to determinewhichofitspaths shouldbe followed. Thiscontinues until aterminal node isreached.
Onceaterminalnode(markedasboxesin thefigure)is reached, theconstant value that it represents becomes the value ofthe function itself. The tree is constructed suchthatfora set ofinput values,one andonlyoneterminalnode canbereached.
To use Fig. 2.3 to determinethevalue ofthe function for X\ = 0, x2 = 1,
andx3= 0,a walk ofthe treeis begunatthe topmostnode. SinceXi is0,the left branch istakenfromthisnode. Anx2nodeisnextencounteredthatdirects thewalkto take theright path (1-path). Atthe x3 node, theleftpathis taken
and the walk completes at a 1-terminal node. The value ofthe function for thoseinputvalues isthen 1,justashas been determinedinprevious sections.
The BDD is avery direct representation ofstateless logic functions
-no computation facilities are needed to determine the values of functions aside from the ability toswitch the path ofinformation propagation. The BDD is thereforeaveryconvenient representation of alogicfunction for implementation in hardware. The circuit topology is completely regular for any computation (it dependsonly on thenumber ofparameters), and all parts ofthehardware are identical
-theyare switches.
These switchingnodes canbemodeledsimply as,
n(g,u0,ui) =
(5AU0)V(jAui). (2.6)
This logic function is the fundamental building block required to implement any state-less logic function using the BDD. It could be implemented using discrete logic components (one not gate, two and gates, and one or gate). Alternatively,more efficient solutionsmay be devisedsuch aspass-gate CMOS technology. Chapter4 discusses two alternatetechnologies.
However, before movingon to those technologies, let us consider the final logiccircuit notation
2-4-Hypercubes 14
as itsprimary examplefor developingtheCAD software.
2.4. Hypercubes
The so-called hypercube notation [18] is a functionally equivalent topological realization ofthe BDD. Its main contribution to the realm of logic function notations is the development of a specific 3Dstructure that is ubiquitous for alllogic functionsirregardlessofthelogicthat theydescribe.
Traditionally, a hypercube that represents an m-inputlogic function isre ferred to as an m-dimensional hypercube or an m-hypercube. This is merely an odd nomenclaturefor allhypercubes, irregardless ofthe numberofinputs, arestructuresthatexist in, and arecompletely definedin, 3Dspace.
2.4.1. BDD to hypercube transformation algorithm
Themethod ofconstructing thehypercube isasimplerecursive process whose understandingis basedupon a select few definitions.
A nodeis aconnectingpoint ofdatapaths. Anodehas twocomplemen
taryinput datapaths and one outputdatapath.
A datapathisa connectionbetweennodesthatallowsfor(unidirectional) informationpropagation betweenthenodes.
A data path is gated when it can control whether information is propa gated or not.
A terminalnodeisa source of constantinformation. In logicdesigns,this informationisone ofthe Booleanvalues trueor false.
Withthesedefinitions, thehypercube constructionprocessis,
1. Beginwitha singlenode,n0,aO-dimensional hypercubethat musteven
tually represent an m-dimensional hypercube. This node is the output node ofthe fully-realized hypercube.
2. Extend that node to be a ID hypercube by connecting two nodes to it through complementary datapaths. These two data paths extend in oppositedirections from the node (ifthenode isvisualized as a sphere, thenthedatapaths extend from theopposite poles). Eachofthesenew nodes must eventuallyrepresent (p l)-dimensional hypercubes.
3. Connecttwo nodes toeachoftheselast nodestoextend themto be ID
2-4- Hypercubes 15
5>-^>-w)
Figure2.4. Hypercubeofthelogic functionf(xx,x2,x3) =
x3V(i1 A12)V(xiA
x2).
4. Continuetoincreasethedimensionalityof nodesbyappendingnew nodes throughorthogonalcomplementarydatapaths. This processterminates whenuq is, in fact,an m-dimensionalhypercube.
5. The last nodesto be added, those thatremain tobe O-dimensional hy percubes, formtheset ofterminalnodes.
As an example of a3D hypercube, Fig. 2.4presentsthe hypercube for the example logic function (2.1). Because the logic function has three input pa rameters, Fig. 2.4takeson a cubicalform. Ifthefunction hadconsisted oftwo input parameters, itwouldhavetakenon a planarform.
The method usedto determinethe output value ofthe hypercubeis iden tical to that used with binary-decisiondiagrams. As such, no example ofits evaluation willbepresented.
2.4.2. Methods of optimization
All hypercubestructures oflogicfunctionswiththesamenumber ofinputsare identical
-theironlydifferencecomesfrom theconstant values associated with the terminalnodes. Therefore anymethods formutating thestructure of the hypercube(forthesake of some optimizationcriterion,forexample)mustbegin
byconsideringthe terminalnodes.
Giventhehypercubeconstructionprocess,these terminalnodeswill always exist on theperipheryofthehypercubestructure. This isan importantchar acteristicifone considersthefeasibilityofactually manufacturinglogiccircuits based upon the hypercubestructure as itsimplifies themeans by which con stants (be they voltages or electron injections) are physically interfaced with thecircuit.
[image:22.529.187.346.96.234.2]2.4. Hypercubes 16
This grouping is due directlyto theorder inwhichdatapaths are encountered in thedesign. From amanufacturability standpoint, thehypercube structures
maybeoptimizedbyattempting to physically group (as inproximity)terminal nodes ofidenticalvalues.
Later in this thesis, it will be seen that the order ofthe data paths will simplybe specified by a lexical sort ofthe names ofthe function inputs that control them. This ordering is therefore arbitrary. The hypercube structure can be optimized from a manufacturing standpoint by examining the many combinations ofordersofdatapaths inan attempttodesign hypercubeswith
groupedterminal nodes.
Othermethods of optimizationbeyondmanufacturability mayconsiderthe
size ofthe hypercube. There is an obvious case where constant folding may
beappliedto thestructure. That is, anynodes thatare guaranteedtoreceive inputs of identical values for all times, under all conditions, may simply be
replaced withterminalnodes ofthosevalues. Thisspaceoptimization,however, canpotentially (andlikely) destroy theregularstructureandsymmetryofthe
hypercube. Becausethis regular structure isa majorbenefit ofthe hypercube
3.
Simulation
of3D
logic
circuitsThe Hypercube that was lastly presented in the previous chapter is used
throughout the remainder ofthis paper as the dominant means to describe
and structure3D logiccircuits. The dynamic behaviorofthesecircuits canbe
determined in both technology-independent and technology-dependent ways.
Thischapterisconcerned with theexact meansby whichthis is done.
3.1. Cellular non-linear networks
Nano-scale digitalcircuitsverywellmaypresentthecircuitdesignerwithade
sign processcontrary towhattheyare accustomed: thedevicesthat comprise
thesystemsofthistechnology may come inpredeterminedtopological config
urations. This is contrary to the typical use oftopology to define a circuit's
behavior. Theseconfigurations of nano-scaledevicescould comein the formof
regular grids or lattices. Much more complexforms such as the structures of foldedprotein molecules as circuits mayalsobeutilized.
In thesecases, the designermust implement thedesign without the ability
to redefine the structure ofthe final system. It is therefore sensible to con
sider whether regular structures of similar components can perform anysort of
computation; and, if so,howthat computation canbeanalyzed.
A methodology must be determined for reasoning about the control and
optimization ofmany devicesto achieve some system-wide goal. Thiscontrol
must accommodate the concept that a particular device's reference state (or
required state, target, or goal) is merely related to the reference state ofthe
entiresystem,andthat thepresent stateof a particulardevicecanbeinfluenced
not onlyby itsown actions butbytheactionsofitsneighbors.
Some [5], [7] feelthat theyhave found such a suitable methodology. Their
formulation is basedupontheuse ofCellular Nonlinear Networks (CNNs).1
The analogue of CNNs is the organization of cells in complex organisms.
Althoughsuch organismsmay possess some sort of central nervous system or
central controlnetwork, on a smallerscale, individualcells performtheir func
tion basedonlyontheirownstate, theirenvironment'sstate,andthestates of
their neighboringcells. Whilethe exact operation ofthesecomplexorganisms is not thoroughly understood, the premise of distributed coordinated control
seemsworthyofinvestigation.
Thissectionisconcerned with theconceptofCNNs, andtheirapplications
1Atone pointintime, [5],theacronym "CNN"stoodfor Cellular Neural Networks. The word "neural" hassince been replaced with theword "nonlinear" to convey the ideathat these networks ofdevices are not limited to thoseapplications forwhich neural networks seemforeverassociated.
3-i.Cellularnon-linear networks 18
to computation and to the solution of partial differential equations (PDEs). The two topics seem at first unrelated, but it will be shown that the latter is anatural consequenceofthestructure ofCNNs. It is not readily clear how
effectivecomputationduetoCNNsisas a generalmeans, and,as a consequence
ofthis lackofknowledge,avarietyof perspectives ontheir designand analysis shall be presented. This section is a search for ideas for the simulation of nano-scaledigital circuits. Inthe proceedingsections ofthischapter, theCNN concept willbemodifiedtosuit ourlogic designneeds. However,forthepresent time, letus considerCNNsintheirpurest form.
3.1.1. Cellular automata
The CNNmethodologyisaccreditedtoLeon 0.ChuaandLinYangatBerkeley, Californiain 1988 [5]. Theydescribeitas a generalization of another methodol
ogy: cellular automata. This is,infact, thebestmeanstobegina presentation ofthe underlying concepts of CNNs. As such, some moments shall be spent
examiningcellular automata.
Cellular automata is an exploration of emergent computational behavior.
It is a study ofhow naturalevolution (in the context of genetic algorithms)
could produce coordinated global information processing through the action and interactionof simple components(cells) [15].
A classical cellular automation system is a lattice ofindividual cells each
witha binarystate one of either on oroff, 1 or0. Each cellsis aware ofits neighborhood andits "next"
stateispurelyafunctionofitsown state andthat ofits neighbors.
A simple example is a one-dimensional lattice consisting ofN cells. Each
cell is indexablefrom 1 to N andisnoted as C. For example, C(l) is avalid cell;however,C(N+1)isnot. Eachcellhasa state x and an outputdenotedas y. Atransitionruletable,analogoustoalogicaltruthtable,isusedtodescribe
thenext state of each ofthesecells.
There exists a neighborhood (or ^-neighborhood), Na, about each cell i
representedasa set of cells. One definition of such a neighborhoodis,
Na(i)= {C(r):\r-i\<a) (3.1)
where a isreferred toastheradius oftheneighborhood. If, for example, aisset to 1, then Nx(i) = {C{i
-l),C(i),C(i + 1)}. This
definition of a neighborhood presses the immediate need to define boundary conditions. Classically, theseone-dimensionalstrips of cells are interpretedas ringsandthe boundaryconditionsfor d>0 are given as:
C(l-d)=C(N+l-d) (3.2)
3-1.Cellularnon-linear networks 19
Withtheserulesandaset ofinitialconditions,a complete view ofthesystem canbepresentedthrough time. Forexample,giventherule table (fora= 1):
neighborhood state: 000 001 010 011 100 101 110 111
output (y): 0 10 10 10 1
the followingnetwork withN= 11 wouldchangefrom
1 0 1 0 0 1 1 1 0 1 0
0 1 0 0 1 1 1 0 1 0 1
to
By definingvaryingsizesof a and differenttransition functions (ortables), oneissaidtoprogramthesystem. It is easy toimagine a program (ruletable) toperformoperations suchasleftand rightlogicalshifts. Melanie Mitchelland her colleagues developed somewhat more interesting programs by employing genetic algorithmstosearchfor(or evolve)programsthatwould performcertain tasks[15]. One example of such programsisthe "majorityrule"
program that determineswhethertheinitial stateofthe latticeconsisted of more ones than zeroes. Iftherewas a majorityofones, all cells would eventuallyturnto one; otherwise, theoutput wouldturntoall zeroes.
Althoughthesecellular automata programs are noteasilydevised,theentire system possessessomevery redeemingattributes:
ParallelProcessing. Althoughtheprocessingoccursincrementally,it isdone in a completely parallel fashion
-that is, each cell is doing itsbest to solve the problem on each increment oftime.
This fact is demonstrated nicely by the majority rule program mentioned
above. The serialform ofthis algorithm would process each cell individually to accumulate thenumberofonesin theentirelattice. Itwould thenhave to comparethatnumbertothenumber of cellsinthelattice. Thus,the lengthof executiontimeforthisalgorithmis linearlydependentonthesize ofthelattice (N).
Inthe case ofthe cellularautomataprogram, thelength ofexecution time isdependent on theneighborhood size and therandomnessofthe initialdata [15].
Furthermore, theserial algorithm requires priorknowledgeofthe totalsize
ofthe system. Thesystem of cellular automatadoes not needthis knowledge becauseofthenext important attribute:
Integrated Communication. Thisadvantageisone ofthemoreinterestingtraits of cellular automata. Sincethesize of a neighborhoodisfinite,andtherequired
ac-3-i. Cellularnon-linear networks 20
complished by transferring state from one cell to another in a relay fashion untilithaspropagatedtothe cellthatneedsit. Ofcoursethisprocess requires timeandthe efficiencyofthecomputationisdirectlyrelatedtothe efficiencyof
thecommunications scheme. Itis, nonetheless, a robust system inthat itcan tolerateintermittent failures.
Efficient Implementation. The cellular automata network is both a compu tational and storage medium. Furthermore, the implementation of each cell is identical. Implementationsofdifferent programs rely on changing only the
transition rules. Thispromises a cheap way ofmanufacturing thesecomputa
tional devicesifone is able to devise a simpleway ofchanging the ruletable
while maintaininga consistent structure of cells.
However, one must notforget the disadvantages. It is verydifficult to de
vise correct programs fora given task, and some tasksmay not be able tobe
programmed atall. Onecan imaginethat thedesignof a programtoperform binary arithmeticmaybesuch asufficientlydifficult task.
3.1.2. Cellular nonlinear networks
The advantage of a cheap and robust parallel processing architecture is too
enticingtoignore. LeonChuaandLinYangtookituponthemselvestoextend theideasof cellularautomata. Theyextendedtheidea in three importantways.
Continuous states Instead of each state being a binary state, Chua and Lin
extendedthestate of each celltobeanyreal number.
Continuous time Whereas cellular automatadescribes state transitions as in
stantaneousstep-wise
changes, aCNN's states are continuousthroughtime.
Addition ofInput and Bias The state of a cell is now (optionally) dependent
on inputs toitsneighborhood and onbiasconditions.
Thestate equation of a cellC(i) in thea standard CNN isgiven as [5]:
xt =
-xi+
^A(i,r)yr[C(r)
eNa(i)}+J2B(i,r)ur[C(r)
Na(i)]+zu (3.4)r r
wherexr, yr, ur,and zTare the state, output,input, andbiasofthecell C(r).
ThefunctionsA(i,r) andB(i,r)givetheweight orinfluencebetweenC(i) and
its neighboringcells (includingitself).
Furthermore, thesummation notationisthat ofDonald E. Knuthgiven in
"TwoNoteson
Notation"
(http://www-cs-faculty.stanford.edu/~knuth/
preprints.html). Thisnotationis basedontheoperators[and] whose values is 1 if thelogicstatement withinthem istrue,and0otherwise. Inthis context,
3.1. Cellularnon-linear networks 21
Figure3.1. Exampleoutput function definedbytheequationy(x) = \\x+1|
\\v l| =i(|x+l|-|x-l|
Thisstate equation canbecomparedtothestateequation of an equivalent cellularautomata system:
Xi(t+1)
-Xi(t) =
Y,
Hhr)xr{t)[C(r] Na(i)} (3-5)wheret isan integerindicator oftime.
Generally speaking, the Aand B functions can vary with respect to time and the specific cells upon which theyare applied. In practice, however, they
remain constantbetween cell groups. A cell group is the simplya cell and all thecellsin itsneighborhood. Whenthefunctionsareindependentofindividual cell groups andtime,the are referredtoastheCNN's template(ortemplates). As the inputand bias values are free tochange, attention mustbe turned toward the important definition ofthe output function y. Fortunately, (3.5) gives some hintthat theoutputs shouldbestronglyrelatedto thestate. Chua
andLin defined theoutput as,
y=h(x) = -\x+1\
1, , 1
2l*-H
= H II (3-6)
This functiontakes the formgiven in Fig. 3.1.
Therefore,forstatesintherange(1, 1)theoutputisequaltothestate. For largeror smaller statevalues, the cell issaid tobesaturated, andthenoutput takesonthevalue sgn(x). Thisfunction isessentiallyahold-over fromtheori gins ofCNNswhentheywereusedtomodel neuralnetworks. However, nearly
all literatureon thesubject continues to use this function or adifferentiable formofit.
Theuse ofthe saturatingoutputfunctioncanalsobetracedbacktoimple
mentationdetails. Aswillbepresentedshortly, thesimplesthardwareelement to implement the output function is an operational amplifier configured for
unity-feedback with built-in or predetermined saturation points. It is recog
nized then, that the output function is simply a convenient function that is
representative ofthe state andeasytoimplement.
[image:28.529.187.346.99.187.2]3-i. Cellularnon-linearnetworks 22
Ofcourseitwouldbepossibletodefiney=x andimplementthatrelationship.
In fact, the saturating output function exists for the important purpose of
stability
-it lim-itsthepossibility ofstatesever increasingwithoutbound.
3.1.3. Higher-order configurations
The ideas ofCellular Nonlinear Networks is easily extended beyond that of a
stringofcells to thatofarbitrarygeometriesin arbitrary dimensions. In fact,
most in-depth studies of CNNs have been performed on 2D regular grids of
dimensions N x M [5].
The extensionto higher dimensions is accomplished by slightly modifying
thestate equation andredefiningwhat constitutesa neighborhood. Forexam
ple, the state equation and neighborhood definition for a cell in a3D regular
grid couldbegiven as:
Xi,j,k=
-xt,j,k+
Y/A(i,j,k,r,s,t)yrtSit
[C(r,s,t) Na(i,j,k)\+r,s,t
^2B(i,j,k,r,s,t)uriStt[C(r,s,t)
eNa(i,j,k)]+ Zij,k (3.7)and
Na(i,j,k) =
[C(r,s,t)
: V(r-*)2+(.s-j)2+(*-fc)2 <a)
(3.8)wherean alternativeformoftheneighborhoodcouldbegiven as
Na{i,j,k)= {C(r,
8,t) : maxflr -i\,\s
-j\,\t
-k\)<a} (3.9)
The firstoftheseneighborhooddefinitions disallows diagonalneighborswhereas
the secondspecifically allows them. Such definitions dictate the exact sizeof
theneighborhood andthusdictate thesize ofthe Aand B templates.
Two-layertwo-dimensionallattices
One ofthe first publicized uses ofCNNs beyond imagemanipulation was the
initiation and control of self organization or patternformation. The idea is to
initiateand sustain adesiredcomplex pattern(asrevealedthrough theoutput
of allthecells) by asimple set ofinputs.
It has beenrecognizedforsometime thatnatural patterns canbegenerated
by mathematical partial differential equations called reaction diffusion (RD) equations. Thesegenerated patterns are referredtoasTuring patterns [16].
However, reaction diffusion equations are much more than simply pattern
generators. They are a model ofthekinetic distributionofsome elemental in
someenvironment. The reaction diffusionequations are a macroscopic view of
3-i.Cellularnon-linear networks 23
tomodel. The most commonformofthereactiondiffusionequationis,
dc
=f(c) +Z)V2c (3.10)
wherec isthe vector of elementalconcentrations, f represents thereactionor
generationprocess, D isa matrix ofdiffusioncoefficients, andV2 isthespatial Laplacian operator. In3D Cartesianspace, theLaplacianisdefined as
n2
d2 d2 d2
.
,
v =dx~2+W2 + dT2' (3ai)
where,here,x yand z representthethreespatial coordinates. FromtheLapla cian andthepartialderivativewith respecttotime,itisobviousthat thisequa tionisspatial-temporal elemental concentrations canvary in bothspace and
time.
Turning back, one can generate patterns under certain circumstances by
utilizing the reactiondiffusion equations oftwo elementals. Sometimes, these elementalsarereferredtoasactivatorAandinhibitor/; however,thischoicein
vocabulary iscompletelyarbitrary. Whatis actuallydesired isa set ofopposing
elementals. Whenthese twosides arelefttointeract,then theirprogress canbe observedbysimply differentiatingbetweenthe twodifferentelementaltypes.
Thetwo-layer two-dimensionalCNNwasdevelopedtomodelthese opposing
elementals. Oneofthelayersrepresentstheactivators andtheother represents
the inhibitors. Thetwo lattices aretwo-dimensional becausetheentire system
canbereadilydisplayedatdifferent time increments in itsentirety.
Two-cell system
To beginthedevelopment oftheCNN, firstconsiderthe very simplycase ofa two-cellnetwork. Let eachcellberepresentedbythefollowingstateequations:
a =
~xa+(1+H)ya-syb+ za (3.12)
xb=
-xb+ sya +(l+ n)Vb +*b (3-13)
where s andparearbitrary(fornow)constants. Thesestate equations represent
only the reaction part ofthe RD equation (3.10). It has been proven [2] that thefirststeptowardpatternformation isthegeneration of a stable limitcycle.
A limitcycleissimplyperfectoscillatorybehaviorofthe stateovertime.
The two-cell system above will reach this oscillatory behavior for certain
values ofs andjjl. Specifically, it has beenshown thata stablelimit cycle will be achieved about an equilibrium point if 0 <p< s. Furthermore, theradius
or amplitude, R, ofthelimitcycle will beapproximatelyequalto 1 + n +s. To visualize all of this, the two-cell system is simulated for p. = 0.7 and
s = 1 (as in [2]) over 30 seconds with the initial conditions that xa = 1 and
3-i.Cellularnon-linear networks 24
Time(s
Figure3.2. Stateand graphs of cell a (dashed) and cellb (solid) fromthe two-cell network implementing thereaction state equations. Calculated for s = 1 andp= 0.7.
stablelimitcycle.
Extension to CNNs
Each ofthe cells ofthetwo-cellsystem isnowextendedtobe a full 2D CNN. Thestate equations ofthe cellsin these twonetworks are givenas,
Xa;i,j Xa-ij
-\-\1~t~
H)ya\i,j SVb;i,j <
Za-\-Da{Va;i-l,j+Va.i+l.j + Va.i.j-l +Va-.i.j+l ~
^Va-.i.j),
xb;i,j=
-xb-ij+(1+n)yb;i,j+sya]ij+zb+
Db(yb;i-l,j +Vb-.i+l.j + yb;i,j-l +Vb-ij+l
-tyb;i,j),
(3-14)
(3-15)
whereeach networkismadeupofNxMcells and 1 <i<N and 1<j <M. The neighborhoods aredefinedby,
N (i,j) =
{c(r,s)
^{r-i)2+{s-j)2<\}
(3-i6)Thatis, onlyadjacent non-diagonal cells on a rectangular grid.
Each cell in the networks represents a geometric location, and its state
representstheconcentrationoftheelementalatthatlocation. Again,thereare twoelementals atwork, a andb,andtheyoppose cachother.
ThequantitiesVi-ij+yi+ij +yl,j-i +Vi,j+i-4y;j representdiscretespace
versions ofthe Laplacianoperator. Ifone considers theaxiscontainingNcells
tobethen-axis (analogoustothex-axisin thebrief Laplaciandiscussion),and
[image:31.529.110.426.101.223.2]3-i. Cellularnon-linearnetworks 25
Figure3.3. Stategraphforthetwocells ofthereaction stateequationsshowing a stable limitcycle. The initial conditionsthat xa = 1 andxb=0 are shown.
Calculated fors = 1 and
p= 0.7.
at geometric position (i,j) has beenapproximated as:
d2y
gn2
- (Vi-hj ~
Vij) -(ViJ~
Vi+i,j)
d2y
dm2 (Vij-i
~ Vi,j)
-{Vij -Vi,j+i)
(3-17)
(3-i8)
Itisimportanttonotethatthe twoCNNscan nottrulydirectlyobserveeach other. That is, the neighborhood of a cell on thea network does not include
anycells onthe6network. Onlyin thereactive part ofthestate equations can a cellfromone network observe another cell from theother network. Further, this "other"
cellislimitedtoitsdual
-thecell ontheother network atthesame geometric position asthefirst. Later (in Chapter3), theuse of dualcells will
beencapsulated intothenotion of cells with multiple states. Thisabstraction will, however, havetowait.
The so-called zero-fluxboundary conditions are implemented for this net work. This boundarycondition states that the state of non-existingcells be yondboundariesare equalto thestatesofthosecells attheboundaries. Thus,
aboundaryrepresents abarriertomotion
-zero-flux.
Using all ofthese ideas, a simulation oftwo 64 x 64 CNNs is performed.
Again valuesof 1 and0.7 are used for s andp, respectively, and the twodif fusion coefficients, Da and Db areboth set to 0.1. In additionto the diffusion
coefficients, thebiasesare now used: za issetto0.3andzb issetto0.3. This isthesame configuration as usedinthefirstexamplein [2], withtheexception
thatthe CNNsare 64x 64 insteadof44x 44.
[image:32.529.184.346.100.257.2]3-i. Cellularnon-linear networks 26
t=0s t=10s t=20s r.=30s
,
II
^^B 1 ^Bi=40s t=50s i=60s t=70s
Figure 3.4. Snapshots of cell outputs of the a layer in the two-layer
two-dimensionalsystem. Blackareas represent cells with outputs equalto 1 while
white areas represent cells with outputs equal to 1. Gray areas represent outputs inbetweentheseextremes.
small bandsprotruding fromand edge. Oneofthesebands hasthe states all
setto 1 andtheotherhas themall set to0. Alltheinitialstates ofthe blayer
are set to 0. Snapshots ofthe a layer are takenat 10 second intervals over a
period of70seconds. This data is presented asFig. 3.4.
Even though it is proven that patterns can form given the parameters
above [2], such phenomena as spirals are not easily created. These complex
patterns requirecertaininitialconditionstoform. Forinstance,ifthesystemis
initializedwithrandom state values(intherange[1,1]), thesystemillustrated
inFig.3.5 could emerge.
BoththesystemsofFig. 3.4 andFig. 3.5continuetoevolve overtime. The
first system spirals foreternity and the second system "bubbles" for eternity.
However, this reactive steady-state canbe neutralized. Ifthere exist avariety
ofhard barriers
-that is, instantaneous (ingeometry) changes in state -the
system will be dominated by thediffusepart ofthe equation. Essentially, the twoelementals mixslowly toforma uniformfinalstate.
3.1.4. Higher meaning
Some time has just been spent onthe analysis of a particular application of
CNNs. It remainstobeseen whatthat analysis revealsandhow thatanalysis
can bemimickedtoproduce solutionsforseparate problems.
Ifoneispresented with a set of spatial-temporal partialdifferentialequations
and desires to simulate the action ofthose equations, a few criteria must be
[image:33.529.114.420.98.272.2]3-i. Cellularnon-linear networks 27
t=0s t=10s t=20s t=30s
cffiift.Q
t=50s t=60s t=70s
Figure3.5. Snapshotsof celloutputs ofthealayerin the two-layersystem with
random initialstatesforall cells. Utilizesthesamenetworksasin Fig. 3.4but
begins with randominitialstates.
equationscanbemanipulatedintotheform of a cell's state equation (3.4).
1. Thetimederivativesofvariablesmayonlybe first-order. That is, dx/dt
isallowable whilednx/dtn foranyn greaterthan 1isnot.
2. Thetimederivativeof a variable mustbe dependentonlyonthe geometry
ofthe system. Thatis, a system such as
Xl =x2
X2 =
Xl
(319)
(3-20)
is strictlynot allowed while a system such as
1 =V2x2
x2 =Xl
(3-2i)
(3-22)
is allowable.
3. The A andB functionsof (3.4) generalizethestateequationtobe thor
oughly non-linear. Whilethis is perfectly acceptable when using CNNs in a simulation environment, generalized nonlinear function will signif
icantly increase the complexity of the hardware implementation. The designermust decide whether this increasein complexity outweighs the
benefitsofCNNs.
4. High-order geometricderivatives shall require a network whose cells are
[image:34.529.112.418.96.277.2]3.2. Extensionofthemodelto thehypercube 28
fidelity (highlyprecise,highly accurate)statevalues. Again,this isnot a greatissue insoftwaresimulations, but does put additional requirements on the hardware implementations. Ifthe third derivativeof states with respect to geometry is needed, then the neighborhood of each cell will have to be at least N2 and concern will begin to plague the minds of the designer of the adders. For instance, Chua reports [5] that their implementation of CNNs using integrated circuits is able to achieve a precision ofapproximately 7bits. Thisis probablysufficientfor firstand second orderderivatives,butanythinggreatermayrequire more precision.
Itis,then,reasonabletosay thatCNNscan model alargevarietyof physical phenomena(thosephenomenathatcanbeexpressed as sets of partialdifferen tialequations). Once a mathematical modelhas been formulated, its applica bilitytobeingsimulated (or analyzed) by CNNs canbereadilyascertained.
Thatis,CNNsmaybeused as aformoffinite-elementanalysis where space is discretized. Eachelementary volumeof space maybe representedby a cell with multiplestates (as dictatedbythemathematical modelofthephenomena tobeobserved or modeled).
However, the focus of this paper now turns to a different scenario -one
in which each CNN cell is, in fact, a direct analogue to a physical device. The neighborhood and observability of each cell is represented physically as
interconnects between cells (tunnelingjunctions, chemically active sites, &x.) In this scenario, the utilityof CNNs as partial-differential equation solvers is abandoned.
3.2. Extension ofthe model to the hypercube
ThediscussionofCNNs has revealedadirectmethodologyfor simulatingsys temswith large amounts ofidentical components. The CNN behavior is very promisingas ananalogsystem abletoproduce emergent computationalbehav
ior. Becausesuch a use ofthesystem (its design and analysis) requires afirm
understanding ofthe technology used to develop the network while the goal
ofthis chapter is to produce a methodology for simulating logic circuits in a technology-agnostic manner, this field of emergent computation issuperseded witha moredirect approach.
One aspect ofCNNsis focused upon: the use a state-space representation oflarge latticesofidenticalornearly identical devices. Particularly, we extend theCNNmethodologysuchthateach cell(ornodeastheywillsoonbetermed) canbe represented with multiple states. Thesecellswillthenbeusedtodesign digital logic circuitsusing the hypercube configuration.
Within the hypercubeconfigurationofthecircuit,nodes are connected with
whathavebeentermed datapaths
3.2. Extensionofthemodeltothehypercube 29
To simulate circuits constructedin thehypercube, one must select proper
state equationstomodelthenodes. In additiontothis, thegate control ofthe datapaths must alsobemodeled. GiventheCNNparadigm, thislast modelis
incorporated intothestate equationsofthenode. Toseethis,a simple example
isconsidered.
2
Figure3.6. Example node with multipleinputsanda single output.
Imagineasinglenode x withtwoinputsuxandu2and oneoutputy. Letthis
nodebe definedbythe twostates xx andx2 given bythefollowingequations:
1 =x2,
(3.23)
x2=
^-x2 -xx+ f(ui,u2), (3.24)
V=
xu (3-25)
where , r, and k are arbitrary constants. The function / must account for
the two inputs Ui and u2 and is completely dependent on the nature ofthe system. Forour purposes, let us assumethat the inputsareunderthecontrol ofcomplementarygates. Therefore,whenoneinput'sgateisopenfor dataflow,
theotherisclosed. Thefunction /must capturethisidea.
Ifthestate ofthegates are representedbyvaluesin therange0to 1 where1 represents "openfor dataflow''
and0represents "closed", thenonepossibility
for defining/ is
f{g,ui,u2) -(1
-g)ui +gu2, (3.26)
where g represents the state of the gate controlling u2. Under this model,
the gate canbe variablyopened and closed allowing fragmentsofinformation to pass through. While we will see later that there can be physical meaning attachedto thisconceptduetosuch phenomenaasquantumtunneling, fornow
we will consider this function as simply a reasonable and convenient method
forchoosingbetweeninputs.
With this definitionof/, thesecond state ofthenodex canbe