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18 Seconds to Key Exchange: Limitations of Supersingular Isogeny Diffie-Hellman on Embedded Devices

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Figure

Table 1. Cycle count including improvement factor for the prime field operations ofthe generic and assembly implementation on both architectures.
Table 2. Clock cycle count [×106] for SIDH on different processors supporting a 128-bitquantum security level.
Fig. 1. Left: Exemplary EM trace for two ladder steps. Right: Langer probe placedabove FRDM-K64F.
Fig. 2. Fixed-vs-random leakage detection test on the input point using 5000 traces.Left: no DPA countermeasure

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