Real-Time Systems Versus Cyber-Physical
Systems: Where is the Difference?
Samarjit Chakraborty
www.rcs.ei.tum.de
TU Munich, Germany
Joint work with
Technische Universität München
Control Systems Design
2
System
identification
Controller
design
Control system
analysis
system
model controller
Control Systems Implementation
System
identification
Controller
design
Control system
analysis
system model controller
Code
generation
Task
partitioning
Task mapping
& scheduling
Message
scheduling
partitioning
Task mapping
& scheduling
generation
Control system
Equations
Technische Universität München
The Design Flow
4
System
identification
Controller
design
Control system
analysis
system model controller
Code
generation
Task
partitioning
Task mapping
& scheduling
Message
scheduling
Timing & performance
analysis
Are control
objectives satisfied
NOSystem
identification
Controller
design
Control system
analysis
system model
model controller controller
Control system
Code
generation
Task
partitioning
Task mapping
& scheduling
Message
scheduling
Timing & performance
analysis
Are control
objectives satisfied
partitioning
Task mapping
& scheduling
Timing & performance
generation
NOSystem
modelSystem
modelController Design
partitioning
& scheduling
scheduling
& scheduling
& scheduling
scheduling
& scheduling
The Design Flow
Controller Design
Controller Implementation
Control theorist
Controller Design
Design assumptions!! Infinite numerical accuracy
!! Computing control law takes negligible time
!! No delay from sensor to controller
!! No delay from controller to actuator
!! No jitter
!!!
Controller Implementation
Implementation reality
!! Fixed-precision arithmetic
!! Tasks have non-negligible execution times
Technische Universität München
The Design Flow
6
Controller Design
Controller Implementation
Control theorist
Embedded systems
engineer
Controller Design
These are implementation details
Controller Implementation
Model-level assumptions
are not satisfied by
implementation
Not my problem!
Semantic Gap
Controller Design
Controller Implementation
Semantic gap
between
model and implementation
Research Questions?
!
!
How should we quantify this gap?
Technische Universität München
Current Design Flow
8
High-level requirements
Applications
HW/SW architecture
Multiple processor units (PUs) connected via a shared bus connected via a shared bus
!
Controller design
Model
Code synthesis & Task partitioning T1 T2 T3 T4 Task mapping m2 m1 mm2 m m1 Task and Message scheduling code generation
Current Design Flow
High-level requirements
Applications
HW/SW architecture
Multiple processor units (PUs) connected via a shared bus connected via a shared bus
!
Controller design
Model
Code synthesis & Task partitioning T1 T2 T3 T4 Task mapping m2 m1 mm2 m m1 Fixed-precision arithmetic
Multiple processor units (PUs) connected via a shared bus connected via a shared bus
Technische Universität München
Current Design Flow
10
High-level requirements
Applications
HW/SW architecture
Multiple processor units (PUs) connected via a shared bus connected via a shared bus
!
Controller design
Model
Code synthesis & Task partitioning T1 T2 T3 T4 Task mapping m2 m1 mm2 m m1 Task and Message scheduling Fixed-precision arithmetic
Delay / jitter message loss Multiple processor units (PUs)
connected via a shared bus connected via a shared bus connected via a shared bus
Unreliable hardware soft-errors, aging,
!
Multiple processor units (PUs)
connected via a shared bus T
Delay / jitter message loss Multiple processor units (PUs)
Unreliable hardware soft-errors, aging,
Multiple processor units (PUs) T
Multiple processor units (PUs) Multiple processor units (PUs)
Delay / jitter message loss Unreliable hardware soft-errors, aging,
Algorithm & Architecture designed separately
Cyber-Physical Systems
!
!
Tight interaction between computational (cyber) and
physical systems
!
!
Isolated design of the two systems leads to:
!
!
Higher integration, testing and debugging costs
!
!
Poor resource utilization (e.g., unnecessarily high sampling
rates)
!
!
Question:
!
!
Can existing techniques from real-time & embedded systems be
directly applied? We know hardware/software co-design
!
!
Answer:
Technische Universität München 12
DC motor:
Objective:
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0 10 20 30 40 50 60 70 Seconds S peed 33% Drop 25% Drop 0% DropA fraction of feedback signals being dropped
Controllers can be designed to be robust to drops and deadline-misses
The deadlines are usually not
hard
for control-related messages
10 15 20 25 30 35 40 45 50 S peed Disturbance h =20ms h =200ms
(1)!The computation requirement at the steady state is less, i.e., sampling frequency can be reduced (e.g., event-triggered sampling)
(2)!The communication requirements are less at the steady state, (e.g., lower priority can be assigned to the
feedback signals)
Sensitivity of control performance depends on the state of the controlled plant
Technische Universität München
Bottomline
!
!
Real-time Systems View
!
!
Meeting deadlines is the center of attraction
!
!
CPS View
!
!
Deadline takes the back seat
!
!
As a result, the design space becomes bigger
!
!
Resulting design is better, robust, cost-effective
!
14
Control performance constraints reduced to
satisfaction of real-time constraints
What about NCS?
•
!
Take network characteristics into account when
designing the control laws
•
!
Packet drops, delays, jitter
!
Plant T3 T4 Sensor T1 T2 m1 m2 m3 + - Controller
Network
Technische Universität München
What about NCS? Answer: ANCS
•
!
ANCS – We can design the network
•
!
By taking into account control performance constraints
•
!
Problem: How to design the network?
•
!
Given a network, how to design the controller?
•
!
NCS problem
•
!
Co-design Problem:
How to design the network and
the controller together?
16 Plant T3 T4 Sensor T1 T2 m1 m2 m3 + - Controller
Network
Technische Universität München
Embedded control systems
18 Physical System Actuators Sensors Shared Communication Shared Computation
Embedded platform: Control software
Continuous-time Discrete-time D/A A/D Real-time applications Multimedia applications !
Dynamical Systems: DC Motor
The time dependence of the various
states
of
dynamical systems
is
described by a set of difference or differential equations.
i
J = moment of inertia of the rotor
b = system damping ratio,
K = EMF and Torque constant, R = armature resistance,
Technische Universität München
System models
•! Input-output model (Transfer function) – suitable for frequency domain analysis
•! The relation between input u(t) and output y(t) (observed variable – e.g., position, temperature)
•! The analysis is done in frequency domain by taking Laplace transform
where s is the complex frequency
•! State-space model – suitable for time domain analysis
•! Represent the system in terms of a number of internal states --
Computing state-space model
(1) System dynamics:
(3) States:
(4) State-space model: (2) Input and output: Example
Input
Output
Technische Universität München
Laplace Transform
Computing transfer function
(1) System dynamics:
(3) Take Laplace transform with zero initial condition:
(4) Transfer function: (2) Input and output: Example
Input
Output
Technische Universität München
State-space to Transfer Function
24
Laplace transform And x(0) = 0
State-space model
Poles and Zeros
•! Given transfer function , the system poles are roots of the polynomial D(s) and the system zeros are roots of polynomial N(s)
•! Example
Zeros: -0.2, -1 Poles: 1, 2, 3
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Eigenvalues of a Matrix
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Characteristic equation
•! Alternatively, system poles can also be computed from the state-space model by computing Characteristic Equation which is given by:
•! System poles are the roots of Characteristic polynomial
•
!
System
poles
are the
eigenvalues of A
Stability
There are various notions --
•! Bounded-Input Bounded-Output (BIBO) stability •! Stability in the sense of Lyapunov
•! Asymptotic stability •! Exponential stability •! !
Our lecture is mainly confined to the following aspects: (1)!|x(t)|, |y(t)|, |u(t)| < ! (all signals are bounded), (2)!y(t) " 0 as t " ! (asymptotic stability)
Technische Universität München
Implications of System Poles on Stability
•
!
Consider the following system (discrete model)
•
!
Intuition behind the continuous time mo
Stability condition: continuous-time case
•! Stable system
All poles should have negative real part •! Marginally stable system
One or multiple poles are on imaginary axis and all other poles have negative real parts
•! Unstable system
One or more poles with positive real part.
Stable Unstable Marginally stable
Technische Universität München
Stability
•! Example Poles at +1, +2, +3 Unstable! 32 •! ExamplePoles at 0, 0 Marginally stable •! Example
Summary
System dynamics:
State-space Transfer function
Poles at +10.9, -3.4 Roots of
Technische Universität München
Summary
How to compute system poles?
1.! Roots of
2.! Eigenvalues of system matrix A
3.! Solution of system characteristics equation
4.! Roots of D(s) for the transfer function
34
•! Stable system
All poles with negative real part •! Marginally stable system
One or multiple poles are on imaginary axis and all other poles have negative real parts
•! Unstable system
•! We have a linear system given by the state-space model
•! For n-dimensional Single-Input-Single-Output (SISO) systems
•! Objective
•! u = ?
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•! Control law
r = reference
K = feedback gain
F = static feedforward gain
•! How to design K? •! How to design F?
36
•! Choose the desired closed-loop poles at
•! Using Ackermann’s formula we get
•! Poles of (A+BK) are at
Technische Universität München
Static Feedforward Gain
38
Closed-loop system
F should be chosen such that y(t) " r (constant) as t " ! i.e.,
Using final value theorem
Taking Laplace transform
Digital Platform: Sample and Hold
u(t) x(t) D/A A/D Processor clock u(tk) x(tk) Control AlgorithmD/A " digital-to-analog converter A/D " analog-to-digital converter Hold Continuous-time Sampler
Technische Universität München 40 x(t) x(tk) u(t) t "
t "
tk tk+1 t k+2
ZOH Sampling
Sampling period = hZOH periodic sampling with period = h
Technische Universität München
•! Given system: •! Control law:
1.! Check controllability of (!,") " must be controllable. # must be invertible.
2.! Apply Ackermann’s formula 3.! Feedforward gain
42
Objectives
(i)! Place system poles (ii)! Achieve y " r as t " ! (iii) Design K and F
•! Given
•! The control input such that closed-loop poles are at
•! Using Ackermann’s formula:
Technische Universität München
Continuous Vs Discrete Time
Continuous-time ZOH periodic sampled
44
Input: Input:
The Real Case
Loop start u = K*[x1(i);x2(i)] + r*F; xkp1 = phi*[x1(i);x2(i)]+ Gamma*u; x1(i+1) = xkp1(1); x2(i+1) = xkp1(2); Loop end Tm: measure Tc : compute Ta : actuate Feedback loopTechnische Universität München
Control Loop
46 Tm Ta Tc h= sampling period $ = sensor-to-actuator delay Sensor reading Actuation Tm : measure Tc : compute Ta : actuate Feedback loopControl Task Triggering
Tm Tc Ta
•! In general, Tm and Ta tasks consume negligible computational time and are time-triggered
•! Tc needs finite computation time and is preemptive
Technische Universität München
Control Task Model: Constant Delay
48 Deadline Dc Tc preemption wait Tm Sampling period = h Tm Ta
Design Steps
Real-time tasks + control applications
Overall response time analysis
Task models
Schedulability test +Timing properties
Controller design
Partial
redesign
Stage I
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Response Time Analysis
50
•
!
Periodic tasks with
fixed-priority
scheduling
•
!
Solution to a fixed point computation
Controller design steps for D
c
< h
Continuous-time model
New discrete-time model:
Sampled-data model
Controller design based on the
sampled-data model
ZOH sampling with period h and constant sensor-to-actuator delay Dc Step I
Technische Universität München 52
Dc
Tc
t
kt
k+1
Snapshot of One Sampling Period
x(t
k)
x(t
k+1)
Technische Universität München
Sampled-data Model
56
Continuous-time model
ZOH sampling with period h and constant sensor-to-actuator delay Dc
!
End of Step 1
•! We define new system states:
•! With the new definition of states, the state-space becomes
where the augmented matrices are defined as follows
Technische Universität München
•! Given system: •! Control law:
1.! Check controllability of " must be controllable. # must be invertible where # is defined as follows
2.! Apply Ackermann’s formula 3.! Feedforward gain
58
Objectives
(i)! Place system poles (ii)! Achieve y " r as t " ! (iii) Design K and F
Controller Design for D
c
< h
Summary: Design for D
c
< h
Continuous-time model Sampled-data model Augmented system ControllerTechnische Universität München
A More Complex Case
(involves stability analysis of switched systems)
CPS-Oriented Design Example
!
!
Control over FlexRay
!
!
FlexRay is made up of time-triggered (TT) and
event-triggered (ET) segments
!
!
Conventional design
!
!
Use time-triggered segment for control messages – one slot for
each control message
!
!
Expensive
Challenge:
Technische Universität München 62
FlexRay – Event Vs Time-triggered
task
message
task
x
Asynchronous
task
message
task
Synchronous
Jitter, lost/unused data
Predictable
Communication Schedules
!
!
The temporal behavior is
predictable
!
!
The bandwidth utilization is
poor
!
!
Availability is limited
!
!
The temporal behavior is
unpredictable
!
!
The bandwidth utilization is
better
!
!
Availability is higher
Time-triggered (TT)
Event-triggered (ET)
Conventional design: Use TT for control-messages
Problem:
Technische Universität München
Quality of Control vs. System State
"! The performance of a control application is more sensitive to the applied control input in transient state compared to that in steady-state
"! ET communication for the control signals is good enough in the steady-state
"! TT communication is better suited for transient state
64
r
t
Transient State Steady State
Observations
Mode Switching Scheme
Plant in Steady-State Plant in Transient Mode Change Protocol Plant in Transient Plant in Steady- StateTT :
ET :
Schedule :
Schedule :
Controller :
Controller :
S
" "
!
S
"#
!
K
"#
!
K
" "!M
! !M
!"x
[
k
]
!x
[
k
]
> E
"# Mode Change Request AfterSchedule :
Controller :
S
"
!
S
"
S
#
K
"
!
K
"
K
#
Schedule :
Controller :
S
"
!
S
"
S
"
K
"!K
"K
"Technische Universität München
Example
!
!
We consider two distributed control applications
communicating via a hybrid communication bus
66
!
!
We apply state-feedback controller for both, i.e.,
Performance with TT Communication
Control Gains
Quality of control
C
1Technische Universität München
Performance with ET Communication
68
Control Gains
Quality of control
C
1C
2Performance with Switching
Quality of control
C
1C
We have one shared TT communication slot. The control messages are transmitted via ET communication when they are in s t e a d y s t a t e a n d s w i t c h e s t o T T communication when transient state occurs due to some disturbance
Technische Universität München
Experimental Setup
Mixed time-/event-triggered
Purely event-triggered Purely time-triggered
Technische Universität München
Controller Design with Signal Drops
Actuator: u[k]
--
f(x[0]) f(x[1]) f(x[4]) 1 = !! " ## $ h % 1 = !! " ## $ h % 1 = !! " ## $ h % 1 = !! " ## $ h % x[0] x[1] x[2] x[4] x[5] f(x[2]) x[3] Sensor: x[k] f(x[3]) 1 = !! " ## $ h %Control Law for stable samples
1 = !! " ## $ h %
]
1
[
]
[
]
1
[
k
+
=
Ax
k
+
BFx
k
!
x
]
1
[
]
[
k
=
Fx
k
!
u
Control Law: Closed-loop Dynamics:h
!
!
"
0
Stable samples:Technische Universität München
1
2
3
4
5
0
Sampling instant: k Actuator: u[k]--
f(x[0])
f(x[1])
f(x[4])
stable
stable
stable
unstable
stable
1 = !! " ## $ h % 1 = !! " ## $ h % 2 = !! " ## $ h % 1 = !! " ## $ h % 1 = !! " ## $ h %
x[0]
x[1]
x[2]
x[4]
time
x[5]
f(x[2])
x[3]
Sensor: x[k]f(x[2])
1 = !! " ## $ h %Control with
stable
and
unstable
Samples
!
!
"
!
!
#
$
%
&&
'
((
)
=
&&
'
((
)
*
=
samples
unstable
or
h
if
samples
stable
or
h
if
k
Fx
k
u
,
1
0
1
]
1
[
]
[
:
Scheme
Control
Proposed
+
+
Asymptotic Stability
The distributed control application is asymptotically stable as
long as the ratio between number of stable and unstable
samples is greater than or equal to certain upper bound, i.e.,
the condition for guaranteed asymptotic stability is (
!
is a
positive integer)
µ
!
samples
unstable
of
number
samples
stable
of
number
Therefore, we allow a fraction of samples to be
unstable
or violate
the deadlines but still guarantee asymptotic stability!
µ
Technische Universität München
!"#$%&'()*+
( !" #" $" %" &" '" (" )" *" 1 =!
!
=12
=
!
3
=
!
1 =!
+,-./0"
12345-" 6,12345-"!!
"
##
$
=
h
%
&
!
723485820"9:"2;-"<9,2.95"1012-="81"431->"9,"2;-":3<2"2;32"2;-"" 1012-="!"!#$%&'()!*+,"-./"*>-<.-31-1"?82;"@=-" +,-./0">-<.-31-1"-A-,"8:"2;-.-"81"59<35"8,<.-31-"" 8,"-,-./0"4-<361-"9:"6,12345-"13=B5-1"Intuitive Proof
Intuitive Proof – Illustration
"
!
Does exist for any discrete-time system?
!
!
Yes.
Let u assume the closed-loop dynamics at: Stable samples:
Unstable samples:
As the closed-loop dynamics is stable at the stable samples,
Resultant Dynamics
Technische Universität München
Example: Control over FlexRay
We have found that the closed-loop system with the above
Controller is stable as long as the ratio between the number of
stable and unstable samples
µ
!
52
ms
Interval
Sampling
k
as
k
x
stability
Goal
Design
k
x
k
Fx
k
u
Controller
Poles
loop
Open
k
u
k
x
k
x
Plant
40
:
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],
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#
$
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'
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(
)
+
$
$
$
%
&
'
'
'
(
)
#
#
#
#
#
#
=
+
Scheduling: Example 1
Technische Universität München
Scheduling: Example 2
72345-"13=B5-1" G,12345-"13=B5-1" 7012-="81"12345-"31""x[k]"0 as k"!
H-.238,"91<8553@9,1">6-"29"2;-"B.-1-,<-" 9:"6,12345-"13=B5-1"
Scheduling: Example 3
Technische Universität München
Current Design Flow
82
High-level requirements
Applications
HW/SW architecture
Multiple processor units (PUs) connected via a shared bus connected via a shared bus
!
Controller design
Model
Code synthesis & Task partitioning T1 T2 T3 T4 Task mapping m2 m1 mm2 m m1 Task and Message scheduling Fixed-precision arithmetic
Delay / jitter message loss Multiple processor units (PUs)
connected via a shared bus connected via a shared bus
Unreliable hardware soft-errors, aging,
Open Issues
•
!
Integration of control theory, program analysis,
embedded systems modeling & analysis
•
!
How to
synthesize
implementation platform & software
that minimizes error?
•
!
Cross-layer modeling & optimization techniques
necessary (interplay between delay & numerical
accuracy)
•
!
Open issues in hardware/circuit design
•
!
dynamically adjust precision during runtime or based on plant
state (using reconfigurable computing)
Technische Universität München
Concluding Remarks
84