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Implementing AUTOSAR Scheduling and Resource Management on an Embedded SMT Processor

Florian Kluge, Chenglong Yu, J¨org Mische, Sascha Uhrig, Theo Ungerer

Chair of Systems and Networking University of Augsburg

12th International Workshop on

Software and Compilers for Embedded Systems

(2)

University of Augsburg Chair of Systems and Networking

Outline

1 Motivation

2 Problems

3 Solution

4 Conclusion

(3)

Outline

1 Motivation

2 Problems

3 Solution

4 Conclusion

(4)

University of Augsburg Chair of Systems and Networking

Motivation (I)

Automotive Software Standards

AUTOSAR: AUTOmotive Open System ARchitecture

Provides common platform for automotive applications

Increases interoperability and interchangeability

Upcoming Processor Architectures

Simultaneous MultiThreading (SMT) Cores

Multi-Core Processors

→ real parallelism!

(5)

Motivation (I)

Automotive Software Standards

AUTOSAR: AUTOmotive Open System ARchitecture

Provides common platform for automotive applications

Increases interoperability and interchangeability Upcoming Processor Architectures

Simultaneous MultiThreading (SMT) Cores

Multi-Core Processors

→ realparallelism!

(6)

University of Augsburg Chair of Systems and Networking

Motivation (II)

Is AUTOSAR fit for SMT?

NO!

What can we do?

How can AUTOSAR benefit from SMT?

(7)

University of Augsburg Chair of Systems and Networking

Motivation (II)

Is AUTOSAR fit for SMT? NO!

What can we do?

How can AUTOSAR benefit from SMT?

(8)

University of Augsburg Chair of Systems and Networking

Motivation (II)

Is AUTOSAR fit for SMT? NO!

What can we do?

How can AUTOSAR benefit from SMT?

(9)

Motivation (II)

Is AUTOSAR fit for SMT? NO!

What can we do?

How can AUTOSAR benefit from SMT?

(10)

University of Augsburg Chair of Systems and Networking

AUTOSAR Scheduling

Basic and Extended tasks

Task states: suspended, ready, running, waiting (only extended tasks)

Priority based scheduling: highest priority task is executed

Designed for singlethreaded processors

(11)

AUTOSAR Scheduling

Basic and Extended tasks

Task states: suspended, ready, running, waiting (only extended tasks)

Priority based scheduling: highest priority task is executed

Designed for singlethreaded processors

(12)

University of Augsburg Chair of Systems and Networking

AUTOSAR Resource Management

Mutual exclusion on resource access

Prevent priority inversion and deadlocks

Resource access never results in waiting state

→ Priority Ceiling Protocol (PCP)

(13)

SMT Processor

Simultaneous MultiThreading

issue instructions of different threads in one cycle

Use latencies of one thread to execute another

Prioritised slots

Real parallelism

(14)

University of Augsburg Chair of Systems and Networking

Challenges

Goal: Earlier execution of low-priority tasks

Challenges

Preserve WCET analysability

Preserve externally observable behaviour of highest-priority task

Lower-priority tasks can be interrupted by higher-priority tasks!

As few changes as possible to standard definition

(15)

Outline

1 Motivation

2 Problems

3 Solution

4 Conclusion

(16)

University of Augsburg Chair of Systems and Networking

Forward Implementation

SMT processor with n thread slots

Issue n highest priority tasks

Keep execution order

Map AUTOSAR task priorities to thread priorities

(17)

Resource Management and Parallel Execution

PCP relies on singlethreaded program execution

No prevention from priority inversion and deadlocks in multithreaded program execution

(18)

University of Augsburg Chair of Systems and Networking

Related Work: Resource Management

Resource Management for Multiprocessor Systems

Multiprocessor Priority Ceiling Protocol

Multiprocessor Stack Resource Policy

LP-Time Inheritance and Returning

No transfer of processing time possible on SMT No nested resource accesses possible

(19)

Related Work: Resource Management

Resource Management for Multiprocessor Systems

Multiprocessor Priority Ceiling Protocol

Multiprocessor Stack Resource Policy

LP-Time Inheritance and Returning

No transfer of processing time possible on SMT No nested resource accesses possible

(20)

University of Augsburg Chair of Systems and Networking

Data Synchronisation

Scheduler

Shared data structures (FIFO queues)

NO lock variables available!

Further synchronisation necessary

Related Work

Lamport (Bakery Algorithm), Peterson’s Algorithm:

Spinning or sleeping/suspending Spinning wastes processing time

Suspending can violate task state model

Lock-free algorithms

Special instructions necessary

Compare&Swap or Load Link/Store Conditional

(21)

University of Augsburg Chair of Systems and Networking

Data Synchronisation

Scheduler

Shared data structures (FIFO queues)

NO lock variables available!

Further synchronisation necessary Related Work

Lamport (Bakery Algorithm), Peterson’s Algorithm:

Spinning or sleeping/suspending Spinning wastes processing time

Suspending can violate task state model

Special instructions necessary

Compare&Swap or Load Link/Store Conditional

(22)

University of Augsburg Chair of Systems and Networking

Data Synchronisation

Scheduler

Shared data structures (FIFO queues)

NO lock variables available!

Further synchronisation necessary Related Work

Lamport (Bakery Algorithm), Peterson’s Algorithm:

Spinning or sleeping/suspending Spinning wastes processing time

Suspending can violate task state model

Lock-free algorithms

(23)

Outline

1 Motivation

2 Problems

3 Solution

4 Conclusion

(24)

University of Augsburg Chair of Systems and Networking

Task Filtering

Execute only tasks that do not use the same resources

Deferred tasks are buffered in task filter

Internal task state resource ready

Task has highest priority of all tasks accessing the same resources

(25)

Task Filtering: Example

T1 T2 T3 T4 T5 T6 T7 T8 R1 X

R2 X X

R3 X

R4 X

R5 X X

R6 X X

R7 X X X

R8 X

SC o o o o o o

(26)

University of Augsburg Chair of Systems and Networking

Discussion

Tasks T1, T2, T3

Priorities P1> P2 > P3

2 thread slots

T1, T3 running

T1 and T2 have resource conflict

(27)

Discussion (I)

No resource conflict between T2 and T3

(28)

University of Augsburg Chair of Systems and Networking

Discussion (II)

Resource conflict between T2 and T3 on R

T3 non-preemptable

(29)

Discussion (III)

Resource conflict between T2 and T3 on R

T3 preemptable

T3 not holding R or other with CP > P2

(30)

University of Augsburg Chair of Systems and Networking

Discussion (IV)

Resource conflict between T2 and T3 on R

T3 preemptable

T3 holding R

(31)

Consequences

Start of high priority tasks may be delayed, but time-predictable

Once running, behaviour is same as in single-threaded processor for highest priority task

Lower prioritiy tasks: may start earlier, but with lower performance

Time for scheduling increases about 100 cycles - total time about 1.600 cycles (on prototype)

Hardware requirement: slot-to-slot interrupt

(32)

University of Augsburg Chair of Systems and Networking

Synchronisation of Scheduler Data

Scheduler’s FIFO-Queues accessed from every slot

Must ensure consistency

Use lock-free linked lists

HW Requirement: Compare&Swap or Load Link/Store Conditional instructions

Work in progress

(33)

Outline

1 Motivation

2 Problems

3 Solution

4 Conclusion

(34)

University of Augsburg Chair of Systems and Networking

Summary & Conclusion

Extensions to AUTOSAR

Task Filtering method prevents resource conflicts

New state resource-ready introduced

Necessary hardware extensions

CAS

Slot-to-slot interrupts

⇒ Timing behaviour of highest-priority task is preserved

Conclusions

Current AUTOSAR not ready for multiprocessing

More changes on specification necessary

This work is just one step on the road...

(35)

Summary & Conclusion

Extensions to AUTOSAR

Task Filtering method prevents resource conflicts

New state resource-ready introduced

Necessary hardware extensions

CAS

Slot-to-slot interrupts

⇒ Timing behaviour of highest-priority task is preserved Conclusions

Current AUTOSAR not ready for multiprocessing

(36)

University of Augsburg Chair of Systems and Networking

Future Work

Lock-free Algorithms

Implementation and evaluation

Benchmarking

Current benchmarks just look at performance

Design benchmark to test resource accesses

Integration with Multi-Core Research

MERASA project (Multi-Core Execution of Hard Real-Time Applications Supporting Analysability)

(37)

Thank you!

Any Questions?

References

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