C}omparative Analysis of Different Digital Modulation Techniques on the Basis of Their Bit Error Rate in {VHDL

Comparative Analysis of Different Digital Modulation

Techniques on the Basis of Their Bit Error Rate in

VHDL

Rashmi Mongre

MTECH Scholar, Department ECE, LNCT College, Bhopal Email: [email protected]

Monika Kapoor

Associate Prof., Department ECE, LNCT College, Bhopal Email: [email protected]

Abstract – In digital communication system design, the main objective is to receive data as similar as the data sent from the transmitter. It is important to analyze the system in term of probability of error to view the system's performance. Each modulation technique has different performance while dealing with signals, which normally are affected with noise. General explanation for BER is explained and simulated in this paper. It focuses on comparative performance analysis of BPSK, QPSK, 8PSK and 16PSK i.e. Mary PSK system where the value of M=2, 4, 8 and 16. VHSIC Hardware Description Language (HDL) was used for committal to writing of the design. The Xilinx ISE 8.1i tool was used for synthesis of this project. ModelSim PE Student Edition 10.3c is used for functional simulation and logic verification of analog waveforms. The BER curves for different digital modulation techniques which are obtained after simulation are compared with theoretical curves. All the BER calculations are done assuming the channel as AWGN channel.

Keywords – AWGN Channel, Bit Error Rate (BER), BPSK,

Digital Modulation Techniques, 8PSK, 16PSK, Signal to Noise Ratio (SNR), QPSK, VHDL.

I.

I

NTRODUCTION

In digital communication system design, the main objective is to receive data as similar as the data sent from the transmitter. It is important to analyze the system in term of probability of error to view the system's performance. Each modulation technique has different performance while dealing with signals, which normally are affected with noise. General explanation for BER and Eb/No is explained and simulated in this paper. It focuses on comparative performance analysis of BPSK, QPSK, 8PSK and 16PSK. Here Top File Implementation and Simulation of the system has been done on Xilinx ise 8.1i. Instead of using a traditional analog design here the digital design has been used. BER versus the Eb/No are used to evaluate the performance of different digital modulation techniques in AWGN channel. The BER curves obtained after simulation are compared with theoretical curves.

II.

S

YSTEM

D

ESIGN

Fig.3. Simulation model

Main Components of System Design:

1)

Data generator:

Data generator is consist of D flip flop and Invertor. It generates stream of bits to be transmitted. Here 8 bit data generator is used which is generally a Pseudorandom Sequence generator.

2)

Carrier Phase Shifter:

where M is an integer. Phase-locked loop frequency synthesizers make use of frequency dividers to generate a frequency that is a multiple of a reference frequency. Frequency dividers can be implemented for both analog and digital applications. In Mary Psk the frequency division is divided by M is used.

4)

Counter:

A counter is a device which stores the number of times a particular event or process has occurred, often in relationship to a clock signal

5)

Multiplexer:

Here the multiplexer does the work of a multiplier or a balanced modulator. A multiplexer (or mux) is a device that selects one of several digital input signals and forwards the selected input into a single line. A multiplexer of 2n inputs has n select lines, which are used to select which input line to send to the output. Multiplexers are mainly used to increase the amount of data that can be sent over the channel within a certain amount of time and bandwidth. A multiplexer is also called a data selector. Here it works as a balanced modulator.

6)

Carrier recovery

Carrier recovery is composed of D flip flop and Invertor. It generates carrier signal which changes the phase angle of the information bits. It is generally the converse of Carrier phase shifter. Carrier recovery is synchronized with the carrier phase shifter in transmitter side. For e.g. carrier recovery of bpsk is shown below.

7)

Noise generator

Noise generator is consist of D flip flop and Invertor. It generates stream of bits to be transmitted. Here 8 bit data generator is used which is generally a Pseudorandom Noise generator.

8)

Serial to parallel convertor:

It is used to convert the serial bit stream in parallel bits. It is composed of number of D flip-flops depending upon the number of bits. Here 8 bit Serial to parallel convertor is used.

9)

Serializer

It is used to convert the parallel data into the serial bit stream. It is composed of adder, multiplexer and basic logic gates like and, or and xor.It basically a parallel to serial convertor.

10)

Ripple Carry Adder (8 bit).

It is used to add the 8 bit noise and data in the channel. It is composed of 8 full adder connected in series to add the 8 bit data. The value of RCA increases with the value of M.

11)

Bit Comparator:

It compares the output of the modulator and demodulator to detect the number of bits been altered. The change in number of bits can be expressed in percentage.

12)

Sine wave generator:

III.

B

IT

E

RROR

R

ATE

In Digital transmission the number of bit errors is the number of received bits of a data stream over a communication channel that has been altered due to noise, interference, distortion or bit synchronization errors. The bit error rate or bit error ratio (BER) is the number of bits in error divided by the total number of transferred bits during a studied time interval. BER is a unit less performance measure; often expressed as a percentage. The bit error probability Pb is the expectation value of the BER.

Bit error Rate Pb =Number of bits in error

Total number of bits (4)

The performance of each modulation is measured by calculating its probability of error with assumption that systems are operating with additive white Gaussian noise. Modulation schemes which are capable of delivering more bits per symbol are more immune to errors caused by noise and interference in the channel. .

IV.

AWGN

C

HANNEL

The term noise refers to unwanted electrical signals that are always present in electrical systems and the term additive means the noise is superimposed or added to the signal that tends to mask the signal where it will limit the receiver ability to make correct symbol decisions and limit the rate of information transmission. The transmitted waveform gets corrupted by noise „n‟, typically referred to an Additive White Gaussian Noise (AWGN), illustrated as

Additive:

As the noise gets „added‟ (and not multiplied) to the received signal,

White:

The spectrum of the noise is flat for all frequencies

Gaussian

: The values of the noise „n‟ follow the Gaussian probability distribution function p(z), where σ is the variance

p z = 1

σ2 2π Exp [

1 2(

z−a

σ ) ²] (5)

Thus, AWGN is the effect of thermal noise generated by thermal motion of electron in all dissipative electrical componnts i.e. .resistors, wires and so on. A simple model for thermal noise assumes that its power spectral density is a flat for all frequencies and is denoted as:

Gn f =No

2 (6)

Where the factor of 1/2 is included to indicate that Gn (f) is a two-sided power spectral density and indicates that half the power is associated with positive frequencies and

half with negative frequencies. When noise power has such a uniform spectral density, it is referred as white noise. The word Gaussian in the phrase additive white Gaussian noise is due to a Gaussian distribution of the amplitude of the noise.

V.

E

NERGY

P

ER

B

IT

–

TO

N

OISE

P

OWER

D

ENSITY

R

ATIO

(E

B

/N

O

)

The Energy per bit –to noise power density ratio is used to compare two or more digital modulation techniques that uses different transmission rate. The Energy per bit –to noise power density ratio is simply the ratio of the energy of a single bit to noise power present in 1 Hz of bandwidth. Thus, Eb/No normalizes all multiphase modulation schemes to a common noise bandwidth, allowing for a simpler and more accurate comparison of their error performance.

VI.

S

IMULATION

R

ESULTS

I

N

X

ILINX

ISE

S

IMULATOR

The proposed designs of different digital modulation techniques are modeled with VHDL and simulated on Xilinx ISE 8.1i and MODELSIM PE STUDENT EDITION 10.3c platform. Each of the design VHDL code synthesizes and tested with a test bench code to simulate it functionality. The synthesizable code translated into RTL (Register Transfer level) schematic diagrams and Interconnection diagrams.

2)

Interconnection Diagram

B.

Qpsk System

1)

RTL Schematic

Interconnection Diagram

2)

RTL Schematic

3)

Interconnection Diagram

2)

Interconnection Diagram

VII.

R

ESULTING

T

IMING

W

AVEFORMS FOR

E

B

/N

O

=3

A.

BPSK

2)

MODELSIM PE STUDENT EDITION 10.3c

B.

QPSK :

2)

MODELSIM PE STUDENT EDITION 10.3c

C.

8 PSK:

2) MODELSIM PE STUDENT EDITION 10.3c

D. 16PSK

2)

MODELSIM PE STUDENT EDITION 10.3c

VIII.

G

RAPH

P

LOT

F

OR

P(e) Vs Eb/No

Values of BER in terms of Eb/No in AWGN channel are expressed as follows:

1) BPSK => BER=1

2erfc 𝐸𝑏/𝑁𝑜

2

2) QPSK => BER=erfc2 𝐸𝑏/𝑁𝑜

3) 8PSK => BER=1 3erfc((

3𝐸𝑏 𝑁𝑜)𝑠𝑖𝑛

𝜋 8) , 𝑠𝑖𝑛

𝜋

8=0.383

4) 16PSK => BER=1 4erfc((

4𝐸𝑏 𝑁𝑜)𝑠𝑖𝑛

𝜋 16), 𝑠𝑖𝑛

𝜋 16=0.195

Where erfc(x) = 1- erf (x) and erf(x) = 2 π e

−t² _dt

x 0

IX.

C

ONCLUSION

The proposed design for different digital modulators has been successfully simulated on Xilinx ISE 8.1i software platform. The BER for digital modulation techniques decrease monotonically with increasing values of Eb/No.

In Mary Psk system as the value of M increases the BER rate increases but the bandwidth requirement decreases. A QPSK system transmits information at twice the bit rate of a BPSK system for the same channel BW due to which QPSK is mostly used in practice. It is observed from the simulation curves and the mathematical analysis of the signals that as the number of signals or number of M increases, the error probability also increases over AWGN channel. The BERs of a BPSK and a QPSK system are approximately equal. For low values of Eb/No the BERs of BPSK, QPSK, 8PSK and 16PSK systems are almost the same. However, as Eb/No increases, the BER of the BPSK and QPSK systems drop in a very fast fashion. The comparison shows that, as the value of M increases, the BER of PSK system increases. It is seen that 8PSK and 16PSK modulations exhibit higher error-rates; in exchange however they deliver a higher raw data-rate. As the value of Eb/No increases the curves of 8PSK and 16PSK drops slowly. As the value of M increases the bandwidth requirement decreases.

R

EFERENCES

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