Analog Circuits K-Notes

1

Contents

Manual for K-Notes ... 2

Diodes ... 3

Transistor Biasing ... 11

Transistor Amplifier ... 19

Feedback Amplifiers ... 25

Operational Amplifiers (OP-AMP) ... 29

2

Manual for K-Notes

Why K-Notes?

Towards the end of preparation, a student has lost the time to revise all the chapters from his / her class notes / standard text books. This is the reason why K-Notes is specifically intended for Quick Revision and should not be considered as comprehensive study material.

What are K-Notes?

A 40 page or less notebook for each subject which contains all concepts covered in GATE Curriculum in a concise manner to aid a student in final stages of his/her preparation. It is highly useful for both the students as well as working professionals who are preparing for GATE as it comes handy while traveling long distances.

When do I start using K-Notes?

It is highly recommended to use K-Notes in the last 2 months before GATE Exam (November end onwards).

How do I use K-Notes?

Once you finish the entire K-Notes for a particular subject, you should practice the respective Subject Test / Mixed Question Bag containing questions from all the Chapters to make best use of it.

3

Diodes

Representation:

A: Anode K : Cathode

 The voltage at which the charged particles start crossing the junction is called as cut – in voltage or Threshold voltage.

It is represented asV_AK V . _

 When V_AK V , depletion region exists and no charge carriers cross the junction, therefore _ I_D 0

 WhenV_AK V , number of charged particles crossing the junction increases & the current _ through the diode increase, non – linearly or exponentially.

 Diode in the condition is said to be forward biased.

               AK T D S V V I I e 1

IS = reverse saturation current VT = Thermal voltage = KT_q K = Boltzmann constant T = Temp. in k q = charge of one e VT = 26mv at room temperature  = intrinsic factor

 When V_AK 0, diode is said to be in reverse biased condition & no majority carriers cross the depletion region, hence I_D 0

4

Characteristics of Diode

Equivalent circuit of diode

 Forward Bias  Reverse Bias Diode Resistance 1) State or DC Resistance VAK RDC I _D

5 2) Dynamic or AC Resistance dV_D V_T RAC dI_D I_D    Diode Applications Clippers

It is a transmission circuit which transmits a part of i/p voltage either above the reference voltage or below the reference voltage or b/w the two reference voltages.

 Series Clippers i) Positive Clippers V V sin t i m : When Vi VR=> VO VR V_m V_R When V_i V_R=> V_O V_i

ii) Negative Clipper

V V sin t 

i m : When Vi  VR=> Vo  VR V_m  V_R When V_i  V_R=> V_o V_i

6  Shunt Clipper i) Positive Clipper When V_i V , D is ON_R Vo VR V V , D is OFF i R When Vo Vi ii) Negative Clipper

V  V , D is ON i R When Vo  VR When V  V ,D is OFF i R Vo Vi

 Two level Clipper

When V V , D is OFF & D is ON

i 2 1 2

V0 V2

When V V & V V , D is OFF & D is OFF 

i 2 i 1 2 1

Vo Vi

When V V , D is OFF D is ON

i 1 2 l

7

CLAMPERS

These circuits are used to shift the signal either up words or down words.

 Negative Clampers

When V_R 0

+ve peak is shifted to 0 -ve peak is shifted to 2Vm

When V_R 0

+ve peak is shifted to VR -ve peak is shifted to -2 V_mV_R

8 When V_R 0

-ve peak is shifted to 0 +ve peak is shifted to 2Vm When V_R 0

-Ve peak is shifted to VR +ve peak is shifted to 2V_m V_R

Rectifier

It converts AC signal into pulsating DC.

1) Half wave rectifier

During positive half wave cycle

           R_L V₀ V sin t_m R_f R_L Rf = diode resistance During negative half cycle

V₀ 0 

 

_{V0 avg}  Vm   4 RL 100% 2 R_{f RL}              

 

_V0 Vm 2 RMS   Form Factor = VRMS ₂ Vavg   Ripple factor = FF2 1  _{PIV Vm}

9

Bridge full wave rectifier

When +ve half wave cycle

 

RL V_o V t

R_L 2R_f

 



When –ve half wave cycle

 

RL V_o V t R_L 2R_f     

 

_{Vo avg}  2Vm   8₂ 1 100% Rf 1 2 RL         _{ }   _        

 

_{Vo RMS} Vm 2   FF 2 2    _{PIV Vm} Zener Diode

 A heavily doped a si diode which has sharp breakdown characteristics is called Zener Diode.

 When Zener Diode is forward biased, it acts as a normal PN junction diode.

 For an ideal zener diode, voltage across diode remains constant in breakdown region.

10

Voltage Regulator

Regulators maintains constant output voltage irrespective of input voltage variation.

Zener must operate in breakdown region so V_i V_z

I I _z I_L Vz IL R _L





I_max I_{z max} I_L    I_min I_{z min}

_

_

I_L









I_{z max} I _{max IL}    I_{z min}

_

_

I_minI_L

11

Transistor Biasing

Bipolar Junction Transistor

 Current conduction due to both e- & holes

 It is a current controlled current source.

NPN Transistor

PNP Transistor

Region of Operation

Junctions Region of operations Applications

i) J_E RB cut – off Switch J_C RB

ii) J_E FB active amplifier J_C RB

iii) J_E FB saturation Switch J_C FB

iv) J_E RB reverse active Attenuation J_C FB

12

Current gain (α) (common base)

I_C I_ncI_o

Inc : injected majority carrier current in collector

 Inc I E







 



           I I I ₁ B o B I ; I I C 1 E 1 1 o

Current gain β (common emitter)





I_c   I_B 1  I_o





        ;   1 1

 These relations are valid for active region of operations.

Characteristics of BJT

 Common Base characteristics

input V , I _{BE E}

output V _{CB C}, I

Input characteristics

13 Output characteristics

 Common emitter characteristics





inputs V , I_{BE B}





outputs V , I_{CE C}

14 Output characteristics

Transistor Biasing 1) Fixed Bias method

V_cc I R_{B B}V_BE 0 V_cc V_BE IB  _RB

Assuming active region of operation I_c  I_B

V_CE V_CCI R_{C C}

Verification

 If V_{CE sat}

_{ }

V_CE V_CC Active Region If not ; then saturation region

 For saturation region , V_CE V_{CE sat}

_{ }

 

  V_CC V CE sat I C R_C  In saturation region , _IB IC min  

15

2) Feedback Resistor Bias Method

By KVL





V_cc  I_cI R_{B c} I R_{B B}V_BE I R_{E E} 0









V_cc  I_cI R_{B c} I R_{B B} V_BE  I_C I R_{B B} 0

Assuming active region I_c  I_B









V_cc V_BE I_B ; I_c I_B R_B 1 R_C R_E        







V_CE V_CC I_C I_B R_C R_E

3) Voltage divider bias or self-bias

By thevenin’s theorem across R2 R2 V_TH V_{CC R} R 1 2   R R_{2 1} RTH R R _{1 2}  Apply KVL





V_THV_BE I R_{B TH} I_BI R_{C E} Assuming active region I_C  I_B





V_TH V_BE IB R_TH 1 R_E      V_CE V_CC I R_{C C}I R_{E E}

16

FET Biasing JFET

 _{When VGS is negative, depletion layer is created between two P – region and that pinches the}

channel between drain & source.

 The voltage at which drain current is reduce to zero is called as pinch off voltage.

 Transfer – characteristics of JFET is inverted parabola

 

     _  _     2 V GS I I 1 D DSS V GS OFF When V_GS 0, I_D I_DSS When V_GS V_{GS OFF}

_

_

, I_D 0

Pinch of voltage, V_p  V_{GS OFF}

_

_

 For a N – channel JFET, pinch off voltage is always positive V_p 0 & V_GS 0

17 JFET Parameters 1) Drain Resistance VDS rd  _IDS 

It is very high, of the order of M.

2) Trans conductance I_D dI_D gm _{V dV} GS GS    





2 VGS I_D I_DSS 1 V_{GS OFF}      _  _    









2I V dI_{D DSS GS} g_m 1 dV_GS V_{GS OFF} V_{GS OFF}    _{ }   _  _     3) Amplification factor VDS _{g r} m d VGS     

18

Enhancement Type MOSFET

 No physical channel between source & drain

 To induce a channel Gate – source voltage is applied.

Depletion MOSFET

 Physical channel present between source & drain.

Types of MOSFET

Operating characteristics 1. For n – channel MOSFET

 I 0 for V V cut off region







D GS T 





2 V W _DS I_{D n ox}C V_GS V V_{T DS} L 2       _   _     (linear region)





V_GS V and V_{T DS}  V_GS V_T 





2 V V W GS T I_{D n ox L}C 2    (saturation region)





V_GS V and V_{T DS}  V_GS V_T

19

2. For p – channel MOSFET

 I_D 0 for V_GS V_T (cut – off region)







2 V W _DS I_{D n ox}C V_GS V V_{T DS} L 2       _   _     (linear region) V_GS V and V_{T DS} V_GS V_T 





2 V V W GS T I_{D n ox L}C 2    (saturation region) V_GS V and V_{T DS} V_GS V_T

Transistor Amplifier

Small signal analysis for BJT

 h – parameter model of BJT V₁ h I_{i 1}h V_{r 2} I₂ h I_{f 1}h V_{o 2}  current gain, _AI I2 I1   h RLf AI 1 h R  _{o L}   Input Impedance, Z_i V1 h h A R_{i r I L} II   

20  Voltage gain, _AV A RI L Zi   Output impedance, _Zo 1 h hrf ho h R_{i s}           

Common Emitter (CE) Amplifier

Small signal model

Voltage gain A_v Vo h ef



R_c R_L



V_i h e_i



21

High frequency Analysis of BST

rbb' = base spreading resistance. rb'e = input resistance.

rb'c = feedback resistance. rce = output resistance.

Cb'e = diffraction capacitance. Cb'c = Transition capacitance. gm = Transconductance. Hybrid π - parameters 1) g_m

 

Ic Q ; V_T KT V_T q   ,

ICQ = dc bias point collector current. 2) _{rb'e g}hfe

m

22

High Frequency Model

rb'c = open circuited.

23

Voltage gain as frequency

Low Frequency Range

 External capacitor C and C_{E C are short circuited.}

 Internal capacitor C_b'c and C_{b'e are open circuited.}

 Circuit becomes like.

24

High frequency range

 External capacitors C ,C and C_{b c E are short circuited.}

 _{Cb'c is open circuited.}

 Equivalent circuit behaves as a low pass filter with cut-off frequency fL.

Mid – band range

 All internal and external capacitance are neglected, so gain is independent of frequency.

FET Small Signal parameters

Trans conductance, _{gm V}ID GS

 



In non – saturation region

I_{D W} g_{m n ox}C .V_DS V_GS L      In saturation region





W g_{ms n ox}C V_GS V_T L   

25 For low frequency

For high frequency

Feedback Amplifiers

Ideal Amplifier Zin   Z_o 0 Positive feedback : V_i V_s V_f Negative Feedback : V_i V_sV_f For negative feedback, Vo A

V_s 1 A 

For positive feedback, Vo A V_s 1 A 

26

Effects of Negative Feedback i) Sensitivity Without feedback = A A  With feedback = Af Af 





A_{f 1 A} A_f 1 A A  _   

ii) Input Impedance

Without feedback = Zi With feedback = Zif





Z_if Z 1 A_i  

iii) Output impedance

Without feedback = Zo With feedback = Zof





Z_of Z_o 1 A 

 Negative feedback also leads to increase in band width .

Topologies of Negative feedback

Output Input Voltage Voltage Current Current Series Shunt Series Shunt

27

1) Voltage Series Topologies

V_f  _Vo

It is called as series shunt feedback or voltage - voltage feedback. In this case, input impedance increases & output impedance decreases.

2) Voltage shunt topologies

I_f  _Vo

 = Trans conductance

It is called as shunt-shunt or voltage current feedback.

3) Current series Topologies

V_f  _Io  = resistance

It is called as shunt – shunt or voltage current feedback.

4) Current shunt Topologies

I_f  _Io

28

Circuit Topologies

1) Voltage series

2) Voltage shunt

29 4) Current – shunt

Operational Amplifiers (OP-AMP)

+  Non – inverting terminal

- inverting terminal

Parameters of OP–AMP

1) Input offset voltage

Voltage applied between input terminals of OP – AMP to null or zero the output. 2) Input offset current

Difference between current into inverting and non – inverting terminals of OP – AMP. 3) Input Bias Current

Average of current entering the input terminals of OP – AMP. 4) Common mode Rejection Ratio (CMRR)

Defined as ratio of differential voltage gain Ad to common mode gain

 

Acm . Ad

CMRR

Acm

30 5) Slew Rate

Maximum rate of change of output voltage per unit time under large signal conditions. dVo

SR _max V s

dt

 

Concept of Virtual ground

In an OP – AMP with negative feedback, the potential at non – inserting terminals is same as the potential at inverting terminal.

Applications of OP –AMP 1) Inverting Amplifier Rf V_o V_in R1   2) Inverting Summer V_a V_b V_c V_o R f R_a R_b R_c            

3) Non – inverting Amplifier

Rf V_o 1 V_in R1          

31 4) Non – inverting summer

If R_a R_b R_c R

 

R

 

R

 

R V_{a 2} V_{b 2} V_{c 2} V1 _R R _R R _R R 2 2 2      



 



 Va Vb Vc V 1 3                  V V V R _{a b c} f V_o 1 R₁ 3 5) Differential Amplifier By Super position R_{f R3} V_ob 1 V_b R₁ R₂ R₃                  Rf V_oa V_a R1   V_o V_oaV_ob 6) Integrator t 1 V_{o o}V dc_in RC  

_

32 7) Differentiator dVin V_o RC dt  

8) Voltage to current converter

Vin IL R

9) Current to voltage Converter

33 10) Butter – worth Low Pass Filter





R_f V_in V_o 1 R₁ 1 j2 fRC             A Vo f V_{in f} 1 j fH         R_{f 1} A_f 1 _R ; f_H 2 RC 1   _  _    

11) Butter – worth High Pass Filter

R V_{o f j2 fRc} 1 V_in R₁ 1 j2 fRC  _{  }     _{ }  _   _   f j fL Af f 1 j fL              _{ }    _{  }  _{ }   Rf A_f 1 R1   1 fL 2 RC 

34 12) Active Half – wave rectifier

In this circuit, diode voltage drop between input & output is not VD but rather VD_A , where A = open loop gain of OP – AMP.

V_in V_o

 

13) Active Full – wave Rectifier

This circuit provides full wave rectification with a gain of RR ₁

 

V  R V

m R m

35 14) Active Clipper

V_INV , Diode conducts and V_{R o} V And when V_IN V_R Diode is OFF

V_o V_IN

 

15) Active Clamper

V_o V_INV_p

36 16) Comparators

37 17) Schmitt Trigger

Inverting Schmitt Trigger

 When output is V _sat,then V_ref  V_sat

 When output is V _sat,then V_ref  V_sat

When R2

R₁ R₂

  

 Upper triggering point



utp



 _Vsat

Lower triggering point

 

Ltp  _Vsat  _{Hystersis voltage = UTP LTP 2 Vsat}  

   1 1 2 R UTP V_sat V_R R R    1 1 2 R LTP V_sat V_R R R

38

Non – Inverting Schmitt Trigger

 Upper trigger Point



UTP



R2 _Vsat R1

 , Lower triggering point



LTP



R2 _Vsat R1



 , R2

R1

 

 _{Hysteric voltage = UTP LTP 2 Vsat}  

39 R2 R₁ R₂            1 T 2RCln 1     _{ }     1 1 f T _2RCln 1 1       _{ }   555 Timer Pin Diagram

40

 Bistable multi vibrator acts as a FF.

 Monostable Multi vibrator produces pulse output.

 Bistable Multi vibrator acts as free running oscillator.

A stable Multi vibrator





T_c 0.69 R₁R c₂ T_d 0.69R c₂





    T T T 0.69 R 2R C c d 1 2





   1 1 f T 0.69 R 2R C 1 2