OPA161x SoundPlus High-Performance, Bipolar-Input Audio Operational Amplifiers

Pre-Output Driver OUT

V- V+

IN-

IN+

0.01

0.001

0.0001

0.00001

0.000001

Total Harmonic Distortion + Noise (%)

-

-

-

-

- 80

100

120

140

160

Total Harmonic Distortion + Noise (dB)

0.01 0.1 1 10 20

Output Amplitude (V_RMS) 1kHz Signal BW = 80kHz R_SOURCE= 0W

G = +1, R = 600W_L G = +1, R = 2k G = 1, R = 600

L L

W

- W

G = 1, R = 2k G = +10, R = 600 G = +10, R = 2k

- W

W W

L L L

OPA1611, OPA1612

SBOS450C – JULY 2009 – REVISED AUGUST 2014

OPA161x SoundPlus™ High-Performance, Bipolar-Input Audio Operational Amplifiers

1 Features 3 Description

The OPA1611 (single) and OPA1612 (dual) bipolar-

1• Superior Sound Quality

input operational amplifiers achieve very low

• Ultralow Noise: 1.1 nV/√Hz at 1 kHz 1.1-nV/√Hz noise density with an ultralow distortion of

• Ultralow Distortion: 0.000015% at 1 kHz. The OPA1611 and OPA1612

0.000015% at 1 kHz offer rail-to-rail output swing to within 600 mV with a 2-kΩ load, which increases headroom and maximizes

• High Slew Rate: 27 V/μs

dynamic range. These devices also have a high

• Wide Bandwidth: 40 MHz (G = +1)

output drive capability of ±30 mA.

• High Open-Loop Gain: 130 dB

These devices operate over a very wide supply range

• Unity Gain Stable of ±2.25 V to ±18 V, on only 3.6 mA of supply current

• Low Quiescent Current: per channel. The OPA1611 and OPA1612 op amps

3.6 mA per Channel are unity-gain stable and provide excellent dynamic behavior over a wide range of load conditions.

• Rail-to-Rail Output

• Wide Supply Range: ±2.25 V to ±18 V The dual version features completely independent circuitry for lowest crosstalk and freedom from

• Single and Dual Versions Available

interactions between channels, even when overdriven or overloaded.

2 Applications

Both the OPA1611 and OPA1612 are available in

• Professional Audio Equipment

SOIC-8 packages and the OPA1612 is available in

• Microphone Preamplifiers SON-8. These devices are specified from –40°C to

• Analog and Digital Mixing Consoles +85°C.

• Broadcast Studio Equipment

Device Information⁽¹⁾

• Audio Test And Measurement

PART NUMBER PACKAGE BODY SIZE (NOM)

• High-End A/V Receivers

OPA1611 SOIC (8) 4.90 mm × 3.91 mm

SOIC (8) 4.90 mm × 3.91 mm

OPA1612

SON (8) 3.00 mm × 3.00 mm

(1) For all available packages, see the orderable addendum at the end of the datasheet.

space space

THD+N Ratio vs Output Amplitude Functional Block Diagram

Table of Contents

8.1 Application Information...15

1 Features ...1

8.2 Noise Performance ...15

2 Applications ...1

8.3 Total Harmonic Distortion Measurements...17

3 Description ...1

8.4 Capacitive Loads...17

4 Revision History...2

8.5 Application Circuit ...18

5 Pin Configuration and Functions ...3

9 Power-Supply Recommendations...19

6 Specifications...4

10 Layout...20

6.1 Absolute Maximum Ratings ...4

10.1 Layout Guidelines ...20

6.2 Handling Ratings...4

10.2 Layout Example ...20

6.3 Recommended Operating Conditions ...4

11 Device and Documentation Support ...21

6.4 Electrical Characteristics: VS= ±2.25 V to ±18 V ....5

11.1 Documentation Support ...21

6.5 Typical Characteristics ...7

11.2 Related Links ...21

7 Detailed Description ... 12

11.3 Trademarks ...21

7.1 Overview ...12

11.4 Electrostatic Discharge Caution ...21

7.2 Functional Block Diagram ...12

11.5 Glossary ...21

7.3 Feature Description...12

12 Mechanical, Packaging, and Orderable 8 Application and Implementation ...15

Information ... 21

4 Revision History

• Added SON-8 (DRG) package to data sheet ... 1

• Changed SO to SOIC throughout document to match industry standard term ...1

• Added front-page curve ... 1

• Added title to block diagram ... 1

• Deleted Package Information table; see package option addendum ... 3

Changes from Revision A (August 2009) to Revision B Page • Revised Features list items ... 1

• Updated front-page figure... 1

• Added max specification for input voltage noise density at f = 1kHz ... 5

• Corrected typo in footnote 1 for Electrical Characteristics ... 5

• RevisedFigure 4... 7

• UpdatedFigure 7... 7

• ChangedFigure 9... 7

• RevisedFigure 11... 7

• Corrected typo inFigure 15... 8

• UpdatedFigure 29... 12

• Revised fourth paragraph of Electrincal Overstress section ... 13

• Revised table inFigure 34... 17

1 2 3 4

8 7 6 5

V+

OUT B

-IN B +IN B OUT A

-IN A +IN A V-

Pad⁽²⁾

A B

1 2 3 4

8 7 6 5

V+

OUT B

-IN B +IN B OUT A

-IN A +IN A V-

A B 1

2 3 4

8 7 6 5

NC⁽¹⁾ V+

OUT NC⁽¹⁾ NC⁽¹⁾

-IN +IN V-

5 Pin Configuration and Functions

D Package

D Package OPA1611, SOIC-8

OPA1612, SOIC-8 (Top View)

(Top View)

DRG Package OPA1612, SON-8

(Top View)

(1) NC denotes no internal connection. Pin can be left floating or connected to any voltage between (V–) and (V+).

(2) Exposed thermal die pad on underside; connect thermal die pad to V–. Soldering the thermal pad improves heat dissipation and provides specified performance.

Pin Functions

PIN

NO. I/O DESCRIPTION

NAME D (OPA1611) D (OPA1612) DRG (OPA1612)

–IN 2 — — I Inverting input

+IN 3 — — I Noninverting input

–IN A — 2 2 I Inverting input, channel A

+IN A — 3 3 I Noninverting input, channel A

–IN B — 6 6 I Inverting input, channel B

+IN B — 5 5 I Noninverting input, channel B

NC 1, 5, 8 — — — No internal connection

OUT 6 — — O Output

OUT A — 1 1 O Output, channel A

OUT B — 7 7 O Output, channel B

V– 4 4 4 — Negative (lowest) power supply

V+ 7 8 8 — Positive (highest) power supply

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN MAX UNIT

Supply voltage V_S= (V+) – (V–) 40 V

Input voltage (V–) – 0.5 (V+) + 0.5 V

Input current (all pins except power-supply pins) ±10 mA

Output short-circuit⁽²⁾ Continuous

Operating temperature (T_A) –55 +125 °C

Junction temperature (T_J) 200 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Short-circuit to VS/ 2 (ground in symmetrical dual supply setups), one amplifier per package.

6.2 Handling Ratings

MIN MAX UNIT

Tstg Storage temperature range –65 +150 °C

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all

–3000 3000

pins⁽¹⁾

V(ESD) Electrostatic discharge Charged device model (CDM), per JEDEC specification –1000 1000 V JESD22-C101, all pins⁽²⁾

Machine model (MM) –200 200

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

Supply voltage (V+ – V–) 4.5 (±2.25) 36 (±18) V

Specified temperature –40 +85 °C

6.4 Electrical Characteristics: V_S= ±2.25 V to ±18 V

At T_A= +25°C and R_L= 2 kΩ, unless otherwise noted. VCM= V_OUT= midsupply, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

AUDIO PERFORMANCE

0.000015%

THD+N Total harmonic distortion + noise G = +1, f = 1 kHz, VO= 3 VRMS

–136 dB

0.000015%

SMPTE/DIN two-tone, 4:1 (60 Hz and 7 kHz),

G = +1, VO= 3 VRMS –136 dB

0.000012%

DIM 30 (3-kHz square wave and 15-kHz sine IMD Intermodulation distortion

wave), G = +1, VO= 3 VRMS –138 dB

0.000008%

CCIF twin-tone (19 kHz and 20 kHz), G = +1,

VO= 3 VRMS –142 dB

FREQUENCY RESPONSE

G = 100 80 MHz

GBW Gain-bandwidth product

G = 1 40 MHz

SR Slew rate G = –1 27 V/μs

Full-power bandwidth⁽¹⁾ V_O= 1 V_PP 4 MHz

Overload recovery time G = –10 500 ns

Channel separation (dual) f = 1 kHz –130 dB

NOISE

Input voltage noise f = 20 Hz to 20 kHz 1.2 μV_PP

f = 10 Hz 2 nV/√Hz

en Input voltage noise density⁽²⁾ f = 100 Hz 1.5 nV/√Hz

f = 1 kHz 1.1 1.5 nV/√Hz

f = 10 Hz 3 pA/√Hz

In Input current noise density

f = 1 kHz 1.7 pA/√Hz

OFFSET VOLTAGE

VOS Input offset voltage VS= ±15 V ±100 ±500 μV

dVOS/dT VOSover temperature⁽²⁾ TA= –40°C to +85°C 1 4 μV/°C

PSRR Power-supply rejection ratio V_S= ±2.25 V to ±18 V 0.1 1 μV/V

INPUT BIAS CURRENT

VCM= 0 V ±60 ±250 nA

IB Input bias current

VCM = 0 V, DRG package only ±60 ±300 nA

I_Bover temperature⁽²⁾ T_A= –40°C to +85°C 350 nA

IOS Input offset current VCM= 0 V ±25 ±175 nA

INPUT VOLTAGE RANGE

V_CM Common-mode voltage range (V–) + 2 (V+) – 2 V

CMRR Common-mode rejection ratio (V–) + 2 V≤ VCM≤ (V+) – 2 V 110 120 dB

INPUT IMPEDANCE

Differential 20k || 8 Ω || pF

Common-mode 10⁹|| 2 Ω || pF

(1) Full-power bandwidth = SR / (2π × VP), where SR = slew rate.

(2) Specified by design and characterization.

Electrical Characteristics: V_S= ±2.25 V to ±18 V (continued)

At T_A= +25°C and R_L= 2 kΩ, unless otherwise noted. VCM= V_OUT= midsupply, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

OPEN-LOOP GAIN

(V–) + 0.2 V≤ V_O≤ (V+) – 0.2 V, R_L= 10 kΩ 114 130 dB

AOL Open-loop voltage gain

(V–) + 0.6 V≤ VO≤ (V+) – 0.6 V, RL= 2 kΩ 110 114 dB

OUTPUT

R_L= 10 kΩ, A_OL≥ 114 dB (V–) + 0.2 (V+) – 0.2 V

V_OUT Voltage output

RL= 2 kΩ, A_OL≥ 110 dB (V–) + 0.6 (V+) – 0.6 V

IOUT Output current SeeFigure 27 mA

ZO Open-loop output impedance SeeFigure 28 Ω

+55 mA

ISC Short-circuit current

–62 mA

CLOAD Capacitive load drive SeeTypical Characteristics pF

POWER SUPPLY

VS Specified voltage ±2.25 ±18 V

IQ Quiescent current (per channel) IOUT= 0 A 3.6 4.5 mA

I_Qover Temperature⁽³⁾ T_A= –40°C to +85°C 5.5 mA

TEMPERATURE RANGE

Specified range –40 +85 °C

Operating range –55 +125 °C

θ_JA Thermal resistance, SOIC-8 150 °C/W

(3) Specified by design and characterization.

140 120 100 80 60 40 20 0 20 40 - -

180 160 140 120 100 80 60 40 20 0

Gain(dB) Phase(degrees)

100 1k 10k 100k 1M 10M 100M

Frequency (Hz) Phase

Gain

25 20 15 10 5 0 5 10 15 20 -25

- - - -

Gain(dB)

100k 1M 10M 100M

Frequency (Hz) G = +10

G = +1 G = 1-

10k

1k

100

10

Voltage Noise Spectral Density, E(nV/)Hz?O 1

100 1k 10k 100k 1M

Source Resistance, R ( )_S W

Resistor Noise

E_O²= e_n²+ (i R ) + 4kTR_{n S}² _S

RS

EO

Total Output Voltage Noise

30

25

20

15

10

5

0 Output Voltage (V)PP

10k 100k 1M 10M

Frequency (Hz) V = 2.25V_S ±

V = 5V_S ±

V = 15V_S ± Maximum output

voltage range without slew-rate induced distortion VoltageNoiseDensity(nV/)ÖHz CurrentNoiseDensity(pA/)ÖHz

0.1

Frequency (Hz)

100k 10

1 100 1k 10k

100

10

1

Current Noise Density Voltage Noise Density

20nV/div

Time (1s/div)

6.5 Typical Characteristics

At T_A= +25°C, V_S= ±15 V, and R_L= 2 kΩ, unless otherwise noted.

Figure 2. 0.1-Hz to 10-Hz Noise Figure 1. Input Voltage Noise Density and Input Current

Noise Density vs Frequency

Figure 4. Maximum Output Voltage vs Frequency Figure 3. Voltage Noise vs Source Resistance

Figure 5. Gain and Phase vs Frequency Figure 6. Closed-Loop Gain vs Frequency

0.01

0.001

0.0001

0.00001

0.000001

Total Harmonic Distortion + Noise (%)

-

-

-

-

- 80

100

120

140

160

Total Harmonic Distortion + Noise (dB)

0.01 0.1 1 10 20

Output Amplitude (V_RMS) 1kHz Signal BW = 80kHz R_SOURCE= 0W

G = +1, R = 600WL G = +1, R = 2k G = 1, R = 600

L L

W

- W

G = 1, R = 2k G = +10, R = 600 G = +10, R = 2k

- W

W W L

L L

0.01

0.001

0.0001

0.00001

0.000001

Intermodulation Distortion (%)

-

-

-

-

- 80

100

120

140

160

Intermodulation Distortion (dB)

0.1 1 10 20

Output Amplitude (V_RMS) SMPTE/DIN

Two-Tone 4:1 (60Hz and 7kHz)

CCIF Twin-Tone (19kHz and 20kHz) DIM30

(3kHz square wave and 15kHz sine wave) G = +1

0.01

0.001

0.0001

0.00001

Total Harmonic Distortion + Noise (%) Total Harmonic Distortion + Noise (dB)-

-

-

- 80

100

120

140

10 100 1k 10k 100k

Frequency (Hz)

RSOURCE= 600W

RSOURCE= 300W

RSOURCE= 150W RSOURCE= 0W

V = 3V BW > 500kHz

OUT RMS

OPA1611 +15V

-15V R_L RSOURCE

0.001

0.0001

0.00001

Total Harmonic Distortion + Noise (%)

-

-

- 100

120

140

Total Harmonic Distortion + Noise (dB)

10 100 1k 10k 100k

Frequency (Hz)

V = 3V BW > 500kHz

OUT RMS

G = +1, R = 600WL

G = +1, R = 2k G = 1, R = 600

L L

W

- W

G = 1, R = 2k G = +11, R = 600 G = +11, R = 2k

- W

W W

L L L

0.0001

0.00001

-

- 120

140

Total Harmonic Distortion + Noise (%) Total Harmonic Distortion + Noise (dB)

10 100 1k 10k 20k

Frequency (Hz)

V = 3V BW = 80kHz

OUT RMS

G = +1, R = 600WL

G = +1, R = 2k G = 1, R = 600

L L

W

- W

G = 1, R = 2k G = +10, R = 600 G = +10, R = 2k

- W

W W

L L L

0.01

0.001

0.0001

0.00001

-

-

-

- 80

100

120

140

Total Harmonic Distortion + Noise (dB)

Total Harmonic Distortion + Noise (%)

20 100 1k 10k 20k

Frequency (Hz)

RSOURCE= 600W RSOURCE= 300W RSOURCE= 150W

RSOURCE= 0W

V = 3V BW = 80kHz

OUT RMS

OPA1611 +15V

-15V RL RSOURCE

Typical Characteristics (continued)

At T_A= +25°C, V_S= ±15 V, and R_L= 2 kΩ, unless otherwise noted.

Figure 8. THD+N Ratio vs Frequency Figure 7. THD+N Ratio vs Frequency

Figure 9. THD+N Ratio vs Frequency Figure 10. THD+N Ratio vs Frequency

Figure 11. THD+N Ratio vs Output Amplitude Figure 12. Intermodulation Distortion vs Output Amplitude

2V/div

Time (0.5 s/div)m G = +1

C = 50pF R = 2k

L

L W

R = 0W_F

R = 75W_F

See ,

section Applications Information Input Protection

2V/div

Time (0.5 s/div)m G = 1

C = 50pF R = 2k

-

W

L L

20mV/div

Time (0.1 s/div)m

G = +1 C = 50pF_L

+15V

-15V R_L C_L OPA1611

Time (0.1 s/div)m

20mV/div

G = 1 C = 50pF

-

L

+15V

-15V RF=2kW RI=2kW

CF=5.6pF

CL OPA1611

1 10

Frequency (Hz)

100M 10k

100 1k 100k 1M 10M

-PSRR +PSRR

CMRR 160

140 120 100 80 60 40 20 0 Common-ModeRejectionRatio(dB) Power-SupplyRejectionRatio(dB) -

- - - - - - - - -

80 90 100 110 120 130 140 150 160 170 -180

Channel Separation (dB)

10

Frequency (Hz)

100k

100 1k 10k

V = 15VS ± V_OUT= 3.5V_RMS G = +1

R = 2kWL

R = 600WL

R = 5kWL

Typical Characteristics (continued)

At T_A= +25°C, V_S= ±15 V, and R_L= 2 kΩ, unless otherwise noted.

Figure 13. Channel Separation vs Frequency Figure 14. CMRR and PSRR vs Frequency (Referred to Input)

Figure 15. Small-Signal Step Response (100 mV) Figure 16. Small-Signal Step Response (100 mV)

Figure 17. Large-Signal Step Response Figure 18. Large-Signal Step Response

80 70 60 50 40 30 20 10 0 10 20 - - IIOSBand(nA)

-18 -12 -6 0 6 12 18

Common-Mode Voltage (V) -IB

+I_B

I_OS V = 18V_S ±

Common-Mode Range

5.0

4.5

4.0

3.5

3.0

2.5

2.0 IQ(mA)

-40 -15 10 35 60 85

Temperature ( C)° 1.0

0.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1.0 - - - - - AOL(V/V)m

-40 -15 10 35 60 85

Temperature ( C)° 2kW

10kW

120

100

80

60

40

20

0 IandICurrent(nA)BOS

-40 -15 10 35 50 85

Temperature ( C)° -IB

+I_B

I_OS 50

40

30

20

10

0

Overshoot (%)

0 100 200 300 400 500 600

Capacitive Load (pF) G = +1

R = 0WS

R = 50WS

R = 25WS

+15V

-15V RS

CL OPA1611

RL

25

20

15

10

5

0

Overshoot (%)

0 100 200 300 400 500 600 700 800 900 1000 Capacitive Load (pF)

G = 1-

R = 0WS

R = 50WS

R = 25W_S

OPA1611 R =I 2kW

RS CL CF= 5.6pF

RF= 2kW +15V

-15V

Typical Characteristics (continued)

At T_A= +25°C, V_S= ±15 V, and R_L= 2 kΩ, unless otherwise noted.

Figure 20. Small-Signal Overshoot vs Capacitive Load Figure 19. Small-Signal Overshoot vs Capacitive Load

(100-mV Output Step) (100-mV Output Step)

Figure 22. IBand IOSvs Temperature Figure 21. Open-Loop Gain vs Temperature

Figure 23. IBand IOSvs Common-Mode Voltage Figure 24. Quiescent Current vs Temperature

15

14

13

OutputVoltage(V)

-

-

- 13

14

15

0 10 20 30 40 50

Output Current (mA) +85 C°

+25 C°

-40 C° V = 15V

Dual version with both channels driven simultaneously

S ±

Z()WO

10 10k

0.1

Frequency (Hz)

100M 1

100 1k 10k

10 100 1k

100k 1M 10M

75 70 65 60 55 50 45 40 35 30 ISC(mA)

-50 -25 0 25 50 75 100 125

Temperature ( C)° +I_SC

-ISC

4.0 3.9 3.8 3.7 3.6 3.5 3.4 3.3 3,2 3.1 3.0

0 4 8 12 16 20 24 28 32 36

Supply Voltage (V) IQ(mA)

Specified Supply-Voltage Range

Typical Characteristics (continued)

At T_A= +25°C, V_S= ±15 V, and R_L= 2 kΩ, unless otherwise noted.

Figure 25. Quiescent Current vs Supply Voltage Figure 26. Short-Circuit Current vs Temperature

Figure 28. Open-Loop Output Impedance vs Frequency Figure 27. Output Voltage vs Output Current

Pre-Output Driver OUT

V- V+

IN-

IN+

7 Detailed Description

7.1 Overview

The OPA161x family of bipolar-input operational amplifiers achieve very low 1.1-nV/√Hz noise density with an ultralow distortion of 0.000015% at 1 kHz. The rail-to-rail output swing, within 600 mV with a 2-kΩ load, increases headroom and maximizes dynamic range. These devices also have a high output drive capability of ±40 mA. The wide supply range of ±2.25 V to ±18 V, on only 3.6 mA of supply current per channel, makes them applicable to both 5V systems and 36V audio applications. The OPA1611 and OPA1612 op amps are unity-gain stable and provide excellent dynamic behavior over a wide range of load conditions.

7.2 Functional Block Diagram

Figure 29. OPA1611 Simplified Schematic

7.3 Feature Description

7.3.1 Power Dissipation

The OPA1611 and OPA1612 series op amps are capable of driving 2-kΩ loads with a power-supply voltage up to ±18 V. Internal power dissipation increases when operating at high supply voltages. Copper leadframe construction used in the OPA1611 and OPA1612 series op amps improves heat dissipation compared to conventional materials. Circuit board layout can also help minimize junction temperature rise. Wide copper traces help dissipate the heat by acting as an additional heat sink. Temperature rise can be further minimized by soldering the devices to the circuit board rather than using a socket.

7.3.2 Electrical Overstress

Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.

These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.

Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly.

R_F

Op-Amp Core R_I

R_L

V_IN⁽¹⁾ I_D

-In

Out +In

ESD Current- Steering Diodes

Edge-Triggered ESD Absorption Circuit +V_S

+V

-V

-VS

OPA1611

Feature Description (continued)

Having a good understanding of this basic ESD circuitry and its relevance to an electrical overstress event is helpful. Figure 30shows the ESD circuits contained in the OPA161x series (indicated by the dashed line area).

The ESD protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where they meet at an absorption device internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation.

(1) VIN= +VS+ 500 mV.

Figure 30. Equivalent Internal ESD Circuitry and its Relation to a Typical Circuit Application

An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, high- current pulse when discharged through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent damage to the core. The energy absorbed by the protection circuitry is then dissipated as heat.

When an ESD voltage develops across two or more of the amplifier device pins, current flows through one or more of the steering diodes. Depending on the path that the current takes, the absorption device may activate.

The absorption device internal to the OPA1611 triggers when a fast ESD voltage pulse is impressed across the supply pins. Once triggered, the absorption device quickly activates and clamps the ESD pulse to a safe voltage level.

When the operational amplifier connects into a circuit such as the one Figure 30 shows, the ESD protection components are intended to remain inactive and not become involved in the application circuit operation.

However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin.

If this condition occurs, some of the internal ESD protection circuits may possibly be biased on, and conduct current. Any such current flow occurs through steering diode paths and rarely involves the absorption device.

Figure 30 shows a specific example where the input voltage, V_IN, exceeds the positive supply voltage (+V_S) by 500 mV or more. Much of what happens in the circuit depends on the supply characteristics. If +V_Scan sink the current, one of the upper input steering diodes conducts and directs current to +V_S. Excessively high current levels can flow with increasingly higher V_IN. As a result, the datasheet specifications recommend that applications limit the input current to 10 mA.

OPA1611 Output R_F

Input

-

+ R_I

Feature Description (continued)

If the supply is not capable of sinking the current, V_INmay begin sourcing current to the operational amplifier, and then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. In extreme but rare cases, the absorption device triggers on while +V_S and –V_S are applied. If this event happens, a direct current path is established between the +V_S and –V_Ssupplies. The power dissipation of the absorption device is quickly exceeded, and the extreme internal heating destroys the operational amplifier.

Another common question involves what happens to the amplifier if an input signal is applied to the input while the power supplies +V_Sor –V_Sare at 0 V. Again, the result depends on the supply characteristic while at 0 V, or at a level below the input signal amplitude. If the supplies appear as high impedance, then the operational amplifier supply current may be supplied by the input source via the current steering diodes. This state is not a normal bias condition; the amplifier most likely does not operate normally. If the supplies are low impedance, then the current through the steering diodes can become quite high. The current level depends on the ability of the input source to deliver current, and any resistance in the input path.

If there is an uncertainty about the ability of the supply to absorb this current, external zener diodes may be added to the supply pins; see Figure 30. The zener voltage must be selected such that the diode does not turn on during normal operation. However, the zener diode voltage must be low enough so that the zener diode conducts if the supply pin begins to rise above the safe operating supply voltage level.

7.3.3 Operating Voltage

The OPA161x series op amps operate from ±2.25-V to ±18-V supplies while maintaining excellent performance.

The OPA161x series can operate with as little as +4.5 V between the supplies and with up to +36 V between the supplies. However, some applications do not require equal positive and negative output voltage swing. With the OPA161x series, power-supply voltages do not need to be equal. For example, the positive supply could be set to +25 V with the negative supply at –5 V.

In all cases, the common-mode voltage must be maintained within the specified range. In addition, key parameters are assured over the specified temperature range of T_A= –40°C to +85°C. Parameters that vary with operating voltage or temperature are shown in theTypical Characteristics.

7.3.4 Input Protection

The input terminals of the OPA1611 and the OPA1612 are protected from excessive differential voltage with back-to-back diodes, as Figure 31 shows. In most circuit applications, the input protection circuitry has no consequence. However, in low-gain or G = +1 circuits, fast ramping input signals can forward bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. This effect is illustrated in Figure 17of the Typical Characteristics. If the input signal is fast enough to create this forward bias condition, the input signal current must be limited to 10 mA or less. If the input signal current is not inherently limited, an input series resistor (R_I) or a feedback resistor (R_F) can be used to limit the signal input current. This input series resistor degrades the low-noise performance of the OPA1611 and is examined in theNoise Performancesection.

Figure 31shows an example configuration when both current-limiting input and feedback resistors are used.

Figure 31. Pulsed Operation

VOLTAGE NOISE SPECTRAL DENSITY vs SOURCE RESISTANCE 10k

1k

100

10

1

100 1k 10k 100k 1M

Source Resistance, R ( )_S W

Resistor Noise

E_O²= e_n²+ (i R ) + 4kTR_{n S}² _S

RS

EO

Total Output Voltage Noise

Voltage Noise Spectral Density, EO(nV/)Hz?

8 Application and Implementation

8.1 Application Information

The OPA1611 and OPA1612 are unity-gain stable, precision op amps with very low noise; these devices are also free from output phase reversal. Applications with noisy or high-impedance power supplies require decoupling capacitors close to the device power-supply pins. In most cases, 0.1-μF capacitors are adequate.

8.2 Noise Performance

Figure 32 shows the total circuit noise for varying source impedances with the op amp in a unity-gain configuration (no feedback resistor network, and therefore no additional noise contributions).

The OPA1611 (GBW = 40 MHz, G = +1) is shown with total circuit noise calculated. The op amp itself contributes both a voltage noise component and a current noise component. The voltage noise is commonly modeled as a time-varying component of the offset voltage. The current noise is modeled as the time-varying component of the input bias current and reacts with the source resistance to create a voltage component of noise. Therefore, the lowest noise op amp for a given application depends on the source impedance. For low source impedance, current noise is negligible, and voltage noise generally dominates. The low voltage noise of the OPA161x series op amps makes them a good choice for use in applications where the source impedance is less than 1 kΩ.

8.2.1 Detailed Design Procedure

The equation inFigure 32shows the calculation of the total circuit noise, with these parameters:

• e_n= voltage noise

• I_n= current noise

• R_S= source impedance

• k = Boltzmann’s constant = 1.38 × 10^–23J/K

• T = temperature in degrees Kelvin (K)

8.2.2 Application Curve

Figure 32. Noise Performance of the OPA1611 In Unity-Gain Buffer Configuration

8.2.3 Basic Noise Calculations

Design of low-noise op amp circuits requires careful consideration of a variety of possible noise contributors:

noise from the signal source, noise generated in the op amp, and noise from the feedback network resistors. The

R₁

R₂

E_O

R₁

R₂

E_O R_S

V_S R_S

V_S

Noise in Noninverting Gain Configuration

Noise in Inverting Gain Configuration

Noise at the output:

E_O²=

Where e = Ö_S 4kTR ´_S = thermal noise of R_S

2

1 + R₂

R₁ e_n²+ e₁²+ e₂²+ (i R ) + e_{n 2}² _S²+ (i_nR )_S²

1 + R₂ R₁

R₂ R₁

e = Ö₁ 4kTR ´₁ = thermal noise of R₁

2

1 + R₂ R₁

e = Ö₂ 4kTR = thermal noise of R_{2 2}

Noise at the output:

E_O²=

Where e = 4kTR_S Ö _S´ = thermal noise of R_S

2

1 + R₂

R + R_{1 S} e_n²+ e₁²+ e₂²+ (i R ) + e_{n 2}² _S²

R₂ R + R_{1 S}

R₂ R + R_{1 S}

e = 4kTR₁ Ö ₁´ = thermal noise of R₁

e = 4kTR₂ Ö ₂= thermal noise of R₂

Noise Performance (continued)

Figure 33 shows both inverting and noninverting op amp circuit configurations with gain. In circuit configurations with gain, the feedback network resistors also contribute noise.

The current noise of the op amp reacts with the feedback resistors to create additional noise components. The feedback resistor values can generally be chosen to make these noise sources negligible. The equations for total noise are shown for both configurations.

For the OPA161x series op amps at 1 kHz, e_n= 1.1 nV/√Hz and i_n= 1.7 pA/√Hz.

Figure 33. Noise Calculation in Gain Configurations

R₂

OPA1611 R₁

Signal Gain = 1+

Distortion Gain = 1+

R₃ V = 3V_{O RMS}

Generator Output

Analyzer Input

Audio Precision System Two⁽¹⁾ with PC Controller

Load

SIG.

GAIN DIST.

GAIN R₁ R₂ R₃

¥ 4.99kW

1kW 4.99kW

10W 49.9W 1

-1 101 R₂ 101

R₁ R₂ R II R_{1 3}

+10 110 549W 4.99kW 49.9W

8.3 Total Harmonic Distortion Measurements

The OPA161x series op amps have excellent distortion characteristics. THD + noise is below 0.00008% (G = +1, V_O = 3 V_RMS, BW = 80 kHz) throughout the audio frequency range, 20 Hz to 20 kHz, with a 2-kΩ load (see Figure 7for characteristic performance).

The distortion produced by OPA1611 series op amps is below the measurement limit of many commercially available distortion analyzers. However, a special test circuit (such as Figure 34shows) can be used to extend the measurement capabilities.

Op amp distortion can be considered an internal error source that can be referred to the input.Figure 34shows a circuit that causes the op amp distortion to be 101 times (or approximately 40 dB) greater than that normally produced by the op amp. The addition of R₃to the otherwise standard noninverting amplifier configuration alters the feedback factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for error correction is reduced by a factor of 101, thus extending the resolution by 101. Note that the input signal and load applied to the op amp are the same as with conventional feedback without R₃. Keep the value of R₃small to minimize its effect on the distortion measurements.

Validity of this technique can be verified by duplicating measurements at high gain and/or high frequency where the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were made with an audio precision system two distortion and noise analyzer, which greatly simplifies such repetitive measurements. The measurement technique can, however, be performed with manual distortion measurement instruments.

(1) For measurement bandwidth, seeFigure 7throughFigure 12.

Figure 34. Distortion Test Circuit

8.4 Capacitive Loads

The dynamic characteristics of the OPA1611 and OPA1612 have been optimized for commonly encountered gains, loads, and operating conditions. The combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier and can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the output. The simplest way to achieve this isolation is to add a small resistor (R_Sequal to 50Ω, for example) in series with the output.

This small series resistor also prevents excess power dissipation if the output of the device becomes shorted.

Figure 19andFigure 20illustrate graphs of Small-Signal Overshoot vs Capacitive Load for several values of R_S. Also, refer to Applications Bulletin AB-028, Feedback Plots Define Op Amp AC Performance (SBOA015), available for download from the TI web site, for details of analysis techniques and application circuits.

I_OUTL+

Audio DAC with Differential

Current

Outputs OPA1611

8200pF

100W

I_OUTL-

OPA1611 0.1 Fm 2200pF

820W

0.1 Fm

2700pF

-V_A ( 15V)- +V_A

(+15V)

680W 620W

330W

-V_A ( 15V)- +V_A

(+15V)

0.1 Fm

0.1 Fm

330W 2700pF

OPA1611 0.1 Fm 2200pF

820W

0.1 Fm -V_A ( 15V)- +V_A

(+15V) 680W 620W

L Ch Output

8.5 Application Circuit

Figure 35shows how to use the OPA1611 as an amplifier for professional audio headphones. The circuit shows the left side stereo channel. An identical circuit is used to drive the right side stereo channel.

Figure 35. Audio DAC Post Filter (I/V Converter and Low-Pass Filter)

9 Power-Supply Recommendations

The OPA161x is specified for operation from 4.5 V to 36 V (±2.25 V to ±18 V); many specifications apply from –40°C to +85°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in theTypical Characteristicssection.

CAUTION

Supply voltages larger than 40 V can permanently damage the device; see the Absolute Maximum Ratings.

Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high- impedance power supplies. For more detailed information on bypass capacitor placement, refer to the Typical Characteristicssection.