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Tyrant: A High Performance

Storage over IP Switch Engine

Stuart Oberman,

Rodney Mullendore, Kamran Malik, Anil Mehta, Keith Schakel,

(2)

Background: Direct-Attached Storage

Direct-Attached Storage

– Expansion beyond server’s internal drive capacity

– Tape backup

– Often used with Network-Attached Storage (NAS) – High performance SCSI or

Fibre Channel connections

LAN / NAS

(3)

Storage Area Networks – SANs

LAN / NAS

SAN

Storage Area Networks

– Pooling of external storage devices for better utilization and availability

– LAN-free backup – Serverless backup

– Non-disruptive expansion and maintenance

– Leverage existing staff to manage three or four times more storage

– SAN ROI estimates* range from 65-297 percent

*Source: CSFB, June 2001

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No Native Fibre Channel Extension

FC SAN FC SAN FC Switch FC Switch FC Switch FC Switch

(5)

IP SAN

IP SAN

Integrated IP SAN, MAN, and WAN Fabric

Unified

IP SAN-MAN-WAN Fabric

Optimal routing decisions are made by the integrated

IP SAN-MAN-WAN fabric

No more “islands”

Familiar IP and Ethernet management tools

Nishan

Nishan Nishan

(6)

Nishan Systems’ Framework for IP Storage

OPEN

Standards-Based

• Future Interfaces

• SCSI Disk, RAID, Tape • SCSI Host Bus Adapters

• FC Disk, RAID, Tape • FC Host Bus Adapters • FC SANs

• SAN, LAN, MAN, WAN • IP Routers and Gigabit

Ethernet Switches

• 10 Gigabit Ethernet

• Network Attached

(7)

Tyrant: An Introduction

• Tyrant: a switch engine used to build many sizes of IP Storage Area Network switches

• Two categories of switches:

– Low density: <=32 ports – High density: > 32 ports

• Tyrant integrates hardware to build both categories supporting

– Fibre Channel switch ports, 1Gbps and 2Gbps

– Fibre Channel arbitrated loop ports, 1Gbps and 2Gbps – Gigabit Ethernet

(8)

Tyrant: Major Features

• Four 1Gbps Ethernet MACs

• Four 1Gbps / 2Gbps Fibre Channel MACs

– 1Gbps or 2Gbps – FC-AL and FC-SW

• Four Gigabit network processor interfaces • Four flexible packet schedulers

• Four programmable encapsulation engines

• Distributed shared-memory controller supporting 2MB SRAM per chip

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(10)

Cut-thru

• Each Tyrant has side-band cut-thru request / grant interface

• Allows for each ingress port to request cut-thru to any egress port

• If cut-thru is granted, packets are switched in distributed fashion, with no writes to SRAM

• First-byte-in to MAC to first-byte-out of MAC latency:

– Less than 2us

– Any port to any port

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Early Forwarding

• Reduced switch latency possible even when packet stored to SRAM

• Entire store-and-forward not required • Store only minimum amount of packet:

– Programmable stored amount based upon link speed

difference of ingress and egress ports (GE, FC, or 2G FC) – Ensures no underrun of egress port

(12)

Packet Scheduler

• True output queues at each egress port

– Requires fast and wide shared memory

– Guarantees maximum switching throughput – Single trip to memory

• 256 unique output queues per port • Scheduler features:

– Three level hierarchy

– Each level may separately use strict priority or weighted-fair-queuing (WFQ) / weighted-round-robin (WRR)

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Full-Duplex FC-AL

• FC arbitrated loop supports 126 devices

• Loop operates either half-duplex or full-duplex

• In full-duplex configuration, target device may “open” switch port to send it data

• If switch port can reorganize its output data while receiving target device’s data, bandwidth is

(15)

Optimized Full-Duplex FC-AL Performance

• Bin packets destined for different target devices using one output queue per loop device

• Separate packet scheduler interface allows FC MAC to directly select particular queue for transmission

• Switch port opened by loop device:

(16)

Programmable Encapsulation Engine

• Programmable encapsulation engine per egress port used to implement IP storage protocols

– Allows flexibility for evolving IP storage standards

• Network processor on ingress FC port adds Encapsulation Instructions to header of packet • Encapsulation engine at egress IP port executes

microcode to form encapsulated IP storage packets • Encapsulation engine performs:

– IP address lookups

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Application Example 1: 16-port Switch

0 1 2 3 4 5 6 7 Tyrant1 Tyrant2 Tyrant3 8 9 10 11 12 13 14 15 SRAM

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Application Example 2: Chassis Line Card

0 Tyrant0 SRAM 1 External Fabric Transceiver 2 Tyrant1 3 4 Tyrant2 5 Each port may be configured to be GE, 1G FC, or 2G FC Generic

Fabric Interface 10+ Gbps pipe across backplane

to Fabric Card using High Speed

Serial Links

NP

SRAM NP

SRAM NP

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Physical Details

• IBM 0.18um ASIC process: SA-27E • 25 million transistors

• 15mm x 15mm die size • 928 signal pins

• Nominal power consumption: 16W • Three major clock domains

– 125 MHz – 104 MHz – 53.125 MHz

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References

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