ASL Series Programming Guide

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ASL Series

Programming Guide

visualATE 5.2.3

PN: 071-0490-01 August, 2005

Credence Systems Corporation 1421 California Circle

Milpitas, CA 95035 Tele: (408) 635-4300

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Legal Notice

No part of this publication may be reproduced or transmitted in any form, or transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means—electronic, mechanical, magnetic, optical, chemical, manual or otherwise—without the prior written permission of Credence Systems Corporation. Credence Systems Corporation makes no representations or warranties with respect to the contents hereof and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. Furthermore, Credence reserves the right to revise this publication and to make changes from time to time in the content hereof without obligation of Credence to notify any person of such revision or changes.

Restricted Rights Legend

Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the rights in Technical Data and Computer Software Clause at DFARS 252.227-7013 or in subparagraph (c)(2) of the Commercial Computer Software - Restricted Rights Clause at FAR 52.227-19, as applicable.

Notices:

Credence, Kalos, ASL x000, Sapphire and other Credence products and services mentioned herein as well as their respective logos are trademarks or registered trademarks of Credence Systems Corporation in the United States and other countries. Gemini is a registered trademark of Micro-Probe, Inc. and is licensed for use to Credence Systems Corporation.

The following are trademarks or registered trademarks of their respective companies or organizations: UNIX / X/Open Company Ltd.

Sun Microsystems, Sun Workstation, OpenWindows, SunOS, NFS, Sun-4, SPARC, SPARCstation, Java, Solaris / Sun Microsystems

Ethernet / Xerox Corporation

Microsoft, Windows, Windows NT / Microsoft Corporation

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C

ONTENTS

1 - About this Guide . . . 25

Scope of this Guide . . . 26

Audience . . . 26

Prerequisites . . . 26

Organization . . . 26

Notation Conventions . . . 27

How to Use the Programming Guide . . . 28

Syntax Format . . . 28

Programming Sample . . . 28

connect_vi_force . . . 29

Related Publications . . . 31

Operation Safety Summary . . . 32

Service Safety Summary . . . 34

Electromagnetic Compatibility (EMC) System Requirements . . . 35

ASL-Based Series Test System Immunity . . . 35

ASL-Based Series Test System Emissions . . . 35

2 - visualATE Overview . . . 37

visualATE System Software . . . 38

Test Programs . . . 38

Limit Sets . . . 38

Program Creation Steps . . . 39

The Program Selection Window . . . 41

Creating a New Test Program File . . . 42

Directories for Test Program Files . . . 44

Editing Test Program Files . . . 44

Updating Test Programs after Changing the Parent List . . . 45

The ASL 1000 Tester . . . 47

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Co nten ts

Function Calls . . . 59

Waveform Generator Commands . . . 59

init . . . 59

set_path . . . 59

set_bw_ref . . . 60

set_level . . . 62

Waveform Memory and Clock Commands . . . 63

ldram . . . 63 load_data . . . 64 load_address . . . 64 card.clock . . . 65 start . . . 66 stop . . . 66 AC Meter Commands . . . 67 set_meas_mode . . . 67 measure . . . 68 close_relay open_relay . . . 68

ACS Simplified Diagram . . . 70

ACS Programming Examples . . . 71

Sinusoid . . . 71

Trapezoid . . . 71

4 - DCC - Data Converter Card . . . 73

Function Calls . . . 74 init . . . 74 measure_average . . . 74 select_adc_mux . . . 75 select_adc_range . . . 75 select_iva_range select_ivb_range . . . 76 set_high_level . . . 77 set_low_level . . . 77 set_prec_ref . . . 78 set_prec_ref_fine . . . 79 set_current_force . . . 79 set_servo_hi . . . 80 set_servo_lo . . . 80 set_servo_ref . . . 81

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Contents close_switch open_switch . . . 83 close_relay open_relay . . . 84 clear_relays . . . 85 DCC Programming Examples . . . 86

TUE, INL, and DNL (8-bit ADC using the DCC) . . . 86

Contact . . . 88

Input Current . . . 89

5 - DDD - Digital Driver and Detector . . . 91

Single Board Function Calls . . . 92

Channel Commands . . . 92 init . . . 92 ddd_disconnect_drivers . . . 92 ddd_set_voltage_ref . . . 93 ddd_set_hi_level . . . 93 ddd_set_lo_level . . . 94

Clock and Timing Commands . . . 94

ddd_set_clock_freq . . . 94

ddd_set_clock_period . . . 95

ddd_set_no_delay . . . 95

ddd_set_delay . . . 96

Pattern Commands . . . 97

ddd_load_pattern (non-loop mode) . . . 97

ddd_load_pattern (loop mode) . . . 98

ddd_end_pattern . . . 98

ddd_run_pattern (non-loop mode) . . . 99

ddd_run_pattern (loop mode) . . . 100

ddd_stop_pattern . . . 100

ddd_read_pattern . . . 101

ddd_compare_pattern . . . 101

Multiple Board Function Calls . . . 103

Channel Commands . . . 103

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Co nten ts

ddd_set_clock_period — Master and Slave . . . 107

ddd_disable_clocks — Master and Slave . . . 107

ddd_set_no_delay — Master and Slave . . . 108

ddd_set_delay — Master and Slave . . . 108

Pattern Commands . . . 109

ddd_load_pattern —- Master and Slave (non-loop mode) . . . 109

ddd_load_pattern —- Master and Slave (loop mode) . . . 110

ddd_end_pattern — Master and Slave . . . 111

ddd_set_slave_pattern — Slave . . . 111

ddd_set_master_pattern — Master . . . 112

ddd_run_slave_pattern — Slave (non-loop function) . . . 112

ddd_run_master_pattern — Master (non-loop function) . . . 113

ddd_run_slave_pattern — Slave (loop function) . . . 113

ddd_run_master_pattern — Master (loop function) . . . 114

ddd_stop_pattern —- Master and Slave . . . 114

ddd_read_pattern — Master and Slave . . . 115

ddd_compare_pattern — Master and Slave . . . 115

DDD Simplified Diagram . . . 117

Vector Format Examples . . . 118

No Delays with 1- and 0-Data . . . 118

Delays with 1- and 0-Data and Zs (RT1) . . . 119

Delays with 1- and 0-Data and Ts (RT0) . . . 120

Delays with Zs (RT1) and Ts (RT0) . . . 121

Delays with Zs (RT1) . . . 122

Delays with Ts (RT0) . . . 123

6 - DOAL - Dual Op Amp Loop . . . 125

Theory of the DOAL . . . 126

Opamp Loop . . . 126

Relay and Switch Action . . . 127

Channel Action . . . 127

Measurement Circuit Description . . . 128

Function Calls . . . 130 init . . . 130 set_ia_offset_dac ch1_ia_offset_dac . . . 130 set_output_dac . . . 131 set_output_voltage . . . 132 dac_output_voltage . . . 132

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Contents set_int_dac_ch0 set_int_dac_ch1 . . . 133 convert_read_adc . . . 134 select_adc_mux . . . 134 measure_average . . . 135 close_relay open_relay . . . 136 clear_relays . . . 137 close_switch open_switch . . . 137 clear_switches . . . 138

DOAL Simplified Diagrams: CH0 and CH1 . . . 140

Programming Examples . . . 143

Testing VOS on a Dual Opamp . . . 143

Testing Input Bias Current on a Dual Opamp . . . 146

7 - DVI - Dual Voltage/Current Source . . . 151

DVI Theory . . . 152 Current Direction . . . 153 Function Calls . . . 155 init . . . 155 set_voltage . . . 155 set_voltage_range . . . 156 set_diff_range . . . 158 set_current . . . 159 set_current_range . . . 160 set_meas_mode . . . 162 measure . . . 162 measure_average . . . 163 set_compensation . . . 163 close_relay open_relay . . . 164 DVI-2000 Differences . . . 166 init . . . 166 set_voltage . . . 166

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Co nten ts

Duty Cycle . . . 172

DVI Simplified Diagram . . . 174

DVI Programming Example . . . 177

Supply Current . . . 177

8 - HVS - High-Voltage Source . . . 179

Function Calls . . . 180 init . . . 180 set_voltage . . . 180 set_current . . . 181 set_meas_mode . . . 182 measure . . . 183 measure_average . . . 183 supply_off . . . 184 close_relay open_relay . . . 184 HVS Simplified Diagram . . . 186 HVS Programming Example . . . 187

9 - LZB - Link/Zener Blower . . . 189

Function Calls . . . 190 init . . . 190 set_voltage . . . 190 set_clamp . . . 191 set_current . . . 191 set_meas_mode . . . 192 measure . . . 192 convert_read_adc . . . 193 close_relay open_relay . . . 193 LZB Simplified Diagram . . . 195 Programming Example . . . 196

10 - MUX - Resource Multiplexer . . . 199

MUX Theory . . . 200

User Bus Lines . . . 200

Function Calls . . . 201

init . . . 201 close_relay

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Contents

11 - MVS - Medium-Voltage Source . . . 205

Function Calls . . . 206 init . . . 206 set_voltage . . . 206 set_current . . . 207 set_meas_mode . . . 208 measure . . . 209 measure_average . . . 209 supply_off . . . 210 close_relay open_relay . . . 210 MVS Simplified Diagram . . . 212

12 - OFS - Octal Floating Source . . . 213

Function Calls . . . 214 init . . . 214 set_voltage . . . 214 set_current . . . 215 set_meas_mode . . . 216 measure . . . 217 measure_average . . . 217 supply_off . . . 218 close_relay open_relay . . . 218

OFS Simplified Diagram . . . 220

13 - OVI - Octal Voltage/Current Source . . . 221

Function Calls . . . 222 init . . . 222 set_voltage . . . 222 set_current . . . 223 set_meas_mode . . . 225 measure . . . 226 measure_average . . . 226 connect

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Co nten ts set_current . . . 233 set_meas_mode . . . 234 measure . . . 234 measure_average . . . 235 charge_on . . . 235 charge_off . . . 236 supply_off . . . 236 close_switch open_switch . . . 237

PVI 10 Formula Example . . . 238

PVI 100 Function Calls . . . 240

init . . . 240 set_voltage . . . 240 set_current . . . 241 set_meas_mode . . . 242 measure . . . 242 measure_average . . . 243 charge_on . . . 243 charge_off . . . 244 close_switch open_switch . . . 244 volt_meas_range . . . 245 slow_comp normal_comp fast_comp . . . 246 current_fast current_normal . . . 247 voltage_fast voltage_normal . . . 247 kelvin_on kelvin_off . . . 248 drive_on drive_off . . . 248 drive_meas_off . . . 249

PVI-100 Test Points . . . 250

PVI 100 Simplified Diagram . . . 252

15 - TIA - Time Interval Analyzer . . . 253

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Contents measure . . . 256 measure_freq . . . 256 measure_skew . . . 257 read_single_pulse . . . 258 set_measure . . . 258 set_sampling_mux . . . 259 set_threshold . . . 260 set_timeout . . . 260 setup_frequency . . . 261 setup_single_pulse . . . 262 setup_skew . . . 263 std_dev_freq . . . 263 std_dev_time . . . 264 average . . . 265 average_skew . . . 265 convert_samples . . . 266 convert_freq_samples . . . 267 convert_skew_samples . . . 267 frequency . . . 268 read_data . . . 268 read_skew . . . 269 Setup Variables . . . 270 done_setup . . . 270 channel_enabled . . . 270 clock_source . . . 271 impedance . . . 272 coupling . . . 272 threshold_volts_percent . . . 273 a_count b_count . . . 274 chan_a_result chan_b_result . . . 275 conversion_done[channel] . . . 275 max_limit_active min_limit_active . . . 276

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Co nten ts

16 - TMU - Time Measurement Unit . . . 283

TMU Theory . . . 284

Measurement Resolution and Interpolation . . . 286

Input Channels . . . 288

Arming the TMU . . . 290

Programming Examples . . . 291

Measuring Rise Time . . . 291

Measuring Fall Time . . . 291

Measuring Propagation Delay . . . 291

Measuring a Periodic Waveform . . . 292

TMU Start and Stop Holdoff . . . 293

TMU Counting Features . . . 293

Start Holdoff . . . 293

Stop Holdoff . . . 293

TMU Start and Stop Holdoff TIME . . . 294

TMU Start and Stop Holdoff EVENTS . . . 295

Function Calls . . . 297 init . . . 297 reset . . . 297 start_trigger_setup stop_trigger_setup . . . 298 arm . . . 299 read . . . 300 read_now . . . 300 get_status . . . 301 set_control clear_control . . . 302 close_relay open_relay . . . 303 start_holdoff stop_holdoff . . . 304

17 - Additional User Functions . . . 307

STDF User Functions . . . 308

MIR Get Functions . . . 308

MIR Set Functions . . . 309

MRR Get Functions . . . 309

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Contents

WIR Get Functions . . . 311

WIR Set Functions . . . 311

WRR Get Functions . . . 311 WRR Set Functions . . . 311 WCR Get Functions . . . 312 WCR Set Functions . . . 312 PTR Get Functions . . . 312 PTR Set Functions . . . 312 Wafer Functions . . . 313 Get_missing_wafer . . . 313 Set_missing_wafer . . . 313 Set_completed_wafer . . . 314 Get_wafer_in_progress . . . 315 Set_wafer_in_progress . . . 315 Get_sublot_name . . . 316 Set_sublot_name . . . 316 Get_total_wafer . . . 317 Set_total_wafer . . . 317 Get_wafer_list . . . 318 Set_wafer_list . . . 318 Send_eow . . . 319 Set_prober_control . . . 319 Get_prober_control . . . 320 Get_wafer_id . . . 320 Miscellaneous Functions . . . 322 StopProgram . . . 322 . . . RunProgram 322 GetLotIdName . . . 323 SetLotIdName . . . 323 GetSerialNum . . . 324 SetSerialNum . . . 324 ClearLotSummaryComments . . . 325 AppendLotSummaryComments . . . 325 SetPlotData . . . 326 GetProgramName . . . 327

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Co nten ts GetDeviceName . . . 331 SetDeviceName . . . 331 GetProgramModeCode . . . 332 SetProgramModeCode . . . 332 GetProgramRevision . . . 333 SetProgramRevision . . . 333 GetProgramTestCode . . . 334 SetProgramTestCode . . . 335 GetOperationStepNumber . . . 335 SetOperationStepNumber . . . 336 GetTotalPass . . . 336 GetTotalFail . . . 337

Modal Dialog Overview . . . 338

Support Code for Modal Dialog . . . 339

SetStatusDialogHasYesButton . . . 341 SetStatusDialogHasNoButton . . . 342 SetStatusDialogHasOKButton . . . 343 SetStatusDialogHasCancelButton . . . 344 SetDialogEditFieldLeftSideText . . . 345 SetDialogEditFieldRightSideText . . . 346 SetDialogTopMessage . . . 347 SetDialogBottomMessage . . . 348 SetDialogEditFieldInitializationText . . . 349 RunModalDialog . . . 350 GetStatusDialogYesButtonHasBeenPushed . . . 351 GetStatusDialogNoButtonHasBeenPushed . . . 351 GetStatusDialogOKButtonHasBeenPushed . . . 352 GetStatusDialogCancelButtonHasBeenPushed . . . 352 GetEditFieldText . . . 353 Code Example 1 . . . 353 Code Example 2 . . . 355 Datalog Functions . . . 359 Functions . . . 359 func.dlog->power . . . 359 func.dlog->set_test_no . . . 359 func.dlog->test_val . . . 360 func.dlog->tests[ ].passed_fail . . . 360 func.dlog->set_bin . . . 361 func.dlog->tests[ ].display_results . . . 361

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Contents

A - ASL 1000 Interconnects . . . 365

Slots . . . 366 Supplies . . . 387 Grounds . . . 389 Config . . . 390

B - ASL 3000 Interconnects . . . 391

DUT Board Test Interface . . . 392

Test Interface Connector Sockets . . . 393

Relay Drivers . . . 394

Miscellaneous Signals . . . 395

RF DUT Interface Pinouts . . . 396

Slot 1 . . . 397 Slot 2 . . . 399 Slot 3 . . . 401 Slot 4 . . . 403 Slot 5 . . . 405 Slot 6 . . . 407 Slot 7 . . . 409 Slot 8 . . . 411 Slot 9 . . . 413 Slot 10 . . . 414 Slot 11 . . . 416 Slot 12 . . . 418 Slot 13 . . . 420 Slot 14 . . . 422 Slot 15 . . . 424 Slot 16 . . . 426 Slot 17 . . . 428 Slot 18 . . . 430 Slot 19 . . . 432 Slot 20 . . . 433 Slot 21 . . . 435 Slot 23 . . . 437 Slot 24 . . . 439

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T

ABLES

1 - About this Guide

Table 1. Font Treatments . . . 27

Table 2. Operation Safety Summary . . . 32

Table 3. Service Safety Summary . . . 34

2 - visualATE Overview

Table 4. Directory for Test Program Files . . . 44

Table 5. ASL 1000 Instruments . . . 48

Table 6. MVNA Boards . . . 50

Table 7. RF Modules . . . 51

3 - ACS - AC Source

4 - DCC - Data Converter Card

5 - DDD - Digital Driver and Detector

6 - DOAL - Dual Op Amp Loop

Table 8. DOAL - Relays and Switches Closed on init . . . 127

Table 9. DOAL - Independent Relays and Switches . . . 127

Table 10. Programmable Range Switches . . . 128

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Tables

7 - DVI - Dual Voltage/Current Source

8 - HVS - High-Voltage Source

9 - LZB - Link/Zener Blower

10 - MUX - Resource Multiplexer

11 - MVS - Medium-Voltage Source

12 - OFS - Octal Floating Source

13 - OVI - Octal Voltage/Current Source

14 - PVI - Pulsed Voltage/Current Source

Table 12. PVI Test Points . . . 252

15 - TIA - Time Interval Analyzer

16 - TMU - Time Measurement Unit

Table 13. Start and Stop Configuration . . . 291

17 - Additional User Functions

A - ASL 1000 Interconnects

Table 14. ASL 1000 Interconnects: Slot 1 . . . 368

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Tables

Table 35. Supply Pins . . . 389

Table 36. Grounds . . . 391

Table 37. Config Pins . . . 392

B - ASL 3000 Interconnects

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F

IGURES

1 - About this Guide

2 - visualATE Overview

Figure 1. List File, DLL, and Test Program Limit Sets . . . 40

Figure 2. Program Selection Window . . . 41

Figure 3. Save As New Program . . . 43

Figure 4. ASL 1000 Hardware Architecture . . . 47

Figure 5. ASL 3000RF Hardware Architecture . . . 49

3 - ACS - AC Source

Figure 6. Basic Digital-to-Analog Action . . . 54

Figure 7. Waveform Memory Bit Description . . . 55

Figure 8. ACS Outputs . . . 56

Figure 9. Waveform Data to Waveform Output Relationships . . . 57

Figure 10. LPF Linearity Graph . . . 61

Figure 11. Amplitude and Offset Level of Output Waveform . . . 62

Figure 12. ACS Simplified Diagram . . . 70

4 - DCC - Data Converter Card

Figure 13. DCC Sample Test Setup . . . 86

5 - DDD - Digital Driver and Detector

Figure 14. DDD Simplified Diagram . . . 117

Figure 15. Using No Delay with 1s and 0s . . . 118

Figure 16. Using Delays with 1s, 0s, and Zs (RT1) . . . 119

Figure 17. Using Delays with 1s, 0s and Ts (RT0) . . . 120

Figure 18. Using Delays with Zs (RT1) and Ts (RT0) . . . 121

Figure 19. Using Delays with Zs (RT1) . . . 122

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Figures

Figure 25. Programmed Negative Current Value with Positive (Sourcing) Current . . 154

Figure 26. Duty Cycle . . . 173 Figure 27. DVI Simplified Diagram . . . 174 Figure 28. DVI Relay Configuration for DVI-200 and DVI-300 . . . 175 Figure 29. DVI Relay Configuration for DVI-2000 only . . . 176

8 - HVS - High-Voltage Source

Figure 30. HVS Simplified Diagram . . . 186 Figure 31. HVS Sample Test Setup . . . 187

9 - LZB - Link/Zener Blower

Figure 32. LZB SImplified Diagram . . . 195

10 - MUX - Resource Multiplexer

Figure 33. MUX Simplified Diagram . . . 203

11 - MVS - Medium-Voltage Source

Figure 34. MVS SImplified Diagram . . . 212

12 - OFS - Octal Floating Source

Figure 35. OFS SImplified Diagram . . . 220

13 - OVI - Octal Voltage/Current Source

Figure 36. OVI Simplified Diagram . . . 229

14 - PVI - Pulsed Voltage/Current Source

Figure 37. PVI-10 Block Diagram . . . 239 Figure 38. PVI 100 Simplified Instrument . . . 252

15 - TIA - Time Interval Analyzer

16 - TMU - Time Measurement Unit

Figure 39. TMU Conceptual Diagram . . . 284 Figure 40. Types of TMU Measurements . . . 285 Figure 41. TMU Conceptual Diagram with Arm and Slope . . . 285 Figure 42. TMU Interpolation Process . . . 287 Figure 43. TMU Input Channel Mux . . . 288 Figure 44. TMU Start and Stop Holdoff Time . . . 294

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Figures

17 - Additional User Functions

Figure 47. Dialog Function Window . . . 338 Figure 48. Modal Dialog Box with YES Button . . . 342 Figure 49. Modal Dialog Box with “NO” Button . . . 343 Figure 50. Modal Dialog Box with “OK” Button . . . 344 Figure 51. Modal Dialog Box with “Cancel” Button . . . 345 Figure 52. Modal Dialog Box with “Left String Edit” Box . . . 346 Figure 53. Modal Dialog Box with “Right String Edit” Box . . . 347 Figure 54. Modal Dialog Box with Top String Edit Box . . . 348 Figure 55. Modal Dialog Box with Bottom String Edit Box . . . 349 Figure 56. Modal Dialog Box with “Specified String Edit” Box . . . 350 Figure 57. Ouput from the Code Example 1 . . . 355 Figure 58. Output of Example 2 . . . 358

A - ASL 1000 Interconnects

B - ASL 3000 Interconnects

Figure B-1.Test Interface Connectors . . . 392 Figure 59. ASL 3000RF DUT Interface— Connectors and Pin Groups . . . 393

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2

VISUAL

ATE O

VERVIEW

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2 - visualATE Overview

visualATE System Software

The visualATE system software from Credence accommodates the following automated tester platforms:

• ASL 1000 • ASL 3000

• ASL 3000MS

• ASL 3000RF

Test Programs

A test program is a sequence of calls to the test functions within a DLL or “List”. As only one DLL can be linked at a time, the test functions in a test program must come from the same DLL.

Not all test functions in a list need be included in the program; they may be enabled or disabled within the test program. Enabled functions execute when the test program is run, while disabled functions are skipped.

Saving a test program creates a file that contains:

• One or more sets of parameter values (limit sets) for each of the included functions

• A list of included functions that are executed in sequence when the program is run

Limit Sets

A single test program can contain multiple variations on the structures (parameters, limits, and enabled/disabled status) that determine how the test functions behave. These variations are called limit sets.

When functions are inserted into a test program, the existing structures for all the included functions become the default limit set for the program. Except for adding or removing test functions from the program, any editing actually alters the limit set, and not the functions themselves.

The default limit set can be edited as desired, saved under a new name, or saved as the new default set for the program. Additional limit sets can be created and edited as desired.

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visualATE System Software

Each limit set contains not only the altered parameters and test limits for each function, but also the function’s enabled or disabled status. Therefore, a test function may be enabled in one limit set and disabled in another set.

NOTE — Editing limits in a test program file does not alter the original limits contained in the list. Functions display with their default values when inserted from the parent list, even if the same function was inserted earlier, and the values were altered within the test program.

Program Creation Steps

These are the steps for creating a test program: • Open a list file in Engineering

• Assign a name to the test program file

• Insert the desired functions from the list in the order they will run • Edit parameters and test limits for each test function

• Create additional limit sets as desired

• Edit parameters and test limits for each test function in each different limit set • Write AutoCorrelation verification limits if desired

• Save the edited test program

• Debug the program code in Visual C++ if required

These processes are reviewed in this chapter. Figure 1. on the following page illustrates the relationship between list files, test programs and limits.

NOTE — Engineering users can also create list files from test programs, and use the new list to create additional programs. A list file must exist before any programs can be built — however, additional list files may be created from the test program once the program is written.

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Figure 1. List File, DLL, and Test Program Limit Sets 6

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The Program Selection Window

To access the program selection window, as shown in Figure 1-2, follow these steps:

1. Log on to visualATE.

2. Select Engineering from the main menu 3. The Program Selection dialog appears

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The programs that appear in this window are available for both development and production. Access to programs, however, is set by the user’s privileges. Engineering users can double-click on any test program name in the window to open the program in the Engineering editor. Production users may be able to open programs in the window or may have to enter a program name manually, depending on the System Properties set. Production users cannot create new programs or insert programs into the window.

Selecting Remove opens an option window that allows the user to remove the program from the window, or remove the program from the window and delete it from the programs directory. A removed file remains available and can be reinserted later.

Insert adds an existing file to the window. This brings up a browser. The inserted file

is visible in Program Selection immediately.

New brings up a dialog where the user chooses a list file from which to generate a

program.

Once programs have been identified, they will appear in this window whenever Engineering is entered. If production user access has been set to display a menu of available programs, this window will also appear when Operator is opened. However, the New and Insert tools will be disabled.

Creating a New Test Program File

Creating a new program file involves opening a list file and saving it as a test program (*.prg) file. New programs must be saved before they can be opened or edited. The name assigned when the program is saved becomes the file directory name. Once the program has been named and saved, it opens in Engineering and is ready to edit. The new program opens in the Engineering editor. No functions are displayed. See

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.

Figure 3. Save As New Program

2. Open the list file 1. Navigate to the right to select and

3. Type a name for the program here

and Save As New Program dialog window

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Directories for Test Program Files

Test programs generated from a list will be saved to the folder associated with the parent list. The default directory can be changed. However, if a program is saved to a different directory, visualATE may not be able to find the program or its associated list every time the program is opened. Table 4 shows the basic directory structure.

Editing Test Program Files

The Engineering editor must be open in order to edit a test program file. To open the Engineering editor, open a program file from the Program Selection dialog. New test programs will open an editor that appears to be empty because no test functions have been inserted.

Inserting and Enabling Functions

Although the editor appears blank when a new program is opened, all the functions included in the originating list file are available to be inserted.

Functions run in the order they appear on screen. Function numbers are assigned automatically and sequentially and cannot be overridden. However, function run order can be changed by removing and reinserting, or copying and pasting, the functions in the desired order.

Functions are inserted above the last inserted function if the mouse cursor is not moved. If the mouse cursor is placed inside of a function, then the next inserted function will be placed above the existing one. If the cursor is placed below the

Table 4. Directory for Test Program Files

Directory Description

/asl_nt/users/lists/listname Source code for the list (*.cpp, *.h files) & “ListNAME.LST file

asl_nt/users/lists/listname/debug Contains the DLL for the list /asl_nt/users/lists/listname/

programs

Test programs (*.prg files) created in Engineering are stored here

/asl_nt/users/lists/listname/datalog Files output from Operator or the

Engineering Run Screen (*.dl4, *.ls4) are placed here

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Limit Sets

A limit set is an independent collection of values for all editable fields in a program, such as parameter values, test max. and min. limit values and enable/disable settings.

When a new program is created, the inserted functions bring their default values with them from the list file, and associate them with the program as a default limit set. This default limit set cannot be edited. Multiple limit sets can be defined for a single program, however, only one limit set can be active at one time. Editing values in an open program changes the values in the active limit set, while other limit sets remain unaffected. Values can be copied from one limit set and pasted into another.

Adding or removing functions affects all limit sets. In a program with multiple limit sets, adding a function to the program adds all the values for that function to each limit set. The values must be edited within each limit set after the function has been inserted. Removing a function from a program removes the parameter and test values associated with that function from all the limit sets.

NOTE — To run a test function in one limit set but not in another, insert the function into the program and enable it in the limit set where it will run; disable this same function in the limit sets where it is not needed.

Updating Test Programs after Changing the Parent List

Test.exe requires a list and each of the test programs generated from it to have identical structures. Each file must contain the same number of functions, parameters and tests, the names must be the same, and must appear in the same order.

In the test program, the structure is what is available to the test program, not what is used in the test program. Important to remember: a test program executes selected functions, it does not change the structure of the list. A structural change is anything that can be done in Create but not in Engineering (parameter names and types, number of tests, etc.).

Test program structure shows in the Select Function dialog. To see a test program’s structure follow these steps:

1. 1. Open the test program 2. 2. Go to Edit -> Insert Function

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When running a test program whose parent list has changed, Test.exe automatically updates the test program structure to match the parent list structure. When the test program is opened, a message is displayed, along with a report file that shows what has changed: the set of available functions are revised to match the updated parent list, and structurally changed functions are removed from the program. This report can be printed.

Follow these steps to run the program after changing the parent list:

1. In Select Function (above), highlight the updated function and click OK 2. Repeat for each function that has been modified

3. Save the revised test program 4. Run the test program

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The ASL 1000 Tester

The ASL 1000 Tester

The ASL 1000 tester is composed of the hardware blocks in Figure 4.

• Tester CPU with test head interface board, data/control bus cable and peripherals • Power supply

• Instrument cards

• Test head assembly with backplane, interconnect board and DUT board)

Figure 4. ASL 1000 Hardware Architecture

Instrument Cards for the ASL 1000

Each ASL 1000 test instrument is contained on a type B VME-sized card that plugs into the test head backplane. Up to 21 test instrument cards can be mounted in the backplane. Many of the instrument cards have user-accessible test points located along one edge for debugging.

Minimum instrument configuration requires one DVI Dual Voltage/Current card in slot 9, and one MUX Multiplex Relay card in slot 20. Other instrument cards are added to

Tester CPU

with IF Card

Power Supply

Multi-Conductor

Data/Control

Bus Cable

Test Head

_Backplane

Instruments

Interconnect Board

Power Cable

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Table 5. ASL 1000 Instruments

Name Instrument Description

ACS Alternating Current Source Arbitrary waveform generator and alternating current meter

DCC Data Converter Card Highly flexible card for testing ADCs, DACs and other converters

DDD Digital Driver and Detector 8-channel digital pattern generator for digital signal stimulation and readback

DOAL Dual OpAmp Loop High-precision opamp and comparator

resource for testing amplifiers in a closed loop configuration

DVI Dual Voltage/Current Source

Two-channel, medium-current V/I source; provides true four-quadrant force/measure operation and rapid settling time

HVS High Voltage Source High-voltage, low-current floating source LZB Link/Zener Blower Single quadrant V/I source optimized for

link and Zener blows

MVS Medium Voltage Source Medium-voltage, medium-current floating source

MUX Resource Multiplexer Relay card

OFS Octal Floating Source Medium-voltage, medium-current floating source

OVI Octal Voltage/Current Eight-channel, low-current V/I source that offers four-quadrant force/measure operation

PVI Pulsed V/I Medium-voltage resource that provides a

very high current, time-limited current pulse in a fully floating mode

TIA Time Interval Analyzer Two-channel, high-precision time

measurement instrument mounted in the PC case

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The ASL 3000RF Tester

The ASL 3000RF Tester

The ASL 3000RF tester is composed of the following hardware blocks as shown in Figure 5.

• Tester CPU with test head interface board, data/control bus cable and peripherals • Power supply

• ASL standard instrument cards • RF Subsystem (MVNA

™

, RF brick)

• Test head assembly with backplane, interconnect board and DUT site interface board 32 D I/O ASL Instrument Card Cage ASL Series PC Voltmeter RF Subsystem (MVNA) In te rc onne ct B o ard/ D U T I n te rf ace Test Head Power Meter DUT HV Interlock Removes all user power

when interrupted Keyboard Mouse Monitor Monitor VGA P/S-2 KBD Server Ethernet 100bT TTL Interface to Handler R F M o th e r B o a rd +/-5V +12V GND RF/Gnd RF/Gnd RF/Gnd RF/Gnd RF Source RF Source RF Source RF Source R F Modul es RS 232 Power Module 208VAC Single Phase 50A 50/60 Hz Po we r Di st ri b u ti o n GPIB 208 V A C 208 VAC 208 VAC 208 VAC 208 VAC 208 VAC 208 VAC 208 VAC Test Head DC +3.3 @150A +5 @ 150A -5 @ 60A +12 @ 20A +/- 16 @ 16A +/- 24 @ 10A +/- 50 @ 12.5A +/- 65 @ 16A +/-5V +12V GND Digital Control IF/Gnd (4) / RF/Gnd (8) / Pogo/OSP Interface 50-pin TTL logic signals Switch Control Address Data E thernet Aux RF/Gnd (4) / 208 VAC Trig Out Trig In Trigger I/O Test I/O Data I/O DC Power DC Power 10 M H z Standard Configuration

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RF Subsystem

Modulated Vector Network Analysis (MVNA)

The MVNA chassis backplane supports standard compact PCI connection and a non-standard connection. Front side boards utilize both connectors while backside boards have access only to the non-standard connector. All boards are 6U in height. The MVNA is contained in the server cabinet.

Table 6. MVNA Boards

Item Name Description

1 G4 Receiver Board Digitizes the 2nd IF signals for RF

measurements

2 I/Q Board 2 Channel AWG that drives the vector

modulator in the SMIQ generator

3 Embedded Controller Board Pentium 1GHz CPCI controller for the MVNA RF measurement subsystem

4 2nd LO Board Generates, distributes a fixed 200 MHz LO

for down conversion of the 1st IF to the 2nd 5 2nd Downcoverter Board Down converts the first IF to the second IF

(intermediate frequency) 6 Clock/Trigger Distribution

Board

Distributes the 65 MHz sample clock and Trigger signals to up to 8 receiver channels 7 PCI RF Control Board Interfaces the CPCI bus to the RF control

motherboard via an LVDS link. Additionally, this board routes hardware triggers to and from the DUT test site

8 Embedded Controller Board

(Rear IO)

Routes the IDE Hard Drive control signals from the Embedded Processor Controller to the RF subsystem hard disk drive.

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The ASL 3000RF Tester

RF Brick

The following six modules in and board types comprise the RF Brick in the test head:

Standard Instruments

The test head also contains the full complement of ASL series instruments, contained in an instrument card cage. See Table 7.

For definitions and programming instructions for each instrument, see similarly titled individual chapters in this guide.

Table 7. RF Modules

Item Name Description

1 RF Port Module Bi-directional RF I/O with built in down

conversion stage

2 LO Splitter Module (RF

subsystem)

Distributes 1st LO signal to up to 8 ports. Has built in variable attenuation to maintain constant output power

3 IF Mux Module (RF

subsystem)

Multiplexes the 1st IF signal from 4 channel to 1 channel. Each module contains two 4x1 MUXs

4 RF Mux Module Multiplexes up to 3 RF sources to up to 8

ports. This module also contains the power combiner for two-tone measurements. 5 RF Control Mother Board Provides the control logic and DC power to

the RF Pin Electronics. The MVNA directly communicates with the RF Control

Motherboard.

6 Interconnect Board (RF

subsystem)

Routes signals from the mixed-signal instrument backplane to the Pogo pin DUT interface

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1

A

BOUT

THIS

G

UIDE

This introductory section gives an overview of the ASL Mixed Signal Programmer’s Guide for the visualATE system software. This section includes:

• Scope of this guide • Notation conventions

• Programming reference usages • Related publication

• Operator safety summary

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1 - About this Guide

Scope of this Guide

The ASL Series Programming Guide assembles a suite of programming references for the visualATEvisualATE operating system. This software has been designed to run the following automated tester platforms: ASL 1000

™

, ASL 3000

™

and ASL

3000MS

™

.

Audience

The information in this guide is for test engineers and programmers who work with ASL 1000, ASL 3000 and ASL 3000MS automated test systems running under the visualATE system software from Credence Systems Corporation. For this audience, chapters are designed to give a one-stop point of reference — the Table of Contents is where to find the chapter titled for the test instrument to program. For a quick look at the programming reference features, see the “Programming Reference Sample” later in this section.

Prerequisites

visualATE software includes Microsoft Visual C++. This guide assumes the user to have a basic familiarity with C and C++ programming. For an overview of how Credence Systems incorporates the C++ environment in the visualATE and ASL platform, see the visualATE User’s Guide.

Organization

The contents of this guide are organized as follows:

Chapter 1 ASL Platform Overview showing available test instruments.

Chapters 2 to 16 Programming references by instrument.

Chapter 17 Lists additional user functions

Appendix A Shows ASL 1000 system interconnects.

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Notation Conventions

Notation Conventions

Throughout this guide, font treatments are used to highlight special terms and actions.

Table 1 describes these styles and their meaning.

Table 1. Font Treatments

Style Purpose

Bold Mandatory statements that must be entered exactly as they appear and valid arguments

Italics Terms defined in the glossary or emphasized in the text Italic Bold Optional statement items that must be entered exactly as

shown if they are used Initial

Capitalization

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How to Use the Programming Guide

Each instrument reference contains a description of the instrument, followed by programming syntax and formats. The programming syntax information identifies the function call, describes what the function does, and includes the code that actually performs the function. In addition, some references include programming examples showing how to use the function calls. Simplified diagrams of the instrument or its components are included.

Syntax Format

This section shows the syntax format for visualATE programming functions. Example:

All voltage range arguments read as follows:

RANGE_X_UV RANGE_X_MV RANGE_X_V RANGE_X_KV

where X represents the number of volts (i.e., RANGE_5_V for five volts). All current range arguments read as follows:

RANGE_ X_PA RANGE_X_NA RANGE_X_UA RANGE_X_MA RANGE_X_A

where X represents the number of amperes (i.e., RANGE_1_A for one amp).

Programming Sample

Please note and observe the following conventions that were used in building the example of programming reference appearing on the next page.

Follow the guidelines in the legend when developing a test program. • The sample programming reference is labeled with descriptions of the

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How to Use the Programming Guide

• All items that appear in capital letters under a heading in bold must be typed exactly as shown.

• Optional statements include a default setting; this default is used unless the programmer enters another value for the statement.

connect_vi_force

This is the programming statement Description

This function initially sets the voltage to 0 V. Next, the current and voltage ranges are programmed, before the source output relay is connected. Finally, the voltage source is programmed to the stated value. The default value for the correction factor

(corr_factor) is 0 to 1000 pF (no argument entered). Format:

Shows statement with arguments

void connect_vi_force(double voltage_value, char vrange, double current_value, char irange, char corr_factor);

Valid Arguments: Mandatory arguments

voltage_value

voltage output range as integer, decimal or scientific notation (-45.0 V to +45.0 V)

vrange

RANGE_1_V Arguments must be typed as shown RANGE_2_V

RANGE_5_V RANGE_10_V RANGE_20_V RANGE_45_V

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current_value

current output range in decimal or scientific notation (0.001 µA to 1.0 A)

irange RANGE_10_UA RANGE_100_UA RANGE_1_MA RANGE_10_MA RANGE_100_MA RANGE_1_A corr_factor

Optional arguments in italics, type as shown

Usage:

Instrument and slot always come first

pmu_21->connect_vi_force(5.0, RANGE_10_V, 10e-6, RANGE_100_UA); //no correction factor (default)

Conventions

• Uppercase terms must be entered exactly as written

• Open and close parentheses () that follow a statement contain the statement’s arguments

Bold terms within parentheses are mandatory arguments

Italicized bold terms within parentheses are optional arguments No argument entered

(default)

(0 to 1000 pF)

CORR0 (0 to 0.1 mF)

CORR0 & CORR1 (0 to 10 mF) CORR0 & CORR1 &

CORR2

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Related Publications

Related Publications

For information on features, operation, and maintenance of ASL-based testers running under visualATE, see the following guides:

visualATE5.2 User Guide 071-0489-00

Modular Digital Instrument (MDI) and Clock Board Service Supplement

071-0215-01

Multisite Asynchronous Digital Subsystem (MADS) Programming Guide

071-0568-00

Audio Video Multisite Digitizer (AVMD) Programming Reference and User’s Guide

071-0249-00

Multisite Arbitrary Waveform Generator (MAWG) Programming Reference and User’s Guide

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Operation Safety Summary

The general safety information in this summary is for both operating and servicing personnel. Specific warnings and cautions will be found throughout the guide where they apply, but may not appear in this summary

Table 2. Operation Safety Summary

Item Description

Terms in this guide

CAUTION statements identify conditions or practices that could

result in damage to the equipment or other property.

WARNING statements identify conditions or practices that could

result in personal injury or loss of life.

Terms as Marked on Equipment

CAUTION indicates a personal injury hazard not immediately

accessible as one reads the marking or a hazard to property including the equipment itself.

DANGER indicates a personal injury hazard immediately accessible

as one reads the marking.

Symbols as Marked on Equipment

DANGER

HIGH VOLTAGE INSIDE

THIS UNIT. SERIOUS INJURY OR DEATH COULD RESULT FROM CONTACT.

REFER SERVICING TO QUALIFIED PERSONNEL ONLY.

ATTENTION—See the appropriate user guide

Protective ground (earth) terminal

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Operation Safety Summary

Power Source and Ground

This equipment operates from a power source that applies

dangerous voltage between the supply conductors and between any supply conductor and ground. If the ground connection is interrupted, all accessible conductive parts could render an electric shock. If a power cord is not provided with the product, refer power connection to qualified service personnel.

Do Not Remove Covers or Panels

To avoid personal injury, do not remove product covers or panels. Do not operate the product without the covers and panels installed. Refer installation to qualified service personnel.

Do Not Operate in Explosive Atmospheres

To avoid explosion, do not operate this equipment in an explosive atmosphere unless it has been specifically certified for such operation.

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Service Safety Summary

NOTE — Also see the preceding Operation Safety Summary.

For Qualified Service Personnel Only

.

Table 3. Service Safety Summary

Items Description

Do Not Service Alone

Do not service or adjust this product internally unless another person capable of rendering first aid and resuscitation is present.

Use Care When Servicing With Power On

Dangerous voltages and currents may exist at several points in this product or in the equipment with which this product is used. To avoid personal injury, do not touch exposed connections and components while power is on.

Disconnect power before removing protective covers and making internal changes.

Do Not Wear Jewelry

Remove jewelry prior to servicing. Rings, necklaces, watchbands, and other metallic objects could come into contact with dangerous voltages or currents.

Grounding the Product

The product is grounded through the protective grounding conductor of the power cord (or service wiring in lieu of a power cord). To avoid electrical shock, the grounding conductor must be connected to a properly wired receptacle or junction box.

Replace Covers To avoid injury to other personnel, replace covers before leaving the equipment unattended.

Lifting Two or more persons may be needed to lift and maneuver

equipment such as test head and rack-mounted units because of their physical size, shape, weight or location. To avoid injury, don’t attempt to handle this type of equipment alone.

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Electromagnetic Compatibility (EMC) System Requirements

Electromagnetic Compatibility (EMC) System

Requirements

ASL-Based Series Test System Immunity

• The use of handheld wireless communication equipment should be limited to distances in excess of ten meters from the product to avoid the possibility of erroneous data or misclassification of devices under test.

• Accessibility of ESD sensitive devices and wiring in the vicinity of the test head requires that users wear a grounded wrist strap at all times.

• Wrist strap ground points are provided at the test head and at numerous points on the main cabinet.

• Other ESD abatement practices should also be implemented such as the use of ESD abatement flooring, conductive shoe straps, ESD preventive coat, ESD conductivity monitors, etc.

ASL-Based Series Test System Emissions

• Τhis product has been tested and found to produce emissions in excess of that allowed by the European Community EMC Directive. As a result, the user of this equipment may be required to take extraordinary measures to prevent

interference with licensed communications. Following are actions which may be required of the user of this equipment.

• Testing may be required at the time of installation by a European Competent Body. This testing is to be performed at the boundary of the installed facility. Measurements will be made to insure that product emissions are within established limits at the installed site.

• Per the Annex of EN55022, a building will generally provide an attenuation of 10 dB to an interference source.

• The customer may be required to take extraordinary additional measures to limit the interference potential of the product, such as the addition of shielding material around the product or placing the product in a shielded room.

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3

ACS - AC S

OURCE

The AC Source (ACS) is a programmable waveform generator featuring both fixed and programmable filters, along with four AC-to-RMS measurement channels.

The ACS output channel consists of a 32K deep Waveform memory, a programmable clock, and a high-speed digital-to-analog converter (DAC) with programmable high and low reference levels. Output undergoes a signal-conditioning phase through an all-pass filter, a tank filter, or an attenuator, followed by a single-pole or 4-pole programmable low-pass filter (LPF). The ACS also provides three separate CMOS level output signals synchronized with the output Waveform.

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3 - ACS - AC Source

Basic Theory

The ACS produces waveforms by reconstructing binary data that is stored in a 32K-by-16-bit waveform memory. This stored data is presented to a 12-bit DAC at a selected clock frequency. The DAC produces a discreet DC voltage level for every binary code presented at its input. The DAC resolution is related to the number of its data bit inputs. A 12-bit DAC can support 4096 binary numbers or codes (0 to 4095). As an example, if the DAC has a full-scale output voltage of 10 V, then the resolution of its discreet DC output voltage levels (or “steps”) is as follows:

10 V/4096 = 2.4414 mV

Figure 6. Basic Digital-to-Analog Action

Every waveform that the ACS generates is made up of discreet DC voltage levels (steps) output at a selected frequency. The clock frequency is known as the sampling frequency (Fs). The frequency of the main output waveform is known as output frequency (Fo). The sampling frequency must be at least twice (double) the desired output frequency, and not an even multiple to avoid distortions to the output

waveform. The ACS has 16 internal sampling frequencies, ranging from 64 MHz to 1.953125 kHz, from which the user may select.

The user must program all waveform types except for the sinusoid form. The ldram() statement will generate the required DAC codes to produce a sinusoid wave based on the input given.

Waveform Memory

DAC

Clock

“0” “1” “2”

2.44 mV

000

001

011

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Waveform Memory

Waveform Memory

Figure 7. Waveform Memory Bit Description

The ACS has a main waveform output and three auxiliary (sync bit) outputs. The main output is derived from a 12-bit DAC, which accepts binary codes that represent the desired waveform. The sync bit outputs are routed to the user test interface directly from waveform memory. These non-buffered outputs are resistor and diode-clamp protected. Waveform memory is CMOS type; therefore, the drive levels of the sync bit outputs are not fully TTL compatible (3.5 V minimum amplitude). Buffers are

recommended if current drive requirements are uncertain.

The main waveform DAC output is directly affected by two variables: • the value of the binary code (amplitude) being input

• the rate (sampling frequency) at which the DAC is instructed to convert the binary code to a DC voltage

The sync bit outputs are also affected by the Waveform memory codes and sampling frequency. A CMOS-level pulse is present on the output of every sync bit Waveform memory location that is programmed to a “1” (one). The pulse duration is the same as the sampling frequency. For longer pulse widths, program consecutive Waveform

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

(11) (10) (9) (8) (7) (6) (5) (4) (3) (2) (1) (0)

Waveform

Sync 3

Sync 2

Sync 1

Loop

Back

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Figure 8. ACS Outputs

Figure 8 in this section shows that Waveform data is located in the upper 12 bits of Waveform memory. This arrangement requires the user to shift Waveform data up four bits. Shift the Waveform data by multiplying the data by 16 before moving it into Waveform memory

Main DAC

Sync 1

Sync 2

Sync 3

(Pulses not shown to scale)

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Waveform Memory

.

Figure 9. Waveform Data to Waveform Output Relationships

ACS Waveform memory contains a special address control bit, the Loop Back Bit (bit 0). The Loop Back Bit redirects the Waveform memory execution back to address 0 when it is programmed to a 1. In this case, the Waveform memory re-executes from address 0 to the Loop Back Bit, and repeats this action until it encounters an init() or

stop() command.

Figure 9 above shows both a detailed view of the sync bit action, and the Loop Back Bit action. For best results, program the address with the Loop Back Bit to contain the same waveform data as address zero (0). This helps minimize transients in the main waveform when address control is shifted back to address zero.

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Additional Output Information

The ACS output buffer has a nominal 100

Ω

load drive capability.

For best results, program the output amplitude and offset to 0 V and select a filter before closing the ACS output connect relay. Programming these values to 0 V prevents the buffer’s output from going to the positive rail because of an open input. A program delay of 10 ms is suggested to allow the ACS output waveform enough time to develop the full amplitude.

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Function Calls

Function Calls

Waveform Generator Commands

init

Description

This function initializes registers, opens on-board relays and analog switches except SEL_ADC_IN0 (meter channel 1) and the filter bypass which are closed, waveform memory remains intact.

Format void init(void); Valid Arguments none Usage acs_5->init();

set_path

Description

This function defines the path for the output signal. The programmable LPF (ACS_MAIN_FILTER) clips with signals greater than 2.5 VP-P. When the

programmable LPF is selected, the single-pole LPF is automatically set to the 500 kHz cutoff.

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ACS_LC_FILTER 196 kHz Fo with 1 kHz bandpass. Available on 10

V range only)

ACS_MAIN_FILTER (Programmable LPF)

ACS_BASE_FILTER (Single pole cutoff @ 500 kHz)

ACS_100K_FILTER Single pole cutoff @ 100 kHz)

attenuation

ACS_1_VOLT_RANGE (Default, divide by 10)

ACS_10_VOLT_RANGE (Divide by 1)

Usage

acs_5->set_path(ACS_LC_FILTER, ACS_10_VOLT_RANGE);

set_bw_ref

Description

This function sets the cutoff frequency for the programmable LPF (10 kHz to 200 kHz). code1 and code2 are 12-bit (0-4095) codes and are programmed with the same values. See graph below for typical filter linearity:

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Function Calls

Figure 10. LPF Linearity Graph

Format

void set_bw_ref(unsigned short code1, unsigned short code2);

Valid Arguments

code1

0 to 4095

code2

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set_level

Description

This function sets the amplitude and offset of the output waveform. The maximum amplitude is ± 9.8 V and maximum offset is dependent on the amplitude programmed (see figure below). The scale argument selects RMS volts or peak volts, with default values of zero for both amplitude and offset. Offset is always in DC volts. The voltages entered must lie in the selected voltage range or clamping may occur (for example, clamping may result at levels above 0.7 V RMS or 0.99 PK on the

ACS_1_VOLT_RANGE).

Figure 11. Amplitude and Offset Level of Output Waveform

Format

void set_level(float amplitude, float offset, short scale);

Valid Arguments

amplitude

output voltage level in decimal of scientific notation (Default is 0)

offset

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Function Calls

Usage

acs_5->set_level(5.0, 2.5, ACS_RMS_LEVEL);

Waveform Memory and Clock Commands

ldram

Description

This function loads a Waveform memory with data that generates a sine wave of the selected frequency. The user selects a sampling frequency and the routine finds the nearest number. Possible sampling rates: 64 MHz/2**N. See the card.clock

command on page 65, for more information. With no user input, the sampling frequency (Fs) will calculate to approximately 16*Fo.

Format

void ldram(float freq, float sampling freq, unsigned short cycles);

Valid Arguments

freq

frequency (F₀) in decimal or scientific notation

sampling freq

sampling frequency (Fs) in decimal or scientific notation (default is approx. 16xF₀)

cycles

Number of cycles to be loaded into memory (default is 1)

Usage

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load_data

Description

This function loads data at a specific address in Waveform memory. The data is obtained by multiplying the waveform data code (0 to 4095) by 16. Multiplying by 16 shifts the data to the upper 12 bits of waveform memory (see Figure 7).

Format

void load_data(unsigned short address, unsigned short data);

Valid Arguments address 0 to 32767 data 0 to 65535 Usage acs_5->load_data(0, 2048);

load_address

Description

This function sets the address pointer to a specific Waveform memory location for the static command. The pointer will return to address zero (0) after reaching the end of waveform memory on an address that has the Loop Back bit set to 1.

Format

void load_address(unsigned short address);

Valid Arguments

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Function Calls

Usage

acs_5->load_address(12476);

card.clock

Description

This function sets the internal clock frequency (Fs) by dividing the 64 MHz master clock by the selected divisor. The clock frequency range is

1.953125 kHz to 64 MHz. Format

void card.clock = divisor;

Valid Arguments divisor CLK_MAIN (64 MHz) CLK_BY_2 (32 MHz) CLK_BY_4 (16 MHz) CLK_BY_8 (8 MHz) CLK_BY_16 (4 MHz) CLK_BY_32 (2 MHz) CLK_BY_64 (1 MHz) CLK_BY_128 (500 kHz) CLK_BY_256 (250 kHz) CLK_BY_512 (125 kHz) CLK_BY_1024 (62.5 kHz) CLK_BY_2048 (31.25 kHz) CLK_BY_4096 (15.625 kHz) CLK_BY_8192 (7.8125 kHz) CLK_BY_16384 (3.90625 kHz)

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start

Description

This function starts Waveform output at the rate of the specified clock. The default setting is the internal clock, ACS_INT_CLK. Waveform memory execution continues to the end of Waveform memory, unless a Loop Back (bit 0) is programmed. In both cases, addressing is returned to address zero (0) and the waveform repeats until an

init() or stop() command is encountered.

Format

void start(short clock source);

Valid Arguments clock source

ACS_INT_CLK (Internal clock, default)

ACS_EXT_CLK (External clock)

Usage

acs_5->start(ACS_EXT_CLK);

stop

Description

This function halts Waveform memory output. Format

void stop();

Valid Arguments none

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Function Calls

AC Meter Commands

set_meas_mode

Description

This function selects channel, voltage range and coupling for subsequent measurements.

Format

float set_meas_mode(short channel, short vrange, short coupling);

Valid Arguments channel ACS_CHANNEL_1 (Default) ACS_CHANNEL_2 ACS_CHANNEL_3 ACS_CHANNEL_4 vrange ACS_1V_RMS_RANGE (Default) ACS_2V_RMS_RANGE ACS_5V_RMS_RANGE ACS_10V_RMS_RANGE ACS_20V_RMS_RANGE ACS_50V_RMS_RANGE ACS_100V_RMS_RANGE coupling ACS_AC_COUPLING (Default) ACS_DC_COUPLING Usage

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measure

Description

This function performs an RMS measurement based upon the setup defined with

set_meas_mode(). The function returns the average of the stated number of

samples. The default is 10 samples. The sample rate is approximately 33 µs, computer controlled.

Format

float measure(short samples);

Valid Arguments samples 0 to 32767 (Default is 10) Usage result =acs_5->measure(12);

close_relay

open_relay

Description

These functions close or open the stated on-board relays. No built-in wait time. Required delay may be programmed by using the delay() or wait.delay_10_us() statements.

Format

void close_relay(unsigned short relay); void open_relay(unsigned short relay);

Valid Arguments

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Function Calls

D_RMS_CH4 (meter channel 4 input-connect-relay)

D_SIG_OUT (signal output-connect-relay)

D_R_BIT1 (sync signal 1 connect-relay)

D_CLK (external clock input-connect-relay)

Usage

acs_5->close_relay(D_RMS_CH2); acs_5->open_relay(D_RMS_CH2);

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ACS Simplified Diagram

The Figure 12. is a simplified block diagram of the ACS instrument .

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ACS Programming Examples

ACS Programming Examples

Sinusoid

The following code generates a 200 kHz sine wave, then measures the amplitude in Vrms:

acs_5->init();

acs_5->ldram(200.0e3); // load 200 kHz

acs_5->set_path(ACS_BASE_FILTER, ACS_10_VOLT_RANGE);//insert 500 //kHz filter acs_5->set_level(0, 0, ACS_PEAK_LEVEL);//0V amplitude, 0V offset,

//peak mode

acs_5->close_relay(D_SIG_OUT); //close output connect relay

acs_5->close_relay(D_RMS_CH1);//ACS output connected to CH1 with a //wire

acs_5->set_meas_mode(ACS_CHANNEL_1, ACS_10V_RMS_RANGE,

ACS_AC_COUPLING); acs_5->start(); //default internal clock at ~16 X Fo

acs_5->set_level(ours->amplitude, ours->offset, ACS_PEAK_LEVEL); delay(ours->meas_delay);

temp = acs_5->measure(); //measure RMS, default 10 samples acs_5->init();

Trapezoid

The following code generates a trapezoidal waveform:

acs_5->init();

// loading of the pattern...

// LOW for 2048, RAMP UP for 4096, HIGH for 2048, RAMP DOWN for 4096 short j=0; // j=0 - Low for 2048 samples

for(j=0; j<2048; j++) {

acs_5->load_data(j, 0); }

// j=2048 - Ramp up for 4096 samples for(j=2048; j<(2048+4096); j++) {

acs_5->load_data(j,(j-2048)*16); }

(72)

acs_5->load_data(j, (4095-(j-8192))*16); }

acs_5->load_data(j, 1); // loop back bit loaded acs_5->card.clock = CLK_BY_16;// fsampling = 4 MHz //set up ACS...

acs_5->set_path(ACS_NO_FILTER,ACS_10_VOLT_RANGE);

acs_5->set_ref(ours->amplitude,ours->offset); //pass in amplitude //and offset

acs_5->close_relay(D_SIG_OUT); //close output connect relay burst //pattern...

acs_5->start();

//start pattern burst at internal clock rate //stop pattern burst