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8051 Serial Port. Crystal TXD. I/O Device RXD. Embedded Systems Peripherals

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8051 Serial Port

• The 8051 contains a UART – Universal Asynchronous Receiver Transmitter – The serial port is full-duplex

• It can transmit and receive simultaneously

– 2 Port 3 pins are used to provide the serial interface

• P3.0 is the receive pin (RXD)

• P3.1 is the transmit pin (TXD)

– Both synchronous and asynchronous transmission supported

• A synchronous transmission sends a clock signal with the data

– Adjustable baud rate and data frame size supported in asynchronous mode 8051

X1

Crystal TXD I/O

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Asynchronous Data Transmission

• Data is transmitted in a frame consisting of a start bit, 8 or 9 data bits and a stop bit – Start bit is always low

– Data is transmitted LSB first – Stop bit is always high

• Data transmission/reception rate is controlled by baud rate generator clock

– Baud rate may be a division of the crystal frequency or programmed using a timer

D0 D1 D2 D3 D4 D5 D6 D7

Start Bit Stop Bit

Line Idle

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Serial Port Modes

• Mode 0

– Only synchronous mode

– Data transferred on RXD, clock on TXD

– Clock is fixed at 1/12 of the oscillator frequency

• Mode 1

– Asynchronous mode

– 10-bit data frame (start bit, 8 data bits and a stop bit) – Variable baud rate

– Stop bit is placed in RB8 bit of SCON register on reception of a frame

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Serial Port Modes

• Mode 2

– Asynchronous mode

– 11-bit data frame (start bit, 8 data bits, programmable 9th bit and a stop bit) – On transmission 9th bit is TB8 bit of SCON

– On reception 9th bit is placed in RB8 bit of SCON – 9th bit may be used for data or as a parity bit

– Baud rate may be 1/32 or 1/64 of oscillator frequency

• Mode 3

– Same as Mode 2 but with a programmable baud rate

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Data Transmission/Reception

• The register SBUF is used to hold both the transmit and receive serial port data

• To transmit data load the SBUF register – MOV SBUF, source

– When transmission is complete the TI bit will be set in the SCON register

• When a data frame is received the RI bit in SCON is set high – The received data may then be loaded from SBUF

– MOV destination, SBUF

– Data reception is double buffered

• Reception of a second data frame may commence before the previous data frame has been read

– The REN bit in SCON must be set to enable data reception

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SCON Register

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Configuring the Serial Port

• Configure the serial port mode in SCON – Bits SM0 and SM1 determine the mode

– Set the REN bit if serial data reception is required – Clear the RI and TI bits

• The RI flag is set when a character has been received by the serial port

• The TI flag is set after transmission of a character

Both flags must be cleared by software

• Configure the serial port baud rates

– The baud rate is fixed for modes 0 and 2

• For mode 0 the baud rate = fosc/12

• For mode 2 the baud rate = 2SMOD * fosc/64

– SMOD is a bit in the PCON register (not bit addressable)

– For modes 1 and 3 the baud rate is configured by the timer 1 overflow rate

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Baud Rate for Modes 1 and 3

• Configure timer 1 for 8-bit auto-reload mode (timer mode 2) – Upper 4 bits of TMOD register = 0010

( )

[ 256 TH1 ]

12

Frequency Oscillator

32 Rate 2

Baud

Rate Overflow

1 Timer 32

Rate 2 Baud

= −

=

x x x

SMOD SMOD

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Common Baud Rates

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Serial Program Example 1

;Program to continually transmit the character A out the serial port ORG 0H

MOV SCON, #40H ;serial port mode 1

;configure timer 1 in auto-reload mode for 9600 baud MOV TMOD, #20H ;timer mode 2

MOV TH1, #0FDH ;reload value for 9600 baud MOV TL1, #0FDH

SETB TR1 ;start timer

LOOP: MOV SBUF, #'A' ;transmit character

WAIT4TI: JNB TI, WAIT4TI ;wait for end of transmission CLR TI

JMP LOOP ;re-transmit

END

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Serial Program Example 2

; Program to echo characters received on serial port ORG 0H

MOV SCON, #50H ;serial port mode 1, receiver enabled ORL PCON, #80H ;SMOD = 1, double baud rate

;configure timer 1 in auto-reload mode for 19200 baud MOV TMOD, #20H ;timer mode 2

MOV TH1, #0FDH ;reload value for 19200 baud with SMOD = 1 MOV TL1, #0FDH

SETB TR1 ;start timer

;wait for a character to be received

WAIT4RI: JNB RI, WAIT4RI ;wait for receive flag to go high CLR RI

MOV A, SBUF ;read received character

;transmit received character

MOV SBUF, A ;transmit character

WAIT4TI: JNB TI, WAIT4TI ;wait for end of transmission

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Serial Program Example 3

;Program to print the message "Hello" "Goodbye" on serial port

;A new line is placed between the strings

MESSAGE EQU 100H ;address where string is stored

;define characters to move cursor to next line CR EQU 0DH

LF EQU 0AH ORG 0H

MOV SCON, #40H ;serial port mode 1

;configure timer 1 in auto-reload mode for 9600 baud

MOV TMOD, #20H ;timer mode 2

MOV TH1, #0FDH ;reload value for 9600 MOV TL1, #0FDH

SETB TR1 ;start timer

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Serial Program Example 3 (cont)

;loop to transmit message MOV DPTR, #MESSAGE

TXMSG: CLR A

MOVC A, @A+DPTR ;fetch character from string CJNE A, #'*', TRANSMIT ;check for end of message JMP DONE

TRANSMIT: MOV SBUF, A ;transmit character

WAIT4TI: JNB TI, WAIT4TI ;wait for end of transmission CLR TI

INC DPTR ;point to next character JMP TXMSG

ORG MESSAGE ;string to be printed DB 'Hello'

DB CR, LF

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Synchronous Serial Comms (Mode 0)

• The TXD pin is used to carry the clock

• Data is transmitted and received on the RXD pin (half duplex)

• Data Transmission

– Initiated by writing a character to the SBUF register – Data shifted out RXD pin, LSB first (8 bits in total) – 8 clocks shifted out TXD pin

– TI flag set after byte of data has been transmitted

• Data Reception

– Initiated by REN = 1 and RI = 0

– 8 clock pulses are outputted on TXD pin

– 1 bit of data shifted into RXD pin for each clock – RI is set when 8 bits have been received into SBUF

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Serial I/O Expansion

• A 74LS164 Serial In Parallel Out Shift Register may be used to expand the serial port to be used as 8 output pins

– A number of shift registers may be cascaded to increase the number of output pins gained

Data Input

Clock Reset

8 Parallel Outputs

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Serial Output Pin Expansion

• P1.0 will clear the shift register outputs when brought low

• 8 output pins generated from 3 8051 pins

– Connect Q7 of 74LS164 to the data input of a second 74LS164 to generate 15 outputs from 3 8051 pins

8051 P1.0

RXD TXD

74LS164

MR Q0

Q1 Q2

DIN Q3

Q4

CLK Q5

Q6 Q7

8 Output Ports

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Serial Input Pin Expansion

• A 74LS165 Parallel In Serial Out Shift Register may be used to allow the 8051 serial port to provide additional input port pins

– A number of shift registers may be cascaded to increase the number of output pins gained

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Serial Input Pin Expansion

• P1.0 will load the register parallel inputs when brought low

• 8 input pins generated from 3 8051 pins

– Connect data output pin of a second 74LS165 to the data input pin of another to generate 16 inputs from 3 8051 pins

74LS165

QA INHIB

QB QC

QD OUT

QE

QF CLK

QG

QH LOAD

8051

RXD TXD P1.0 8 Input

Ports

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Multi-Processor Communication

• Modes 2 and 3 can be configured to allow serial communication between a master 8051 and a number of slave 8051s

– The TXD pin of the master connects to the RXD pin of the slave 8051s – In modes 2 and 3 a 9th data bit is transmitted

• This bit is received into the RB8 bit of the SCON register

• If the SM2 bit of SCON is set, the RI flag will only be set when a serial frame is received with the 9th bit = ‘1’

• This 9th bit can be set/cleared to specify an address/data frame

TXD Master

8051 RXD RXD RXD

…………..

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Multi-Processor Communication

• On initialisation all slaves set the SM2 bit in the SCON register

– Each slave has a unique 8-bit address stored in non-volatile memory

• Master 8051 sends an address frame – 9th bit TB8 = ‘1’

– The address frame contains the 8-bit address of the destination slave

• All slaves will see the received address frame

– RI bit will be set because the 9th bit RB8 = ‘1’

– Each slave checks the received address against it’s own address

• The addressed slave will now clear it’s SM2 bit in SCON to ‘0’

• The master will now send some data frames with the 9th bit = ‘0’

– Only the addressed slave will see the data frames

– No RI flag will be set in the other slaves because the RB8 bit is ‘0’

– On completion of data reception the addressed slave will set the SM2 bit to await another address frame

References

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