Ewout Vandamme (Agilent Technologies, NMDG),
Wladek Grabinski (Motorola, Geneva),
Dominique Schreurs (K.U.Leuven), and
Thomas Gneiting (ADMOS)
LARGE-SIGNAL NETWORK ANALYZER MEASUREMENTS AND THEIR USE IN
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Outline
• Large-Signal Network Analyzer (LSNA) technology
• Advantages of using LSNA for device modelling engineers
• LSNA measurements
• de-embedding
• implementation in CAE tool (iccap) • measurement and simulation results
• tuning of model parameter to LSNA measurements
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Agilent’s Large-Signal Network Analyzer technology
Cal Kit,
e.g. LOS, LRRM, etc.
Power Std Phase Std Calibration Standards: a1 b1 ab22 i1 v1 or, equivalently, i2 v2 (a) • RF bandwidth: 600 MHz - 20 GHz • max RF power: 10 Watt
• IF bandwidth: 8 MHz
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•
2-port Device-Under-Test (DUT) under periodic excitation• e.g. transistor excited by a 2.4 GHz tone with an arbitrary output
termination
•
All current and voltage waveforms are represented by a fundamental and harmonics•
Spectral components Xh = complex Fourier Series coefficients of the waveformsCW class of signals measured with LSNA
Freq. (f0=2.4 GHz) 1*f0 2*f0 3*f0 4*f0
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LSNA measurements: time domain, frequency
domain or combination of both (e.g. envelope in modulation)
=
∑
= H h t f h j h e X t x 0 2 Re ) ( π∫
− − = 1 0 2 ) ( 2 f t f h j h f x t e dt X π frequency l fundamenta period f = /1 =Mixdes 2002 6
Advantages of using the LSNA in device modelling
• Measure the following characteristics of your DUT making a single
connection, using one measurement setup (the LSNA)
• DC,
• Small-signal (Scattering parameters), and • Large-signal behaviour
• Verify the model accuracy of your device under realistic operation conditions
• power amplification • high-speed switching
• Identify modelling problems at a single glance
• LSNA measurements, e.g., immediately reveal weaknesses in capacitance and
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Use of LSNA measurements in CAE tool (iccap)
⇒ ⇒⇒
⇒ model verification, optimisation (and extraction)
ICCAP specific input
ADS netlist. Used, a.o., to impose the measured impedance to the output of the transistor in simulation
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Use of LSNA measurements for simulation (1/2)
Measurements RF de-embedding V1m,dc I1m,dc V2m,dc I2m,dc a1c b1c a2c b2c v1c i1c v2c i2c calibrated V1,dc I1,dc V2,dc I2,dc ⇒
LSNA accounts for cable resistances v1c i1c v2c i2c v1d i1d v2d i2d ⇒
⇒
@ f0, 2*f0, …Reference planes before and afterde-embedding
Mixdes 2002 9 De-embedding intermezzo (1/2) 0 0.5 1 1.5 2 -3 -2 -1 0 1 2 before after de-embedding Time/period Ga te cu rren t / m A
Equivalent circuit of the RF test-structure,
including the DUT and layout parasitics
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De-embedding intermezzo (2/2)
Detailed view on the layout of the RF MOSFET for minimum influence of pad parasitics
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Use of LSNA measurements for simulation (2/2)
RF de-embedding Simulations v1c i1c v2c i2c v1d i1d v2d i2d ⇒ v1d i1d v2d i2d Compare measurements: with simulations: vv1s i1s 2s i2s
⇒
Rde1and Rde2are de-embedding resistances (in dc path) The load impedance ZLat f=n*f0equals 50 Ω if a2n<-50 dBm
Reference planes before and afterde-embedding
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Input capacitance behaviour
Vgs,dc=0.9 V
Vds,dc=0.3 V Vds,dc=1.8 V
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Dynamic loadline & transfer characteristic
Vgs,dc=0.3 V
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Dynamic loadline & transfer characteristic
Vds,dc=0.9 V Vgs,dc=0.9 V
DC operating point if RF
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Dynamic loadline & transfer characteristic
Vgs,dc=1.8 V
Cable resistance + Rde2loss
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Intermezzo (1/2): extrapolation example SiGe HBT
Model parameters extracted using DC measurements up to 1 V
100 200 300 400 500 600 700 800 0 900 -0.002 -0.001 0.000 0.001 -0.003 0.002 time, psec i1s ts i1m ts _d e 100 200 300 400 500 600 700 800 0 900 0.6 0.7 0.8 0.9 1.0 1.1 0.5 1.2 time, psec v1s ts v1m ts _d e 100 200 300 400 500 600 700 800 0 900 1.3 1.4 1.5 1.6 1.2 1.7 time, psec v2s ts v2m ts _d e 100 200 300 400 500 600 700 800 0 900 0.000 0.002 0.004 0.006 -0.002 0.008 time, psec i2s ts i2m ts _d e SiGe HBT Vbe= 0.9 V; Vce=1.5 V; Pin= - 6 dBm; f0= 2.4 GHz simul. meas.
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Intermezzo (2/2): extrapolation example SiGe HBT
Measured and simulated DC characteristics
Measurement Simulation SiGe HBT - DC characteristics 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.0 1.6 -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 -0.015 0.025 VbDC DCm eas 1..I ce 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.0 1.6 -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 -0.015 0.025 VbDC i2.i
Alcatel Microelectronics and the Alcatel SEL
Stuttgart Research Center teams are acknowledged for providing these data.
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AM to AM (gain) and AM to PM versus input power
Vds,dc=Vgs,dc=1.2 V 1 dB
compressi on
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Drain current & gate voltage time domain waveforms
Vgs,dc=0.3 V
“Class C” Class AB Class A
Vgs,dc=1.2 V Vgs,dc=0.9 V Vds,dc=0.9 V vin vin vin
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Effect of operating regime on dissipated power in the DUT, load, and DC power supply — class AB
Vds,dc=0.9 V, Vgs,dc=0.9 V RFoutput power at f=f0 Instantaneous power dissipated in DUT Power delivered by DC supply PAE=37 %
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Effect of operating regime on dissipated power in the DUT, load, and DC power supply — “class A”
Vds,dc=0.9 V, Vgs,dc=1.8 V RF output power at f=f0 Instantaneous power dissipated in DUT Power delivered by DC supply PAE=11 %
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Tuning of model parameters to LSNA measurements
before
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LSNA measurements in device modelling Conclusions:
• Unique tool for complete large-signal model accuracy assessment under realistic RF or microwave signals
• information on amplitude and phase
• Reduce number of design cycles and reduce manufacturing costs through better device models, thus more optimal designs
• Optimize model parameters to LSNA measurements
• Benchmark various device models, e.g.,
• BSIM, MM11, EKV, …
• Gummel-Poon, VBIC, MEXTRAM, HICUM, ...
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Contact
• For info on LSNA technology, visit
http://www.agilent.com/find/lsna
• Soon, a measurement and consulting service related to Large-Signal Network Analyzer Technology will be available through the ‘NMDG’ group in Belgium. For info, you need to contact NMDG directly at email: Marcus_Vandenbossche@agilent.com, or