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International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, Volume 2, Issue 4, April 2012)

457

Design and Analysis of CurrenttoVoltage and Voltage

-to-Current Converters using 0.35µm technology

Kopal Gupta

1

, Prof. B. P Singh

2

, Rockey Choudhary

3

1M.Tech (VLSI Design ) at Mody Institute of Technology &Science, Laxmangarh (Sikar),India 2 Mody Institute of Technology &Science, Department of ECE, Laxmangarh (Sikar), India 3M.Tech (VLSI Design) at Mody Institute of Technology &Science, Laxmangarh (Sikar), India

1

[email protected]

2[email protected]

3[email protected]

Abstract—This paper presents the design of a Current-to-Voltage (I−V) and Current-to-Voltage-to-Current (V−I) converters for use in current-mode analog integrated circuits are described. The proposed I−V converter and V-I Converter has high linear range. The circuit uses MOS transistors in linear and saturation regions to produce an output current linearly related to the input voltage. Both circuits have been implemented in a 0.35μm standard digital CMOS process.

KeywordsCurrent mode circuits, Current-to-Voltage converter, Voltage-to-current Converter

I. INTRODUCTION

Current-mode IC designs are gaining popularity owing to their high linear range, speed and potential for low power designs [1]. Current-to-Voltage (I−V ) and Voltage-to-Current (V − I) converters play an important role as interface/measurement elements in current-mode mixed signal systems. Compact I−V and V−I converters are essential in realizing the high performance offered by current-mode systems. Specifically, it is important that these interface elements offer a high linear range, bandwidth and a variable conversion gain. More importantly, their performance should remain unaffected by the loading effects of current-mode systems. A popular approach to implementing I−V converters is to configure an operational amplifier as a charge integrator. This approach, owing to sampling delays is limited to measuring low frequency currents. A transimpedance amplifier, as shown in Figure 1(b) provides continuous time I−V conversion and is a viable alternative. This approach requires careful consideration to compensation to ensure good performance [2].Also, measuring small currents on chip is prohibitive owing to the large values of resistors needed. Logarithmic converters using BJTs have a high dynamic range but implement a nonlinear current conversion and are not suited for standard digital CMOS processes.

V − I converters play a vital role at the input interface of current-mode systems. A common approach to current generation involves the use of an operational amplifier with a MOS transistor M1 and a resistor R1 as shown in Figure 1(c). Negative feedback ensures that the current through the transistor M1 is equal to the applied input voltage divided by the resistor R1. For a given size of M1 and resistor R1, the finite rail-to-rail output voltage swing of the amplifier poses the major limitation to the achievable linear range of currents. Alternate approaches that have been proposed for V −I converters [3],[4],[5], [7] suffer from limited linearity. and/or susceptible to loading conditions affecting performance.

Fig.1 Interface circuitry for current mode systems(a)block diagram for measurement and characterization of current mode systems (b)Transimpedance amplifier used for I-V conversion (c)Typical

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International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, Volume 2, Issue 4, April 2012)

458

II. CURRENT-TO-VOLTAGE CONVERTER

Current to voltage converter is one of the basic building blocks in analog circuits. Aiming at the needs of wide dynamic range, design of current to voltage conversion circuit is required. A current to voltage conversion can be realized by means of a charge accumulation process. If the time of the charge accumulation is made variable, then the gain of the conversion can be variable. However, this approach requires a linear capacitor and introduces, in many cases, a significant delay. Also, for the variable charge accumulation time, additional circuitry is required, which may add a complexity in the circuit structure. Another approach of the conversion is to use the logarithmic feature of MOS transistors. If the input current flow through a MOS channel and the gate-to-source voltage is made to vary with the current, this voltage will be logarithmically proportional to the current. Althoug this approach provides a variable gain and a wide input signal range, the sensitivity of the circuit is usually low.

A. Circuit Description

The input current i can be either positive or negative. Assume that the two PMOS transistors are identical and so are the two NMOS transistors.In case of i=0, vG=VG and vo=VG.If i 0, vG=VG-vg and iP1 and iN1 are changed.

Consequently, both iP2 and iN2 tend to change. The transistors operate in different ways according to the level of the signal current i. One of the following cases can be possible.

Fig.2 Schematic of current-to-voltage converter

Case I: If the current signal i is very weak, in an nA range or below, vg, the variation at the common gate of the four transistors namely P1, N1, P2 and N2 is very small. Assume that it is small enough not to drive P2 and N2 out of the saturation region, but it can modify the currents iP2 and iN2 effectively. As the transistors in the NMOS or PMOS pairs are identical, P2 and N2 tend to produce a difference of currents that is equal to the input signal current i. As there is no path for the current difference to flow out, it is used to change drain-to-source voltages of the transistors P2 and N2,respectively.Due to finite drain-to-source resistances of P2 and N2,the output voltage v0 changes from VG to VG-v0.The variation of the output voltage will be

v0 i( ) ,

where rDSP2 is the drain to source resistance of P2 and rDSN2 is the drain to source resistance of N2 .In the saturation region rDSP2//rDSN2 can have a large values, e.g. tens,or even hundreds,of Mega ohms. Thus, a small current variation will be converted into a voltage variation with a very high and quasi-constant gain.

Case2. If the current signal i is strong, e.g. in a µA range ,vg ,the voltage variation at the common gate will be more significant than that in the case discussed above. Such a variation can drive P2 and N2 from the saturation region to the triode region. If i , P2 will be in the triode mode, and N2,in the saturation, and the voltage variation at the output node will be proportional to the product of irDSP2.In case of i , it is proportional to the product of –irDSN2.It should

be noted that in these cases rDSP2 and rDSN2 are the drain to source resistances in the triode mode and they are much smaller than those in case of the saturation mode. Thus, compared to the case of a weak current signal i, the conversion gain is significantly lowered.

Case3 If the current signal i is at medium level,P2 or N2 can operate crossing the saturation and triode regions, the conversion gain can be in the medium range. As there is infact, no clear edge of any of the two regions of the

transistors, and is a continuous function of vDS, the

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International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, Volume 2, Issue 4, April 2012)

459 B. Simulation Results

The circuit shown in Fig.3 has been simulated with T-SPICE using 0.35µm technology. Fig.4 shows the transfer characteristics of the circuit when the input current varies between -1nA and +1nA.In this input current range, the output voltage varies between 1.61V and 1.72V.

(a) Input Current

(a) Output Voltage

Fig.3 Transient Analysis of Current-to-Voltage Converter

Fig.4 Transfer Characteristics,the output voltage versus the input current

III. VOLTAGE-TO-CURRENT CONVERTER

In instrumentation circuitry, DC signals are often used as analog representations of physical measurements such as temperature, pressure, flow, weight, and motion. Most commonly, current signals are exactly equal in magnitude throughout the series circuit loop carrying current from the source (measuring device) to the load (indicator, recorder, or controller), whereas voltage signals in a parallel circuit may vary from one end to the other due to resistive wire losses. Furthermore, current-sensing instruments typically have low impedances (while voltage-sensing instruments have high impedances), which gives current-sensing instruments greater electrical noise immunity.

In order to use current as an analog representation of a physical quantity, we have to have some way of generating a precise amount of current within the signal circuit. But how do we generate a precise current signal when we might not know the resistance of the loop. The answer is to use an amplifier designed to hold current to a prescribed value, applying as much or as little voltage as necessary to the load circuit to maintain that value. Such an amplifier performs the function of a current source.

Voltage-to-current converters have a miscellany of applications in analogue electronics, notably in the design of mixers/modulators, voltage-to-frequency converters and interface units between circuits employing voltage-mode signal processing and those using current-mode processing. Popular types of voltage-to-current converters use feedback, cross-coupling , originally proposed by Caprio, and the multi-tanh technique.

(4)

International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, Volume 2, Issue 4, April 2012)

460 The circuit shown in Fig.5 has been simulated with T-SPICE using 0.35µm technology. Fig.4 shows the transfer characteristics of the circuit when the input voltage varies between -2V and +2V.In this input voltange range, the output current varies between 1.61V and 1.72V.

Fig.6 V-I converter response to a sinusoidal input

Fig.7 Transfer Characteristics,the output current versus the input voltage

A. Proposed Circuit Design

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International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, Volume 2, Issue 4, April 2012)

461 The circuit was simulated using T-Spice with 0.35μm TSMC CMOS process parameters. Vdd=3.3V.Fig.9 (a) shows the time response of the voltage to current converter for a sinusoidal input voltage with 1V peak amplitude and 100Hz frequency. Output of voltage to current converter is having peak amplitude of 200mA in Fig. 9 (b).

(a). Sinusoidal input voltage

(b). Output Current

Fig.9 Time response of voltage to current converter

IV. CONCLUSION

We have described linear I−V and V −I converters that are compact and easy to implement in a standard digital CMOS process. The proposed circuits have been implemented in a 0.35μm CMOS technology and experimental results have been presented. Both the I − V and V − I converters display a large linear range and introduce very low distortion. I-V Converter circuit consists of only four transistors, is self biased and doesn’t need any clock control. V-I Converter consist of op-amp and resistances. Setting the value of resistor increases the dynamic range.

Acknowledgement

The authors would like to thank Mody Institute of Technology & Science for supporting in carrying out this work.

REFERENCES

[1] C.Toumazou, Ed., Analogue IC Design: The Current-Mode Approach.IEE Circuits and Systems Series, Peter Peregrinus Ltd., 1990.

[2] R.N.Caffin, ―On Some Aspects of the High-Frequency Performance of Operational Amplifiers and Current-to-Voltage Converters,‖ IEEE Journal of Solid-State Circuits, vol. 10, pp. 503–505, Dec. 1975.

[3] E. B.Nauta and W.Kruiskamp, ―A CMOS Triode Transconductor,‖ Proceedings of the International Symposium on Circuits and Systems, vol. 4,pp. 2232–2235, June 1991.

[4] A. Nedungadi and T.R.Viswanathan, ―Design of Linear Transconductance Elements,‖ IEEE Transactions on Circuits and Systems, vol. 31, pp. 891–894, Oct. 1984.

[5] K.C.Kuo and A.Leuciuc, ―A Novel Linear Tunable MOS Transconductance,‖IEEEJournal of Solid-State Circuits, vol. 36, pp. 147–151, Jan.2001.

[6] C.Wang and J.Wang, ―Design of Linear Transimpedance Amplifiers,‖Proceedings of the 4th International Conference on ASIC, pp. 232–235,Oct. 2001.

References

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