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High PSRR LDO Regulator by Varying Substrate Voltage on 90-nm CMOS Technology

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Figure

Fig. 3. Line Regulation
Fig. 4. Load Regulation The simulation result illustrates that the output voltage variation is 933μV with the load current changing from 0 to 1 mA, resulting in the load regulation of 933μV/mA
Fig. 6. Quiescent Current

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