OPTIMAL BUFFER MANAGEMENT FOR
SHARED BUFFER ATM SWITCHES
by
SUPRIYA SANDEEP SHARMA
A dissertation submitted to the Graduate Faculty of North Carolina State University
in partial ful llment of the requirements for the Degree of
Doctor of Philosophy
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Raleigh, NC 1996
GRADUATE COMMITTEE:
Yannis Viniotis
Jack Silverstein
Arne Nilsson
(Co-chair of advisory committee) (Co-chair of advisory committee) Harry Perros
Biography
Supriya Sharma (nee Kolte) was born on the 22nd of September, 1970, in Bombay,
India. Due to her mother's joining the wrong line at the admissions oce, she entered kindergarten (KG{I) at the tender age of 2 years and 9 months. By the time this error was discovered, she had already charmed her way into KG{II, (her ability to lisp, \Jack and Jill went up a hill", did not go unappreciated). Thus began her academic career in St. Joseph's High School, Colaba.
Several thousand exams, school plays, sports days, and summer vacations later, Supriya emerged out of the great educational machinery bearing a bachelor's degree in Electrical Engineering from Visvesvaraya Regional College of Engineering, Nag-pur. She might have joined the working masses at that time if she hadn't met her husband, Sandeep, who persuaded her to join him at Clemson University, SC, for a Master's degree in Computer Engineering. A misguided t of enthusiasm resulted in her applying for a Ph.D. in the ECE dept. in NC State University, Raleigh. There, she found that she had to work very hard and produce this thesis, her advisors being singularly unimpressed with, \Jack and Jill, ::: ".
Her mother, Pushpa, is a college teacher in Botany, and her father, Ashok, a Marine Engineer in the Navy. Her husband, Sandeep, and her brother, Priyadarshan, are also engineers. The family is redeemed by the inclusion of her sisters{in{law, Kiran and Bharati, and brother{in{law, Rajiv, who are (medical) doctors.
Acknowledgements
Dr. Yannis Viniotis has been one of the few individuals brave enough to attempt to teach me mathematics. His in nite patience and persistence opened up the magical world of stochastic processes to me. His high standards for analysis and writing have often been a source of vexation to me, but now I cannot but thank him for them.
I would like to thank Drs. Rouskas and Perros for working with me on the optical switching project, and regret that we did not continue on it. Dr. Jack Silverstein not only spent a couple of hours on the theory of matrices with me, but also stepped in at a moment's notice to substitute for another committee member. Dr. Nilsson initiated me into the the intricacies of MMPPs, and also served on my committee. Dr. Syski, of College Park, Maryland, provided several references and answered my questions on Taboo Probabilities. My fellow students, Nitin Agrawal, Olen Stokes, Sanjeev Rampal, Sridhar Ramesh, and Ted Kuo, made research a lot more fun and enjoyable. Thanks to all of them, and to the other professors and students in NC State whose interactions have helped me.
I am grateful to IBM and the ECE graduate department for providing me with research and teaching assistantships during the initial years. Jean{Luc Abaziou of Alcatel Network Systems, Raleigh, deserves special thanks for enabling several co{op sessions. It was during one of these sessions that I found the problem addressed in this thesis. My colleagues in Alcatel, Cealie Ravenell, and Je Jones, spent many hours discussing the problem with me. Thanks to my manager, Claude Hurlocker, who always gave me leeway to experiment.
I have been rather lucky in having had so many people to support me throughout the course of my Ph.D. My husband, Sandeep, has been a solid rock of support, especially during the last one year. For his unquestioning love and understanding, he has earned my deepest gratitude. The rest of my family, viz. my parents, brother, in{laws, and nephews, along with my friends, Sridevi Basavaraju, Vincent Bemmel, Jean Saupin, Srikant Gokulnath and Betsy Hofelt, have kept me alive with letters, e{mails, and phone calls. I will always cherish their friendship and support.
Contents
List of Figures
ix
List of Abbreviations
xi
1 Introduction
1
1.1 Need for ATM networks : : : : : : : : : : : : : : : : : : : : : : : : : 1 1.2 What is ATM? : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 2 1.2.1 Providing QoS in ATM networks : : : : : : : : : : : : : : : : 4 1.3 ATM switch architecture : : : : : : : : : : : : : : : : : : : : : : : : : 6 1.3.1 A generic ATM switch : : : : : : : : : : : : : : : : : : : : : : 6 1.3.2 The packet switching problem | Contention : : : : : : : : : : 7 1.3.3 Comparison of design choices in ATM switches: : : : : : : : : 8 1.4 Trac controls in ATM networks : : : : : : : : : : : : : : : : : : : : 12 1.5 Layout of the thesis : : : : : : : : : : : : : : : : : : : : : : : : : : : : 14
2 Buer Management Policies in Shared Buer Switches
17
2.1 Shared buer switches : : : : : : : : : : : : : : : : : : : : : : : : : : 17 2.1.1 Output queueing vs. Shared buering : : : : : : : : : : : : : : 17 2.1.2 Architecture of a SBS : : : : : : : : : : : : : : : : : : : : : : 19 2.1.3 Congestion in a SBS : : : : : : : : : : : : : : : : : : : : : : : 21 2.2 Classi cation of buer management policies : : : : : : : : : : : : : : 22 2.2.1 Pushout/Non-Pushout policies: : : : : : : : : : : : : : : : : : 22 2.2.2 Static vs. Dynamic policies : : : : : : : : : : : : : : : : : : : 24 2.3 Queueing literature on SBS : : : : : : : : : : : : : : : : : : : : : : : 25 2.3.1 Continuous time models : : : : : : : : : : : : : : : : : : : : : 25 2.3.2 Discrete time models : : : : : : : : : : : : : : : : : : : : : : : 27
2.4 Literature on optimality of buer policies. : : : : : : : : : : : : : : : 29 2.4.1 Continuous time models : : : : : : : : : : : : : : : : : : : : : 29 2.4.2 Discrete time models : : : : : : : : : : : : : : : : : : : : : : : 30
3 Modeling a
2 2Shared Buer Switch
31
3.1 Modeling assumptions : : : : : : : : : : : : : : : : : : : : : : : : : : 31 3.2 A stochastic model of the buer : : : : : : : : : : : : : : : : : : : : : 33 3.2.1 Transitions in the state space : : : : : : : : : : : : : : : : : : 36 3.2.2 State space of the overow process : : : : : : : : : : : : : : : 39 3.2.3 Decisions made by policyf : : : : : : : : : : : : : : : : : : : 39 3.3 Stochastic properties of the buer and overow processes : : : : : : : 42 3.3.1 An auxilliary process : : : : : : : : : : : : : : : : : : : : : : : 42 3.3.2 Markov{like properties for overow process : : : : : : : : : : : 43 3.3.3 Repetitive properties of the overow process : : : : : : : : : : 48
4 Taboo Probabilities
49
4.1 Introduction to Taboo probabilities : : : : : : : : : : : : : : : : : : : 49 4.2 and : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 50 4.3 Thresholds on the linex + y = K : : : : : : : : : : : : : : : : : : : : 51 4.3.1 Numerical evaluation of thresholds : : : : : : : : : : : : : : : 53 4.4 Proof of Lemma 8 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 55
5 Optimal Policies for 2 2 systems
61
5.1 The combined stochastic process : : : : : : : : : : : : : : : : : : : : : 61 5.1.1 The coupling of the processes under policiesf and g : : : : : 62 5.1.2 On Cell loss : : : : : : : : : : : : : : : : : : : : : : : : : : : : 65 5.2 Static policies with iid Bernoulli arrivals : : : : : : : : : : : : : : : : 66 5.2.1 Markov property of cell loss : : : : : : : : : : : : : : : : : : : 66 5.2.2 The loss at 1 : : : : : : : : : : : : : : : : : : : : : : : : : : : 68
5.2.3 Stochastically good states : : : : : : : : : : : : : : : : : : : : 70 5.2.4 The optimal policy : : : : : : : : : : : : : : : : : : : : : : : : 72 5.2.5 A discussion on the POT policy : : : : : : : : : : : : : : : : : 75 5.3 Static policies with correlated arrivals : : : : : : : : : : : : : : : : : : 76 5.3.1 The D{BMAP process : : : : : : : : : : : : : : : : : : : : : : 76 5.3.2 Stochastic properties of the buer and overow processes : : : 77
5.3.3 Taboo probabilities under correlated arrivals : : : : : : : : : : 80 5.3.4 Evaluatingi and i : : : : : : : : : : : : : : : : : : : : : : : 81
5.3.5 Losses with correlated arrivals : : : : : : : : : : : : : : : : : : 82 5.3.6 The loss at 1 : : : : : : : : : : : : : : : : : : : : : : : : : : : 84
5.3.7 Stochastically good states : : : : : : : : : : : : : : : : : : : : 85 5.4 Dynamic policies with iid Bernoulli arrivals : : : : : : : : : : : : : : : 87 5.4.1 Measurements taken by the dynamic policy : : : : : : : : : : 88 5.4.2 The decision made by the dynamic policy. : : : : : : : : : : : 91 5.4.3 Proof of convergence : : : : : : : : : : : : : : : : : : : : : : : 93
6 The
N Ncase
101
6.1 Stochastic model : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 101 6.1.1 What is a stochastically good state? : : : : : : : : : : : : : : 102 6.2 Simulations with POT policies : : : : : : : : : : : : : : : : : : : : : : 104 6.2.1 Set 1: Geometric arrivals, three ports identical : : : : : : : : : 105 6.2.2 Set 2: Bursty arrivals, three ports identical : : : : : : : : : : : 110 6.2.3 Set 3: Bursty arrivals, two identical ports: : : : : : : : : : : : 112 6.2.4 Conclusions on POT policies : : : : : : : : : : : : : : : : : : : 113 6.3 A Pushout policy with Dynamic Thresholds : : : : : : : : : : : : : : 114 6.3.1 Set 1: Geometric arrivals, three ports identical : : : : : : : : : 115 6.3.2 Set 2: Bursty arrivals, three ports identical : : : : : : : : : : : 116 6.3.3 Set 3: Bursty arrivals, two ports identical: : : : : : : : : : : : 118 6.3.4 Conclusions on the MBP policy : : : : : : : : : : : : : : : : : 119
7 Conclusions and future work
123
Appendix
127
A Proofs of various lemmas
129
A.1 Proof of Lemma 7 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 129 A.2 Proof of Lemma 11 : : : : : : : : : : : : : : : : : : : : : : : : : : : : 133 A.3 Proof of Lemma 12 : : : : : : : : : : : : : : : : : : : : : : : : : : : : 134 A.4 Proof of Lemma 10 : : : : : : : : : : : : : : : : : : : : : : : : : : : : 135 A.5 Proof of Lemma 15 : : : : : : : : : : : : : : : : : : : : : : : : : : : : 138 A.6 Proof of Theorem 2 : : : : : : : : : : : : : : : : : : : : : : : : : : : : 140
List of Figures
1.1 An ATM network : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 4 1.2 A generic ATM switch : : : : : : : : : : : : : : : : : : : : : : : : : : 6 1.3 Contention for an output port in an ATM switch : : : : : : : : : : : 8 1.4 A bus switch : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 9 1.5 An input queued ATM switch : : : : : : : : : : : : : : : : : : : : : : 11 2.1 An output queued Switch : : : : : : : : : : : : : : : : : : : : : : : : 18 2.2 A shared buer switch : : : : : : : : : : : : : : : : : : : : : : : : : : 19 2.3 Memory management in a shared buer switch : : : : : : : : : : : : : 20 3.1 Phase dierence in cell arrivals and departures : : : : : : : : : : : : : 32 3.2 Order of operations by queue manager : : : : : : : : : : : : : : : : : 32 3.3 A queueing model of a 2 2 SBS : : : : : : : : : : : : : : : : : : : : 34 3.4 The state space of the queues in the buer : : : : : : : : : : : : : : : 34 3.5 Next state of the buer, when no servers idle : : : : : : : : : : : : : : 36 3.6 Next state of the buer, when the X{server idles : : : : : : : : : : : 37 3.7 State space of the overow process : : : : : : : : : : : : : : : : : : : 40 3.8 At an overow instance : : : : : : : : : : : : : : : : : : : : : : : : : : 40 3.9 Buer state at overow times : : : : : : : : : : : : : : : : : : : : : : 41 4.1 Monotonicity of and : : : : : : : : : : : : : : : : : : : : : : : : : 51 4.2 Along the linex + y = K : : : : : : : : : : : : : : : : : : : : : : : : : 52 4.3 Threshold values vs. server Y arrival rate : : : : : : : : : : : : : : : : 55 5.1 The coupling of processes under policies f and g : : : : : : : : : : : : 62 5.2 The coupling of buer processes at overow times : : : : : : : : : : : 63 5.3 The stochastic ordering of the states : : : : : : : : : : : : : : : : : : 71 5.4 Thresholds obtained with a 2{phase D{BMAP : : : : : : : : : : : : : 83
5.5 The new process : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 94 6.1 Set 1: Total CLP under POT{b0 : : : : : : : : : : : : : : : : : : : : : 106
6.2 Set 1: CLP of all ports under POT-5 : : : : : : : : : : : : : : : : : : 107 6.3 Set 1: Cell loss of port 0 under POT{b0 : : : : : : : : : : : : : : : : : 108
6.4 Set 1: Cell loss of port 3 under POT{b0 : : : : : : : : : : : : : : : : : 109
6.5 Set 1: Comparison of cell losses under POT-2 and POT-11 : : : : : : 109 6.6 Set 2: Cell loss under POT-5: : : : : : : : : : : : : : : : : : : : : : : 110 6.7 Set 2: Cell loss of port 0 under POT{b0 : : : : : : : : : : : : : : : : : 111
6.8 Set 2: Cell loss of port 3 under POT{b0 : : : : : : : : : : : : : : : : : 111
6.9 Set 3: Cell losses under POT-5 : : : : : : : : : : : : : : : : : : : : : 112 6.10 Set 1: Cell loss of port 0 under MBP, POT-2, and POT-11 : : : : : : 115 6.11 Set 1: Cell loss of port 3 under MBP, POT-2, and POT-11 : : : : : : 116 6.12 Set 2: Cell loss of port 0 under MBP, POT-2, and POT-11 : : : : : : 117 6.13 Set 2: Cell loss of port 3 under MBP, POT-2, and POT-11 : : : : : : 117 6.14 Set 3: Cell losses under MBP : : : : : : : : : : : : : : : : : : : : : : 118 6.15 Set 3: Cell loss of port 1 under MBP, and POT{b0 : : : : : : : : : : : 119
6.16 Set 3: Cell loss of port 3 under MBP, and POT{b0 : : : : : : : : : : : 120
A.1 The sample path when x + y = a + b and x < a : : : : : : : : : : : : 130 A.2 The sample path when x + y < a + b and d is odd : : : : : : : : : : 131 A.3 The sample path when x + y > a + b : : : : : : : : : : : : : : : : : : 132
List of abbreviations
a.e. Almost Everywhere
i.o. In nitely Often
iid Independent and Identically Distributed
lhs Left Hand Side
pmf Probability Mass Function
rhs Right Hand Side
ATM Asynchronous Transfer Mode
B-ISDN Broadband Integrated Services Digital Network
CLP Cell Loss Probability
CP Complete Partitioning
CS Complete Sharing
D{BMAP Discrete Batch Markovian Arrival Process
DoD Drop on Demand
Gbps Gigabits per Second
I/O Input/Output
IBP Interrupted Bernoulli Process
LAN Local Area Network
Mbps Megabits per Second
MMBP Markov Modulated Bernoulli Process
MBP Maximum Busy Period
POT Pushout with Threshold
QoS Quality of Service
SBS Shared Buer Switch
SMA Sharing with Minimum Allocation
SMXQ Sharing with Maximum Queue Length
SMQMA Sharing with Maximum Queue Length and Minimum Allocation
SONET Synchronous Optical Network
VC Virtual Channel
VP Virtual Path
VCI Virtual Channel Identi er
VPI Virtual Path Identi er
WAN Wide Area Network
Chapter 1
Introduction
1.1 Need for ATM networks
Imagine yourself as the administrator of a medical school with hospital and research labs, which are under construction. Amongst the many things that have to be planned, you have to decide upon the telecommunications facilities to be provided in your campus. You are ambitious and wish to make your school state of the art, so you plan for the following:
Medical imaging labs. Here you can get X-rays, CT scans, etc., of patients and
zip them over to a specialist for an opinion on the other side of the world.
Operating theatres with cameras. Operations can be recorded and transmitted
to a group of doctors called in for consultation while the operation is going on.
Multimedia classrooms. A student doing research in Timbuctoo can make a
presentation to the rest of the class and present his/her data, without ever leaving his/her site.
Of course, you cannot neglect the necessities, like a phone system, fax machines, computers, cable TV, and video on demand, for the entertainment of patients.
You realize that your needs are heterogenous. While your medical applications require high-denition, high-bandwidth service with the strictest quality of service, and in real-time, you don't want to spend money on expensive equipment for the lower priority items like connecting computers and phone lines. As far as you are concerned, e-mail could wait a couple of minutes to be delivered!
Even though you know that most existing networks are engineered to cater to only one or two types of services1, you would prefer to integrate all your services
and have the same equipment transmit them. That would save so much money on infrastructure! It would be essential that your communications equipment be capable of meeting the demands of new and as yetunknown applications that will be dreamt up tomorrow. Equally as important will be its universal applicability, i.e., you should be able to avoid having to make transitions (and buying equipment to do so) as you go from your campus network to a Wide Area Network (WAN), like the Broadband{ Integrated Services Digital Network (B{ISDN).
A quick comparison of all the available technologies 8]for such a campus network, e.g. T-carrier networks, X.25 networks, Frame-Relay, Switched Multi-mega bit Data Services and the Asynchronous Transfer Mode (ATM), shows that ATM seems to be the most promising, ful lling all the above requirements. It can carry all kinds of trac { data, voice, video, at speeds up to 622 Mbps with dierent qualities of service for dierent applications. It is envisioned that ATM will do well on all sizes of networks, from small to worldwide. As will be seen in the next section, the complete exibility in service de nition ensures that newer applications will also be supported, as and when they emerge. Besides, ATM provides multicasting and broadcasting services (which would be useful from the `global classroom' point of view) while the others oer only point-point links.
Therefore, a detailed enquiry into the nature of ATM, along with some of the challenges that have to be met in its succesful deployment is merited.
1.2 What is ATM?
While there are many facets to this technology, a rather simplistic view of it will be presented in random order in this section" just enough to formulate the problem studied without getting lost in the plethora of information that exists. For all the details, any good book on ATM such as 17, 50]may be consulted.
ATM is a high-speed, (155/622 Mbps for B{ISDN), packet switching technology, that transfers information in short, xed size packets, of 48 bytes called cells. Hav-ing short, xed size packets simpli es switch design which is necessary at the high speeds that ATM operates at. It also reduces the delay and jitter of the cells, which
1Like the Internet for data and limited voice/video, or the phone network for voice/data.
makes it possible for ATM to carry delay sensitive applications like voice and video. Its asynchronous nature means that a cell can be transmitted whenever it is ready (almost), and does not have to wait for some particular time dictated by the physical medium. This too reduces cell delay.
Unlike circuit switching, bandwidth does not have to be obtained in xed size quanta. Instead, the packet switching technique employed in ATM allows exible bandwidth allocation, which can give bandwidth savings because of statistical multi-plexing. This makes transferring data{type applications, like e-mail, faxes, and other non{real time services, much cheaper than in pure circuit switched networks.
Though it can be seen that ATM is capable of providing a transport media for a variety of applications, several trade{os have had to be made to make it possible. For example, consider the choice of the cell size. The telephone industry wanted short 32 byte payloads, so that cell delay would be reduced" but the data industry wanted larger payloads on the order of 64 bytes which would give it improved payload to overhead utilisation. The ATM group, wanting to placate both groups 17], made the unscienti c but politically wise choice of 48 bytes, the average of 32 and 64!
With the aim of simplifying cell routing within networks, (thus facilitating high speed switching), ATM has been made aconnection-orientedtransmission technology. A path, called a Virtual Path (VP) or a Virtual Channel (VC), through the network is set up for a connection, and all cells of the connection follow the same path. This is demonstrated in Figure 1.1. Users X and Y communicate via VCs B and C, which are contained within VP A (for more information, see 28]). Of course, the ATM cells of VCs B and C do not travel on the transmission line as such, but are carried as the payload of a physical layer Protocol Data Unit like the Synchronous Optical Network (SONET) for B{ISDN. In our dealings, we shall ignore this physical layer and instead deal with only the ATM cells at the ATM layer.
Though the network in Figure 1.1 looks rather like a WAN, ATM can be used in the local area too, to connect high-speed terminals to concentrators or switches. Standards are being de ned for Local Area Network emulation 2], making it possible for ATM to replace LANs. This will avoid the need for equipment to bridge between dierent network technologies. In short, the universal use of ATM will create a seamless network extending from the local to the worldwide.
Switch Switch
Switch
User X VCs B,C
VCs B,C
Network VP A
User Y
Figure 1.1: An ATM network
1.2.1 Providing QoS in ATM networks
ATM network operators recognize the diversity of applications and their needs. Even though it may not be possible in practice to identify each and every individual ap-plication, the ATM Forum, a group of vendors agreeing to common standards, has named ve service categories in its Trac Management Speci cation 3](see the spec for the gory details). These categories dier in the trac characteristics of the user trac and the guarantees made on the Quality-of-Service (QoS) or performanceseen by the cells, both of which will be described in the next two paragraphs. It is hoped that all applications, existing as well as yet-to-emerge, will fall into one or the other category, or new ones may need to be de ned in the future. To set{up a new con-nection, a user speci es the category of service, and the call is admitted if and only if the network has sucient resources to provide the desired QoS. Kurose 38]has a good article on the challenges encountered during this phase.
Trac Charactersitics
The easiest measure of users' trac characteristic is the Peak Cell Rate (PCR). But with this limited information in hand, the network can only do peak rate alloca-tion, which is rather like circuit switching and expensive. In order to successfully do
statistical multiplexing of network resources, (while satisfying the users QoS), it is necessary to know more (statistical) details of the cell arrival pattern of a connec-tion. While in lower-speed data networks, the arrival pattern could safely be assumed to have a simple, non-correlated distribution like the Poisson distribution, for ATM networks, with heterogenous applications, more complex models which specify the
mean/max burst length, degree of correlation, etc., have to be used. To keep things simple, the quantities that have so far been standardized by the ATM Forum are the
average cell rate, the sustained cell rate(SCR), and the maximum burst length.
QoS performance measures
The performance of a user connection is measured in terms of the delay, loss, and throughput, seen by the cells of the connection. These are described in the following paragraph.
Cell delay
The delay performance of cells is important to real-time, delay sensitive trac, like voice and video. For such applications, delay requirements are spec-i ed spec-in terms of spec-its average, variance, and variation. To obtain more control over the distribution of the delay, users may specifypercentiles too, i.e., a spec-i catspec-ion may say, \90% of the cells should have a delay of less than 1 m-sec". More details may be found in 1, 31].Cell loss
Thedataportion of applications is sensitive to cell losses and every cell lost has to be retransmitted. While it would be desirable to know the distribution of cell losses over time (i.e., are cells lost in bunches of cells or are the losses evenly distributed over all cells?) users restrict themselves to specifying cell loss in terms of theprobability of cell loss, the long term fraction of all arriving cells that get lost. For many service categories, this quantity should not go above 10;9, i.e., only about one cell in a billion may be lost!Throughput
The throughput maybe measured as the eective, time{averagednum-ber of cells/sec transferred by the network. From the point of view of the user, this may never be less than the average input rate of the connection. While some categories of trac demand a xed throughput (PCR), and some an av-erage (SCR), others merely ask for a lower bound (Min Cell Rate) and can actually adapt their throughput requirements to changing network conditions.The factors that contribute to the cell delay, loss, and throughput reduction, are discussed in detail in the next section.
1.3 ATM switch architecture
Since ATM is packet switched, resources within the switches such as buers are shared by cells of dierent connections. While this sharing may lead to ecient utilisation of resources, it also means that a resource may not always be available for a cell when it arrives at a switch. Yet ATM applications demand guarantees on the cell delay and loss! Therefore, it becomes important to examine switch architectures to ensure that they are capable of providing the quality of service that applications rely on.
In this section, we rst look at the functions of a generic ATM switch, identify the biggest problem that aects user performance | contention, and then compare switch architectures based on how they address this issue.
1.3.1 A generic ATM switch
Input Controllers
Output Controllers
Input Ports
Output Ports
IC IC
OC N OC
Switch Fabric Control Processor
1
N
1
Figure 1.2: A generic ATM switch
Figure 1.2 shows the structure of a generic ATM switch which comprises the following:
The Control Processor
Being the `brain' of the switch, it controls some of the actions of the other entities in the switch. When a request for connection set{ up arrives at a switch, it is the Control Processor which determines whether the connection should be accepted or not. If the request is granted, the processor may reserve resources for it within the switch and create an entry in a routing table for the connection (for example, see 15]). This entry contains information on the output port that cells should be sent to as well as elds specifying the priority or quality of service to be given to the cell (and all other cells of the same connection).Input and Output controllers
(IC/OC) They process cells on their entry to and exit from the switch respectively. The input processors may add information from the routing table to the head of each cell as it passes through. This additional information is removed by the output controllers.The Switching Fabric
It transfers a cell from an input link to an output link. and may be assisted in its routing and buering decisions by the information added to the cell header. Typically, in one time slot (the transmission time of a cell on an input/output line), the switching fabric is capable of transferring one cell from each input line to the outputs, if a path is available for it.1.3.2 The packet switching problem | Contention
Since ATM is not circuit switched, the switch does not have knowledge of when a cell of a particular VP/VC may arrive and demand a path to the appropriate output port. So, it may very well happen, that in a given cell slot, there are simultaneous arrivals on multiple input ports of cells destined to the same output port. In this case, demonstrated in Figure 1.3, since the output port itself can transmit only one of the cells in one time slot, the remaining cells have to be buered. This phenomenon is termed as contention and is present in the design of all packet switches.
Buering of cells within a switch aects performance of cells negatively in the following way | it adds to the delay of the cell, and when there is not enough buering available, there must be a contention resolution mechanism which may drop cells (which get re-transmitted later). This increases thecell loss ratio and decreases
Switch Fabric
Output Port ATM Cell
ATM Cell
VP A
VP B VPI B
VPI A
Figure 1.3: Contention for an output port in an ATM switch
the throughputof the switch. As long as these quantities remain within the promised service guarantees, things are ne. However, as we shall see in the following sections, without careful switch design and trac control, they can easily exceed their limits. It therefore behooves us to look more deeply into both issues.
Newman, in his excellent survey on switches 49], tells us that the delay, loss, and throughput of cells, is directly aected by the following issues in switch design:
The design of the switching fabric
The location of the buers within the switch
The contention resolution mechanism
For an in{depth understanding of how each of the above features aects user perfor-mance, a detailed analysis of the switch needs to be done and may be found in books like 50]. In this chapter, we limit ourselves to taking a broader view of the topic and categorize ATM switches into dierent types based on the choices made for the rst two criteria. The third is not important to our work and will not be discussed.
1.3.3 Comparison of design choices in ATM switches
The switching fabric
The switching fabric's structure is the most signi cant component of an ATM switch's hardware design. It aects the cost, performance, capacity, growth capability, and
complexity of the switch design. Depending on whether the switching fabric is shared by all cells or not, ATM switching fabrics can be categorised into two types:
Time Division
Space Division
In
Time Division
switching fabrics, all cells ow across a single communication path that is shared by all input and output ports. Figure 1.4 shows a switch where the shared medium is a bus, but as will be seen in the next chapter, it may as well be a shared memory. Access to the bandwidth of the shared medium by the switch ports may be determined dynamically. The throughput of this shared path de nes theN
1
2
N 1
2
Figure 1.4: A bus switch
capacity of the entire switch fabric and thus xes an upper limit on the capacity of the switch itself, beyond which it cannot grow. This will be more clear after reading Section 2.1.2, which gives an example. But for small switches, with a capacity of upto a few Gbps, time division is a exible technique. Some of the switches that use this architecture are the French CNET, Alcatel, Hitachi, and Toshiba switches.
The larger switches, which, theoretically atleast, have no limit on the number of ports that the switching fabric can serve, are the
Space Division
switches. Here, multiple paths are provided between input and output ports, as opposed to a single shared path in Time Division switches. The switching fabric can, in one time slot, transfer one cellalong each path. So, the throughput of the switch is the product of thecapacity of a single path times the average number of paths that operate concurrently. As the switching fabric throughput increases, more cells can be transferred by it in a single time slot and this moves the location of the contention from the input ports to the output ports. More will be said on this in the next sub{section.
The design of the switching fabric for Space Division switches is much more com-plex of that of Time Division switches, which is justi ed by the higher throughput that they oer. There are many more designs for these switches than we are able to describe here, and the interested reader is referred to papers by Newman 49]and To-bagi 66]. Some examples are the Crossbar, Banyan, Delta, and the Batcher-Banyan switches.
Location of Buers in ATM Switches
Buers are needed within ATM switches wherever there is contention between cells. Switches are classi ed based on whether there are buers within the switching fabric or not, as Internally buered and Externally buered. Internally buered switches have buers within the switching fabric, which makes its design and switch trac control quite complex. Externally buered switches have cell queues at either the input or output ports of the switch, outside the switching fabric.
With internal buers, the switching fabric tries to resolve some of the cell con-tention itself. With external buers, the fabric has no part in solving this problem, and puts full responsibility on the I/O ports. Besides making fabric design easier, ex-ternal buering puts the queues closer to the ports that they serve. Each switch port then can more easily monitor its cell queues. First, the ports can monitor the load (via queue size) and perform congestion control (via feedback mechanisms, seen in the next section). Secondly, the trac in each queue may be categorized into dierent classes of service. The Input/Output port controllers can then implement dynamic (link and buer) scheduling policies to support the delay and loss requirements of the dierent trac classes. A very large amount of literature 31, 1, 46, 56, 6]is devoted to the solution of this problem.
Amongst the class of externally buered switches, it is found that there is a great dierence in performance and complexity of switch design depending on whether the buers are placed at the Input ports or at the Output ports.
Ideally, in an
Output buered switch
(see Figure 2.1 as an example),the output port must be able to accept a cell from each input port, in every cell slot. This meansthat the switching fabric must be capable of transferring upto N cells per slot (for a switch withN input and output ports) towards the same output port, and that there should be sucient buering capacity at each output port to buer the excess cells. As the size of the system (N) grows, the constraints on the speed/size of the switching fabric and the number of output buers at the output port increases. There is always the possibility of running out of buering space and having cell loss. To prevent this from happening (or control it), the switch designer must either dimension the switch generously or impose adequate controls within the switch. Some of these controls are explained in Section 1.4 and one of them, buer management, is studied in detail in this thesis.
N Fabric
Switching
N 2
1 1
2
Figure 1.5: An input queued ATM switch
Having the buers between the input ports and the switching fabric eliminates the need for switching fabrics and buers operating at some multiple of the port speed.
Input buered switches
(Figure 1.5) are therefore simpler to implement. However, they suer from the well known problem of Head-of-the-line blocking and oer a maximum cell throughput of 58% 24]. For high-speed switches, with expectations of high throughput, this is a serious limitation.1.4 Trac controls in ATM networks
We nally come to the topic that has been hinted at all throughout the introduction. Trac Controls (or Congestion Controls) 53, 25, 58]are measures introduced by switch vendors and network operators for the following two purposes:
to maximize network utilization and thus revenues, and,
To give users their promised QoS.
While the rst is more important to the network operators, the second is crucial to the users. The two, unfortunately, are conicting aims, as the QoS may be excellent at low network utilizations, but can only degrade as the utilization increases. It is the duty of trac controls to balance the two. Each control is eitherpreventiveorreactive, works on a shortor long time scale, and inuences a particular performance measure. In order to successfully run a network, no one control can be eective by itself. We need to implement some form of all the controls which must interact properly (for example see 23],) and together control all aspects of network performance.
In this section, we comment on some commonly used controls.
Resource reservation
With this control, link and buer resources within switches across the network are reserved for the cells of a particular connection, which gives them priority over cells of other connections as far as access to the reserved resources is concerned. Unless the user desires to get a circuit switching like service (with strict resource reservation), a suitable percentage of the maximum amount of resources that may be needed are reserved. The `suitable percent-age' is calculated as a function (complicated) of the trac load, desired QoS, available resources, and their cost. Very often, trade os of the sort of, `10 cell buers gives a cell loss probability of 10;4, but 20 cell buers does only 15%better loss but costs twice as much', may have to be done. For example, see 18]. Resource reservation is inherently a preventive control and is done at the time of VP or VC set-up. It may be done on a much faster time scale, as in the Fast reservation protocol 67]. It is initiated by a user or network management center, which interacts with the control processor of the switches in the network. This in turn communicates with the I/O controllers, and at times, the switching fabric, to inform them of reservations and priorities of cells.
Trac policing/shaping
Since call set{up and resource reservation is based upon the trac of the user, it becomes important to know the characteristics of user trac. In the previous section, we saw that ATM networks allow users to declare their trac parameters in statistical terms. For example, a connection may be set up as, `Not more than 10 cells in 20 cell slots'. Trac policers and shapers have the unpleasant function of ensuring that the cells of a connection comply with the declared trac parameters. This task is made all the more dicult by the fact that the network itself may distort the trac characteristics as the cells are transferred across the network. These controls are then supposed topreventone connection from consuming more network resources than are meant for it, thus depriving other connections of theirs.
While policers maydropcells that arrive faster than the declared arrival rate 3], shapers will merely delay them in buers and then emit them at the negotiated rate. Policers are typically set up at access points to a network/switch" a shaper may lie anywhere in the switch or network.
Buer and link management
A buer manager has two duties. The rst is to determine whether a cell is to be admitted into the buer or not. The second arises in the case that two or more cells contend for the same buer slot. The buer manager has to determine to which cell that slot must be assigned. Both choices may depend upon the current status of the buer, the priority of the cells, and the reservations made within the buer. Though it directly aects cell loss, buer management inuences the cell delay and throughput too. Link managers determine the order in which several cells from a buer are served. This in turn is inuenced by any particular scheduling strategy (time division, round robin, etc.) that the link may be following, or more dynamically by the priority, or performance of the cells of that connection. The eect of the link manager is seen directly on the cell delay and indirectly on the loss probability and throughput.Both link and buer managers (as well as trac policers and shapers) can be either preventive or reactive controls, depending on how they function. Since they act on cells, on a time scale of once in 2:7-secs for 155 Mbps link, they are short term controls. For that reason, they need to be simple and ecient.
1.5 Layout of the thesis
With the introduction, we bring out the importance of proper switch design and its inuence on the cell delay, loss, and throughput. That appropriate trac controls are needed to guarantee performance is also obvious. The aim of this thesis is to study congestion in a particular type of output buered, time division switch, the Shared Buer switch(SBS), and demonstrate the eect of a speci c trac control, thebuer management policy, on the cell loss probability.
In Chapter 2, SBSs and the causes of congestion in them are described in detail. A survey of all available literature, shows us that buer management has been proposed as the main tool of trac control. But we nd that very little work has been done on the optimality of buer management policies.
Details of the architecture of a 2 2 SBS along with some assumptions are pre-sented in Chapter 3, which enables us to make astochastic model for it. Preliminary observations are made on both the stochastic process and its properties when the ar-rival process to the switch is independent, and identically distributed, (iid) Bernoulli. It is observed that the sample paths of the contents of the buer, under all work con-serving policies with Pushout, can be described in terms of a 2 2 SBS with in nite buer size.
Chapter 4 deals with the important topic ofTaboo probabilities,upon which all our work depends. A method to numerically evaluate the Taboo probabilities of interest is also presented.
In Chapter 5, we make the connection between cell losses in a 2 2 SBS and the Taboo probabilities of the previous chapter. The optimal buer management policy which minimizes the cell loss is then found to be a function of the Taboo probabilities and turns out to be a threshold policy. This is found to be the case both when the arrivals are iid Bernoulli processes, as well as when they are correlated Discrete-Batch Markovian Arrival Processes (D{BMAP).
In the same chapter, we also describe a dynamic policy that operates without any knowledge of the parameters of the arrival processes. A proof that it converges towards the optimal threshold policy is provided.
The complexity of the analysis makes it dicult to extend it to the generalN N case. In Chapter 6, we shed insight on this problem and study the performance of several Pushout policies with static thresholds and one with dynamically determined
thresholds, via simulations.
Finally, conclusions are drawn and directions for future research suggested in Chapter 7.2
2In Asterix-speak 22], the problem has this much more interesting description. The heroine,
the slim SharedBu erix, is in dire trouble due to the trouble caused by the mischevious Unbal-ancedArrivalix. The nobleOptimalPolicix arrives to her rescue, and defeats both the henchmen of UnbalancedArrivalix, viz. the cross-eyed Iid-Bernoullixand the evilD{BMapix, in static as well as dynamic ghts. However, our hero is unable to save the rest of her enormous family, theN N-ix,
who are later found and patched-up by the helpful ApproximatePolicix. Watching all these events with interest are the mysteriousTabooProbabilitix.
Chapter 2
Buer Management Policies in
Shared Buer Switches
In this chapter we present one kind of output buered, time division ATM switch, the SBS, and compare it with output queueing. At light and symmetrically distributed loads, (unrestricted) buer sharing is found to be superior to output queueing 24]. However, with heavy or unbalanced loads, this same sharing of buers degrades the performance of the switch. The many advantages of SBS compel us to try to work around the problem, via buer management policies. The dierent kinds of policies that have been proposed in literature are classi ed and a brief review of the work is made in Section 2.3. It is found that most of the work is of the `queueing theory' type and determines the steady state occupancy of the buer. Little work has been done on the optimality of buer management policies for ATM switches. This then becomes the focus of the remaining chapters. We start this one with a description of SBS.
2.1 Shared buer switches
2.1.1 Output queueing vs. Shared buering
Figure 2.1 shows an output queued switch, in which the switching fabric, for simplicity, is a bus, and the buers are placed at the output links. It is possible to have one cell arrival at an input port in a time slot, which is the transmission time of a cell on an input/output link. It is assumed that all links have the same speed. The speed of the
N 1
2
N
1
2
Figure 2.1: An output queued Switch
bus is N times the speed of an input link, so it can transfer one cell from each input port to its destination output port in one cell slot. This makes it unnecessary to have buers at the input ports. But buers are necessary at the output ports, because more than one input port can have cell arrivals that are destined towards the same output port" since an output port can transmit only one cell in each slot, the others must be buered. The output port itself transmits a cell in every time slot that it nds a cell in its queue. If the queue gets full, then all other arriving cells in that time slot have to be dropped.
Whatever the size of the buer at each output port, it is possible for it to get full and then lose all the remaining cells that arrive. Karol and Hluchyj 24]studied this phenomenon and demonstrated that getting the output ports to share their buers improved the performance of the switch. With shared buers, each port could now access more buer space than it would get in an output queued switch with the same number of buers and this reduced the cell loss probability. Alternatively,the number of buers required to achieve a certain cell loss probability was smaller when the ports shared the output buers, than when each port had its own buers.
Therefore, the advantages of having shared memory switches can be summed up as:
Each output port has access to a larger buer space, thus reducing the cell loss.
The amount of buering required to support a given cell loss probability is
smaller than that in output queueing.
Of course, this sharing of buers causes problems too, but before we get to that, in the next section, we rst look at how exactly a SBS shares its buers amongst the output ports.
2.1.2 Architecture of a SBS
A SBS is shown in Figure 2.2. The bus of Figure 2.1 is replaced by the write port of
Shared Buffer
1
N
1
N
Output Ports Input Ports
Queue Manager
Write Control Read Control
Destination Information
Output Control
Mux MuxD
Read Port Write Port
Memory chip
Figure 2.2: A shared buer switch
the buer/memory chip. The cells coming in on all input ports are written into the common, shared memory by this write port. They are read out to the appropriate output port by its read port. The ports are assumed to serve each I/O line in a time division fashion. If the two operations (writing in and reading out) are performed by two distinct ports operating in parallel, each should be capable of performing N memory accesses in one time slot. This is a dual port memory chip. On the other hand, both operations could be performed by the same port, as in asingle portchip. In this case, the single port needs to be able to perform 2N accesses (N writes and N reads) in a single time slot. Assuming a link rate of 155 Mbps, there is one cell arrival per 2.74 sec at an input port. With a memory access time of 10 ns per byte
(a realistic number obtained from data sheets of a Cypress semiconductor 32K 8 Static R/W RAM), the number of I/O ports (N) is limited to 2:74;sec
530ns
5 for a
dual-ported memory. This calculation highlights the stringent requirements made on the shared memory in SBS (and other ouput buered switches). To alleviate this problem, SBS can also be implemented with multiple memory chips in parallel, which act like a global shared memory 44, 72]. However, to keep things simple, we study only the case with a single memory chip.
Now we get into the details of how the writes into the buer and reads out of it are performed. One implementation of a SBS based on 39, 45]is shown in Figure 2.3. For other implementations, 35, 42, 51, 62, 19, 59]may be consulted. The shared
TC A1 C1 B1 A2 B2
A3
ATM Cells in shared buffer
Next address linked lists
Mux D
A
C B
HA HB
TB
TA HC
Figure 2.3: Memory management in a shared buer switch
memory is composed of two parts, the buer where ATM cells are stored and an
Empty Address register(not depicted) which contains the addresses of all unoccupied slots in the buer. As shown in the gure, cells are inserted in random order into the buer. But, with each cell, there is storage allocated for a pointer to the next cell of the same destination port. The output port itself has a pointer to the rst cell (Head) in its queue (denoted by HA, HB and HC in the gure). The address of the last cell in each queue (Tail) is also pointed to special pointers (TA, TB, and TC). Thus, individual queues are maintained for each output port within the shared memory.
In order to write in a newly arrived cell into the buer, the write controller rst
obtains the address of an empty spot in the buer from the Empty Address register and then starts writing the cell into it. After this is done, the appropriate linked list (of the port that the cell is destined to) is updated. The address that has just been used up is removed from the Empty Address register.
To read out a cell, the read port must access the cell pointed to by the Head pointer of the output port that it is serving. Upon nishing this, again the linked list is updated and the address of the location just served is inserted into the Empty Address Register.
Thus implementing this shared output memory architecture incurs overhead in space as well as time. Additional space (memory) is required for storing the addresses for the linked list and the Empty Address register. In time, the overhead takes the form of the operations required to maintain the linked list.
2.1.3 Congestion in a SBS
The same feature of SBS that makes it superior to output queueing can be a disad-vantage in the following respect:
Each output port has access to the entire buer space.
So when many input ports have arrivals towards the same output port, the queue for that output port starts building up, and can very well occupy the entire buer. This output port is known as ahot spot. Now when there are new arrivals in the next time slot, some of them may not nd space in the buer and are dropped as a result. If these cells are also destined towards the \hot spot" output port, things are ne. That output port is already overloaded and not in a position to serve any new cells. However, if the cells that get dropped are destined to the non-hot spot ports, then, these output ports see a reduction in the arrival rate towards them and may starve
as a result. This happens even though the arrival rate to these ports is not excessive. In short, other ports can get punished for the overloading of one port, when all the buers are shared completely. To avoid such unfairness, some kind of control on the queue length of any one output port has to be imposed. These controls are known as
buer management policies.
2.2 Classi cation of buer management policies
Buer policies control the access of cells to the shared buer. Since the problem we try to solve is the prevention of unfair sharing of the buer space amongst output ports, our buer policies dierentiate between cells only on the basis of their destination ports in the switch. They do not look at the Cell Loss Priority (CLP) bit or the VPI/VCI of the cell, as other buer policies in 9, 37]have done. The destination output port of the cell may be hereafter referred to as the class or type of the cell. Again, since the congestion we address is aected only by the total number of cells of a particular class in the buer at a give time, and not by any other criterion, our buer policies do not dierentiate between cells of the same class.It is also worthwhile to distinguish between the buer manager and the buer policy. The manager is the physical entity within the switch (a part of the Control Processor) that admits or rejects cells. The buer policy is what guides the decisions of the manager. However, in our write{up, we may use both terms synonymously.
While there are several ways to classify the buer policies proposed in literature, (such as stationary and non{stationary, or Markovian and non{Markovian), we focus on only two criteria which are relevant to our work. These are:
The actions that the policy allows | Pushout or non{Pushout
The time-varying nature of the policy | static or dynamic
2.2.1 Pushout/Non-Pushout policies
A large class of buer policies makes decisions at every cell arrival instant. If there is space in the buer, these policies either admit the cell into the buer or drop it, usually based on some function of the queue lengths of output ports. In case the buer is full, the only allowed action is to drop the cell. The allowable action set for this class of policies is then faccept (admit)cells,reject(drop) cellsg.
The other class of policies admits all cells while there is space in the buer, and takes other decisions only when the buer is full. At this time, one cell must be dropped, but the buer manager is allowed an extra action in its set of allowable actions, and that is to push out cells. When a cell arrives to a full buer, the buer manager may drop (push out) a previously accepted cell from the queue of some
output port, and put in the newly arrived cell in its place. To do this in the imple-mentation of the memory management discussed in the previous section, the queue manager rst needs to identify the class (output port) from which to push out a cell. Going to the penultimate cell in that queue (we assume that the cell at the tail of the queue will be dropped), the pointer to the last cell is removed. Then treating the memory location of that cell as an empty one, the normal cell writing in process for the newly arrived cell starts. Since the policy does not distinguish between cells of the same output port, the pushed out cellmust be of a dierent output port than the newly arrived one. Otherwise, the newly arrived cell is dropped. This class of policies is known as Pushout policies. For obvious reasons, the other class is known as non-Pushout policies.
While it certainly is possible to have a buer that both drops cells when the buer is not full and implements Pushout, it is hard to think of a good reason to justify it. We shall therefore not consider these policies.
A comparison
Pushout policies are reactive in nature and delay the dropping of cells till it is ab-solutely necessary. They are therefore also work-conserving, in the sense that the resource (buer space) is never kept idle while there is a demand (cell arrival) for it. They also have the advantage of having a simple action set while the buer is not full | that is of accepting all cells. However, additional circuitry is required to implement the Pushout mechanism.
Research on classical work{conserving systems in 34, 60, 30]tells us that in such systems, even though the performance of individual classes varies with the priority policy implemented, the response of the system as a whole is a constant. This is the well known, Work is conserved, principle. The shared buer system under Pushout policies that we consider in this thesis is fundamentally dierent from the classical work{conserving systems, and we (will) see that even the performance of the entire system depends upon the particular policy implemented.
Non-Pushout policies, on the other hand, are preventive in nature, and may drop cells even when there is space in the buer in order to avoid congestion in the future. For that reason, they may be non{work{conserving. (Look ahead into Section 2.3.1 for a policy that is non{Pushout but work{conserving.) The bene t of having such ineciency in the system is the avoidance of implementation of the Pushout
nism. However, the queue manager does have to consult a buer policy at each and every cell arrival time, something the Pushout policies avoid. These policies should be designed carefully so that too many cells are not dropped unnecessarily.
2.2.2 Static vs. Dynamic policies
In this section, we present de nitions for static and dynamic policies. Unfortunately, these terms have been used with dierent meanings in dierent areas of research. To people in \control of queues", (for example, see 70]), a static policy implies one which does not take into account any state information. For example, if Port 1 trac is always given push-out priority over port 2 trac in a 2 2 SBS, the policy is static. However, if the policy says, \Push out the trac of the port with the larger queue", then the policy is called dynamic, since it gives dierent classes priority according to the state of the buer. Since the policies we consider in this thesis almost always consider the state of the buer, this classi cation becomes redundant.
All the policies we study work with a set of parameters. If this set of parameters stays the same over all time, we term the policy static. On the other hand, if these parameters change with time, the policies are called dynamic. For example, a policy which says that, \Give class 1 Pushout priority over class 2 if length of class 2 queue is greater than C", is static if the parameter C does not change with time and is dynamic otherwise.
A comparison
As we shall see in the next section, static policies usually perform well when the set of parameters they use are engineered in accordance with the system parameters like the buer size, arrival rates, and distribution of trac amongst output ports. As the system parameters change, so does the static policy that gives the best performance in terms of throughput, probability of blocking, delay, etc. Since it is unrealistic to expect that trac patterns will remain the same over all time in a network, a static buer policy will perform well only some of the time.
In this respect, dynamic policies have an advantage over static policies. They monitor the network for changing trac patterns and adapt their set of parameters to reect this change. For our buer managementproblem, the information monitored is likely to be the state of the buer (size of queue lengths) or the number of cells lost
per class, over some amount of time. Dynamic policies dier in thetypeof information gathered, the amount of information, or the length of time it is gathered over which determinehowwelland howfastthey react to changes. The main issues with dynamic policies are showing that they converge and calculating theirrate of convergence. As with any \enhancement", there is the added cost of gathering, storing and processing the feedback information.
2.3 Queueing literature on SBS
The papers on analysis of SBS are mainly of two types. The rst type does a queueing analysis of the system and presents us with the steady state performance measures of interest, like the occupancy of the buer, the average delay of the cells, the prob-ability of cell loss, the throughput, and utilization, of the system. The other type, with similar analysis or simulations, compares the performance of the system under
dierent buer management policies. Our interest lies mainly in the second topic, so our survey focuses more on the policies studied and comparisons made than on the style of the analysis.
Though our work is on ATM switches which have discrete time models, we rst look at one paper by Kamoun and Kleinrock 32], which has a continuous time model, because it studies interesting buer management policies which have been applied to ATM systems. After that paper, we comment on several others that have done analysis for ATM switches and then survey all the work that has been done on the optimality of buer policies.
2.3.1 Continuous time models
Kamoun and Kleinrock 32] were amongst the rst (also see 29, 41]) to study the performance of SBS under static, non-Pushout, buer management policies. They do so for a N N system with Poisson arrivals and exponentially distributed service times, under ve dierent policies. A queueing analysis of shared buer switches is dicult, because for any policy other than Complete Partitioning, the queue lengths at the dierent ports are correlated in a way dictated by the buer management policy used. However, the authors nd the key to the analysis in the observation that the steady state probability distribution function of the queue length at each output
port has the well known product{form solution for networks of queues 34]. This is found for all ve policies which are then compared on the basis of the throughput, delay, utilization and blocking provided.
Two of the policies represent two extremes in buer policies and are ones we already know about:
Complete Sharing (CS), and,
Complete Partitioning (CP)
CS admits all cells into the buer while there is space in it and drops cells that arrive when the buer is full. (Note that this is a work{conserving, non{Pushout policy). In CP, the buer is partitioned intoN disjoint parts, each \belonging" to a particular output port. A cell is admitted into the buer only if the partition of the port it is destined to has space in it. This scheme is then the same as output queueing!
The other three policies, are based on limiting the queue lengths of the output ports and lie somewhere in between CS and CP. These are:
Sharing with Maximum Queue Length (SMXQ). Limits the maximum queue
length of each output port.
Sharing with Minimum Allocation (SMA). Reserves a few buers for each
out-put port.
Sharing with Maximum Queue Length and Minimum Allocation (SMQMA).
Does both reservation of buers for each output port as well as limiting the queue length of a port.
When the schemes are compared on the basis of the cell loss/blocking probability that they give, Kamoun and Kleinrock nd that in symmetrically loaded systems, CS does best at light loads while CP performs well at heavy loads. In the area in between, the dierent queue limiting policies do better. When the system is loaded asymmetrically, the queue limiting schemes do better than CS and CP. This is as expected, since the queue of a single overloaded port is not allowed to monopolize the entire buer. Yet, some degree of buer sharing remains. It is in this respect that the three queue limiting schemes dier and give dierent results. SMXQ provides fairness, but does not gurantee a full utilization of the servers under heavy loads. This de ciency is not there in SMA, but it has some unfairness. SMQMA combines
the good features of both SMXQ and SMA, but has many parameters that have to be chosen carefully. The best policy to use then depends upon the system parameters and loading.
Similar analysis and simulations are done in 24, 20]to compare CP and CS, with the same conclusions.
2.3.2 Discrete time models
With discrete timemodels, we no longer have the elegant product form solutions found by Kamoun and Kleinrock. The analysis is complicated by the fact that besides the correlations in the queue lengths, there is now correlation in the arrival streams too. In continuous time, with Poisson arrivals, it can be assumed that each output port has a Poisson arrival process that is independent of the arrival processes at the other output ports. With discrete time models, for an N N system, there can be at most N cell arrivals in a time slot for all output ports, and the number of arrivals to each output port are thus correlated! To be relevant to ATM systems, the work must have arrival processes that are bursty, like the Interrupted Bernoulli Process (IBP), or correlated like the Markov Modulated Poisson Process (MMBP). The distribution of the trac cannot be uniform (which is easy to analyze), but must represent hot spot like situations. To model the system accurately, it is necessary to keep track of the number in each output port's queue. If the arrival process has phases, (as in IBPs and MMBPs), this too must be stored. The size of the state space then grows exponentially with N, the size of the buer and the complexity of the arrival process. Most of the papers then present approximation techniques for the steady state performance measures of interest. They dier in the arrival processes to the switch (iid Bernoulli or bursty like the IBP), the distribution of the trac amongst the output ports (uniform or hot-spot like non-uniform situations), the buer sharing policy implemented (CP, CS, SMA, etc.), and the nature of the approximation made. The paper with the analysis most relevant to single stage shared buer ATM switches was found to be by Hong et al. 26, 27]. To reduce the size of the state space and to make the problem analytically tractable, the shared buer is decomposed into individual queues which are then analyzed in isolation. At any given time, the authors examine the contents of one single port's queue and consider another queue composed of all the queues of the other ports. The distribution of the cells
amongst the dierent ports is approximated. Since the arrivals at the input ports are IBP, the eective arrival process to an output port is a complex superposition of the inputs. Another approximation is developed for this. Iterative approximations for the probability distribution of the number in each queue are performed numerically, till they converge. The only drawback is that the analysis has been done for CS, and no other policy.
Some early work on approximation techniques for SBS was done by Petit et al. 52] with Bernoulli arrivals and CS. This analysis is based on that of a single Geo/D/1 queue with in nite capacity. Convolution methods and simulations are used to obtain the size of the shared buer required to support a given CLP. A similar problem with dierent system parameters is approached in 74, 47].
Leon-Garcia and Widjaja 43]study the sharing of buers in the Starburst switch via simulations and conclude that some policy combining CP and CS might give the optimal throughput. Chen et al. 10]give us an approximate analysis of an output queued ATM switch with non-uniformly distributed and bursty trac. This leads them to study the SMA 10]and SMQMA 11]policies, which they nd gives good performance to both the overloaded and non-overloaded ports in hot-spot situations. Collier and Kim 16]provide an approximation of the steady state parameters in a
multistage ATM switch with shared buers and dierent buer sharing strategies like CP, CS, SMA, SMQX, Partial Sharing, and their combinations. They decompose the complex shared buer into equivalent dedicated buers for each output port through iterative approximations. They do this for bursty arrivals with non-uniform routing amongst the output ports. More analysis on the shared buer elements in multistage switches has been done in 57, 48, 68, 69]. This analysis would be more useful had it not been for the backpressure mechanism that makes the output ports non-work-conserving and dierent from the single stage SBS.
Tipper and Sundareshan 65]concentrate on nding partitioning parameters for the CP policy (with Poisson arrivals and exponential departures) as the input process to the system varies. This, then, is a dynamic policy. They estimate the trac arrival rates and determine when to update the current buer allocation. A similar problem is tackled in 64].
More recent work on dynamic policies for shared buer switches has been done by Choudhury and Hahne 12]. They implement a threshold (SMXQ) scheme where the threshold changes with time and is proportional to the unused buer space in the
buer. Via simulations they verify that this scheme gives them better cell loss than with a static threshold.
In conclusion, we found most papers to present approximation techniques on the steady state probability distribution function of the number of cells in the system un-der some particular buer management policy. Many papers studied shared buering in multistageswitches and therefore made additional assumptions rendering the model dierent from the one we study. However, a good analysis is found in 26].
2.4 Literature on optimality of buer policies.
Now we come to the papers of our particular interest, on the topic of optimality of buer management policies. The performance criterion with respect to which these policies are optimal is the cell loss/blocking probability, or the throughput of the switch as a whole.We have seen only four papers to date on this topic. Three of them study the problem for Poisson arrivals and exponentially distributed service times. Only one deals with the discrete time case which is applicable to ATM systems. However, all the papers indicate that threshold based policies are optimal.
2.4.1 Continuous time models
Foschini and Gopinath 21]were the rst to study the question of optimality in buer management policies, amongst the class of non-Pushout policies. Like the Kamoun and Kleinrock approach, they use the fact that the probability distribution of the buer occupancy has a product form solution and determine that for the 2{server and 3{server cases, the optimal policy consists of limiting the waiting requests of each type and also reserving a part of the memory for it. For the 2{server case, depending on the parameters, the policy turns out to be one of the ve policies, (CP, CS, SMA, SMXQ, and SMXQMA), that Kamoun and Kleinrock study. For the general case, they conclude that the optimal policy has a simple structure, where \simple" can be roughly explained as, \Any linear combination of the queue lengths of output ports is bounded".
The next paper is by Thareja and Agarwala 63], who expand the class of policies considered to include Pushout polices (which they themselves callDelayed Resolution
policies). Since they con ne their results to numerical ones obtained with the policy iteration techniquesof Markov decision processes, their work does not really constitute a proof of optimality. However, with all the problems they solve, they demonstrate the important fact that the optimal policy is of Pushout with threshold type. This means that at the time of cell Pushout, the class that loses a cell is the one whose queue length exceeds a certain threshold.
A very elegant proof of the optimality of this policy is provided by Cidon et al. 14] by using the theory of dynamic programming. They solve the problem for the 2{server case and give a heuristic algorithm to determine the value of the threshold. On com-paring their policy with the optimal non-Pushout policy determined by Foschini and Gopinath, they nd that there is very little dierence in the overall loss probability that is obtained with both policies. Therefore, with this criterion, the extra cost of implementing Pushout does not seem to be justi ed. However, when they look at the cell loss of the individual output ports, they nd that the optimal Pushout policy eectively isolates the performance (cell loss) of a port from the uctuations in the loading of the other port, while the optimal non-Pushout policy does not.
When the size of the system is increased beyond 2 I/O ports, Cidon et al. can provide a solution only when the system is symmetrically loaded. For this case, they show that the optimal policy is the one which always pushes out cells from the largest queue.
2.4.2 Discrete time models
Only one paper has addressed the issue of optimality when the system is discrete time. Wei et al. 71]analyze an N N switch with iid Bernoulli arrivals. Using Linear Programming, they obtain numerical solutions for a 2 2 switch. They nd the optimal policy to be the Drop on Demand, which is the same as the \push out from largest queue" discussed in the previous paragraph. However, their work does not constitute a proof of optimality.
