A First Course in Digital Design Using VHDL and Programmable Logic
Shawki Areibi
Abstract—Present industry practice has created a high
de-mand for systems designers with knowledge and experience in using programmable logic in the form of CPLDs and FP-GAs in addition to hardware description languages. Many universities offer this type of training in advanced digital en-gineering courses. This paper describes our experience in integrating VHDL and programmable logic devices based on Xilinx Foundation tools and Altera into a first course in logic design. In the main, student reaction to the course was pos-itive. The course seems to have the right blend of being cur-rent (using VHDL and FPGAs) and being hands-on (using bread-boarding). We conclude by stating that in our experi-ence, modeling using VHDL and mapping designs to FPGAs can be effectively integrated into a first course in logic design.
Index Terms— Engineering Course, Digital Design, VLSI
Design, FPGA, VHDL.
Introduction
Digital hardware plays a prominent role in many electrical and computer engineering products today [1]. This is princi-pally due to the rapid increase in transistor densities and speed of integrated circuits and steep decline in their cost caused by the advance in micro-electronic implementation technologies. This trend is likely to continue in the foreseeable future.
The last decade has proved to be one of remarkable tech-nological advances. The “computer revolution” has affected every aspect of society and many problems viewed as being intractable can now be solved. Unfortunetly, even with this advance in computer architecture the approach to teaching the fundamentals of digital logic remain almost the same as that which was used in the 70’s and 80’s. While this works fine in principle, it ignores the fact that the subject is no longer practiced as a stand-alone art. Modern digital design [2] re-lies on engineering groups made up of individuals that have an understanding of all aspects of the problem, from the top to the bottom in the hierarchical chain, with expertise in one or two areas. Present industry practice has created a high de-mand for systems designers with knowledge and experience in using programmable logic in the form of CPLDs and FP-GAs in addition to hardware description languages. Many universities offer this type of training in advanced digital en-gineering courses. This paper describes our experience in in-tegrating VHDL and programmable logic devices based on
S. Areibi is with the School of Engineerin, University of Guelph, Guelph, Ontario, Canada. E-mail:[email protected].
This work has been partially supported by a Natural Sciences and Engineer-ing Research Council of Canada (NSERC) operatEngineer-ing grant (OGP 43417).
Xilinx Foundation tools and/or Altera into a first course in logic design. The paper is organized as follows: Section de-scribes the main features of the Digital Design course and in-troduces texts and tools we considered for our course. Sec-tion describes the laboratory component used and the project assigned to the students. Section describes our experience running the course for the first time and finally Section con-tains concluding remarks.
Digital Design
ENG241 is a course in Digital Logic offered annually1in the School of Engineering at the University of Guelph. The course extends over twelve weeks with three hours of lectures per week and eleven two hour laboratory sessions. Course prerequisites include CIS 1650 Introduction to Programming and CIS 1900 Discrete Structures. Topics include combina-tional circuits, sequential circuits, memories, programmable logic devices, data path and algorithmic state machines. This course is an introductory course in digital logic design, which is a basic course in most electrical and computer engineer-ing programs. The main goals of the course are (1) to teach students the fundamental concepts in classical manual tal design and (2) to illustrate clearly the way in which digi-tal circuits are designed today, using CAD tools and mapping the designs to programmable logic devices in the form of FP-GAs and CPLDS. Throughout the course basic concepts are introduced by way of example that involve simple circuit de-sign. The course first introduces digital and computer systems and information representation. The course then introduces the following topics: logic gates, boolean algebra, Karnaugh maps, design hierarchy, combinational circuit analysis and de-sign, sequential circuit concepts and dede-sign, random access memory and programmable logic, algorithmic state machines (ASM) for controlling operations. Introductions to the hard-ware description languages, VHDL and Verilog, are provided with the expectation that at most one of the languages will be covered. The course laboratory was based on 7 experiments some using bread-boarding, others using modeling in VHDL and Schematic Capture.
Suitable Textbooks
There are two main approaches to text book selection for a first course in logic design using VHDL and FPGAs. The first approach is to select two books, one that covers the logic de-sign theory and the other that covers modeling in VHDL. The VHDL primers by Skahill[3] Yalamanchili[4] and Bhasker[5] would be suitable for the two text approach. The second is
½
to select a text that integrates the logic design theory with modeling in VHDL. The texts by Brown[6], Mano[7], and Wakerly[8] take this integrated approach. We chose Mano[7] for our course since it is based on a balanced treatment of logic design, digital system design and computer design ba-sics. It also introduces both Verilog and VHDL. Two CDs for the Xilinx Student Edition 1.5 Foundation Series Software for Microsoft Windows are provided in support of several text ob-jectives. The approach used in the introductions to VHDL and Verilog contrasts with that in the typical programming or de-scription language text. In Mano[7] the introductions empha-size the vital tie of HDL descriptions to hardware, causing the reader to recognize clearly that a language description repre-sents actual hardware with real cost rather than just program code to be stored in memory and executed. Further, the in-troductions are informal, permitting beginning students to be able to read and write in a limited, but powerful, subset of an HDL, while achieving a balance between language study and basic fundamentals appropriate for an introductory course.
Xilinx vs Altera Design Entry Tools
There are many factors that instructors teaching digital de-sign have to consider when choosing between Xilinx Foun-dation tools and Altera MAX+plus II tools. We have learnt that both Xilinx and Altera tools are easy to use in addition to the University Program that both offer. We have also learnt that Altera is best for simplicity and schematic entry whereas Xilinx is best for VHDL entry. After a survey and detailed investigation we have chosen the Xilinx Foundation tools for the following reasons:
¯ A new web-based resource was being developed for
Xil-inx University Program (XUP) participants. This web site in-cludes a collection of listings and links for teaching resources, laboratory experiments, students projects and help resources. To tie everything together, a strong on-line support system, with discussion forums, an email list-server (email reflector) and postings of FAQ’s was being incorporated.
¯ XESS which provides the XS40 and Xtend boards provides
excellent support and help for their products. I think XESS has the best web and support between the vendors of recon-figurable boards. They also maintain a design database where people can place their designs on a public database.
¯ Out of the three books we were considering as text books,
Mano[7] and Wakerly[8] include Xilinx Foundation tools.
¯ Xilinx Foundation Tools provide an FPGA editor to allow
students browse their device. If a student ever ran into some-thing that was hard to explain, he/she could always open up the FPGA editor and see what the synthesis, and HDL code really gave them. In addition, Xilinx Tools have supported timing driven place and route which try to meet the timing.
¯ There is a step by step tutorial on setting the Xilinx Student
Edition Software available at [9] plus FAQs and other infor-mation that may be of interest to many students.
All the above mentioned factors played a big role in using the Xilinx Foundation tools over the Alter Max+plusII tools.
Lab Environment
The Digital Design course “ENG241” and its laboratory teach the students plenty about digital hardware, its specifica-tion, design and implementation. More importantly however, is that it prepares the student for lower level hardware descrip-tion languages (HDL) and their use in digital design. Stu-dents in the laboratory use Xilinx Student Edition 2.1 (see Fig-ure 1), which includes the Xilinx Foundation Express tools,
Fig. 1. Xilinx Foundation Tools Project Manager.
including schematic capture, HDL synthesis, simulator, and FPGA place-and-route development tools. XSE also includes a textbook[10] that introduces digital design concepts through FPGA laboratory exercises. Each chapter begins with a dis-cussion of the logic design principles that will be applied in that chapter. This is followed by an experimental section where you can build and test logic circuits that demonstrate those principles.
Hardware Description Languages
VHDL is an acronym for Very High Speed Integrated Cir-cuit Hardware Description Language. VHDL is used to scribe, model, and synthesis a circuit just as C is used to de-scribe, model and implement a solution to a problem. Like Java, VHDL is “device independent”. That is, we can de-sign a circuit before we know which type of device it will be implemented on. In the 1980’s rapid advances in integrated circuit technology lead to efforts to develop standard design practices for digital circuits. VHDL was developed as a part of that effort. VHDL was originally intended to serve two main purposes. First, it was used as documentation language for describing the structure of complex digital circuits. As an official IEEE standard, VHDL provided a common way of documenting circuits designed by numerous designers. Sec-ond, VHDL provided features for modeling the behavior of a digital circuit, which allowed it use as input to software pro-grams that were then used to simulate the circuit’s operation.
In recent years, in addition to its use for documentation and simulation, VHDL has also become popular for use in design entry in CAD systems. The CAD tools are used to synthe-size the VHDL code into a hardware implementation of the described circuit.
We have prepared a manual that serves as an introductory tutorial in VHDL for second year students taking ELE241 Digital Design and third year students taking Embedded Sys-tems course at the School of Engineering. Initially, the manual contains only the introductory VHDL tutorial. The tutorial is followed by a series of exercises that are to be completed by the students. These exercises are intended to introduce all the concepts required to complete the ENG241 laboratory assign-ments and ENG381 (Embedded Systems) projects. Due to the complexity of the language we introduce only a subset of the language with emphasis on the following:
¯ The typical activity flow in top-down digital system design.
Each level of the design hierarchy corresponds to a level of abstraction and has an associated set of activities and design tools that support the activities at this level.
¯ Hardware description languages such as VHDL are targeted
for use throughout this design hierarchy and provide some de-gree of uniformity across the various levels.
¯ Differences between structural, behavioral and data flow
representations.
¯ VHDL descriptions can be used to support two
complemen-tary processes found in digital system: simulation and synthe-sis.
Teaching Digital Design With FPGAs
The first question that faculty members teaching digital de-sign ask is “Why build an undergraduate digital dede-sign course around FPGA based processors and systems?”. The answer is quite simply because there is such value in the experience of building real hardware. So much of computer architecture is about making tradeoffs such as performance versus area ver-sus cycle time verver-sus power, etc. FPGAs would let the stu-dents write “software-like” hardware descriptions instead of cutting and clipping wires. From the instructor’s viewpoint, FPGAs lower laboratory operating costs since a single chip replaces a cabinet of TTL parts. And the time to clean-up lab-oratory stations between sessions is eliminated because the FPGA can be erased in seconds. A student’s design could even span multiple sessions since the FPGA design can be saved and recalled from disk as often as needed. These fac-tors help to improve the size and challenge of designs that students can work on.
XESS FPGA Boards
The kit depends upon the recent emergence of low-cost FPGA development tools. Our XS40 boards are mounted in-side something called ”Xtend” boards as seen in Figure 2. These give extra capabilities to the XS40 board, including switches, more LEDs, 16 bit D/A and A/D conversion, a PS/2
keyboard connector, more SRAM, and a prototyping area. Note that because we use the Xtend boards, we no longer have direct access to any free I/O pins. The students will be using the various on-board functions of the Xtend board for most/all projects in this class. After a bit-stream has been down-loaded to the XS40 board, the students need some way to test the de-sign. They will be using the switches and LED’s on the Xtend boards to input signals to the FPGA and see the result.
Fig. 2. Xilinx XSTend Board.
XS40 Board/XC4005XL FPGA
The XS40 board (which is seen in Figure 3) is an XESS pro-totyping board, which includes an XC4005XL or XC4010XL FPGA, a 100 MHz programmable oscillator, 32-128 KB of RAM, 8031 MCU, parallel port, VGA port, keyboard/mouse port, as well as full documentation, tools to down-load FPGA designs and memory images to the board, and an excellent support mailing list.
Fig. 3. Xilinx XS40 FPGA Board.
The XC4005XL-PC84C-3 is an FPGA device that has 14x14 array of configurable logic blocks (CLBs) and 61 I/O blocks (IOBs) in sea of programmable interconnect. Every CLB has two 4-input lookup tables (LUTs) and two flip-flops. Each LUT can implement any logic function of 4 inputs, or a 16x1-bit synchronous static RAM, or ROM. Each CLB
also has ”carry logic” to help build fast, compact ripple-carry adders. Each IOB offers input and output buffers and flip-flops. The output buffer can be 3-stated for bidirectional I/O. The programmable interconnect routes CLB/IOB output sig-nals to other CLB/IOB inputs. It also provides wide fanout low-skew clock lines, and horizontal em long lines which can be driven by 3-state buffers at each CLB. The XC400XL is ideal for implementing any digital circuit in general and could also be used to implement processors[11]. Just 8 CLBs can build a 16-bit adder/subtractor (using carry logic) or a logic unit.
Laboratory Components and Project
ENG241 laboratory sessions are an integral part of the course. The objectives of the laboratories are:
¯ to help the student understand and assimilate the lecture
ma-terial.
¯ to give the student practical experience with the process of
design and implementation of digital circuits.
¯ to give hands-on-experience with CAD tools for digital
hardware development.
The logic circuits that the students built in the laboratory (first few) were built using small-scale integration chips (SSI chips) that contain only a few logic gates. We used this ap-proach so that the students get a better appreciation of the advantages of programmable logic when it is presented at a later stage of the course. The laboratory experiments were successful in helping the students to understand and assim-ilate the lecture material. In addition, the students enjoyed both concepts of bread-boarding and mapping their designs to FPGAs which enhanced their learning experience.
The course laboratories are structured as seven assign-ments. They cover the following material: introduction to lab-oratory equipment, introduction to TTL logic, logic probe, de-sign methodology. Introduction to Xilinx Foundation Tools, FPGA programming and the use of the laboratory stations. Design and implementation of combinational circuits. Intro-ducing VHDL as an alternative to schematic capture. Design and implementing of circuits with a mix of combinational and clocked storage components. Design and implementation of arithmetic circuits and finally design and implementation of algorithmic state machines. These laboratories exposed the students to a range of design activities, tool functionalities and implementation technologies. Each laboratory had a set of deliverables. These typically include the circuit schematics, simulation command file, simulation waveform plots, demon-stration of hardware implementation and a brief report.
The following is an outline of the 7 experiments we used while offering the course in the Fall 2000 term.
¯
Lab1:
The purpose of the laboratory was to introduce thestudents to some of the equipment in the digital laboratory that they will be using. They also used the proto-board to implement simple combinational circuit. The laboratory also helps the students to get handy with good practice of testing
and debugging.
¯
Lab2:
The main objectives of the laboratory was to teachthe students the basics of the Xilinx Foundation tools de-sign software:dede-sign entry, simulation and automatic synthe-sis. Part of the laboratory was to enter via schematic capture a boolean function of several variables and verify the design via simulation. Then the students had to implement the design us-ing SSI logic usus-ing the bread-boardus-ing. Finally, the concept of large scale programmable logic device (i.e XC4005) is intro-duced and the means of down-loading a circuit into the device is accomplished. By the end of the laboratory the students realize the difference between bread-boarding and mapping designs to FPGAs.
¯
Lab3:
The main objectives of the laboratory is tointro-duce the concept of design flow of digital circuits and hierar-chical design. Ultimately the students are asked to translate a given statement for designing a router for traveling salespeo-ple into hardware.
¯
Lab4:
By lab4 the students start to use VHDL andun-derstand the advantages of using Hardware Descriptive Lan-guages for design entry. They basically build several complex logic circuits and gain increased familiarity with the Xilinx foundation tools and VHDL language (circuits include a 7-segment display and an adder). The laboratory emphasizes the concept of hierarchical design using VHDL.
¯
Lab5:
The purpose of the laboratory is teach the studentsthe basic operation of sequential logic by building them up from basic gates. They basically build a shift register from flip-flops and learn how to build complex designs via hierar-chy. The also become familiar with state diagrams and basic sequential circuit design.
¯
Lab6:
At this stage the students are quite familiar withthe Xilinx Foundation tools and design entry and mapping to FPGAs. They basically design a data path by implementing an ALU of a simple CPU. We basically emphasize the impor-tance of modular and hierarchical design.
¯
Lab7:
This laboratory basically introduces the basiccon-cepts and steps involved for designing Finite State Machines. The design of a traffic light controller is involved and students use a mixture of schematic capture and VHDL to accomplish their designs.
Optional Project
The project is intended to allow the student to express his/her creativity by applying what they have learned in the Digital Design course to a project of his/her own choosing. The students are given the option to design and implement a 3-week project of their own choosing that uses digital logic in some creative way. They are allowed to use all of the parts available in the laboratory. An important part of the project is the creativity required to think up an interesting project, and then negotiate with a Teaching Assistant and/or instructor as to the final form of the project.
Experience
The goals of this project were to familiarize our students with state-of-the art equipment and modernize the laboratory component of our introductory logic design course by intro-ducing system and component modeling using VHDL and FPGA programmable logic for mapping designs. Of course, the lessons of FPGA implementation will not directly apply to custom silicon implementation. But the method of systemat-ically evaluating design alternatives and tradeoffs is the same regardless of the implementation technology.
Laboratory Experience
We basically decided to use a phased approach. Initially we had some bread-boarding experiments and some modeling experiments in VHDL. All lab experiments involved mapping the designs onto the FPGA modules. After the third laboratory session, it became apparent that the students preferred map-ping their designs onto the XS40 boards over bread-boarding. We also found that even though the tutorials offered by the instructor and those available on the WEB were quite useful, there was quite a bit of confusion with respect to the usage of VHDL. Part of the problem was due to the fact that not enough time was spent on introducing all aspects of the VHDL lan-guage and the other reason was lack of experience of design-ing hardware modules usdesign-ing software!
Student Feedback
One of the biggest challenges in this course is to cover ma-terial and teach students concepts of VHDL in twelve weeks. Students have found that the VHDL document prepared for the course was extremely useful and to the point. Many tuto-rials (especially those links found on XESS company [12]) were extremely useful and helped the students accomplish many of their designs.
Students were consulted on a regular basis (every two weeks) by asking them to fill in some type of evaluation of the course and laboratory. This feedback from the students helped the instructor and teaching assistants to further en-hance the course and overcome the problems faced by most of the students. Most problems faced by the students were either posted on the a news group dedicated for the course or sent via email to the instructor. Most messages were compiled and summarized on the web page of the course. Extra tutori-als were arranged to overcome these problems and students appreciated it immensely. Regular tutorials, assignments, and quizzes helped reinforce many of the concepts even further.
Conclusion
Teaching digital design systems with VHDL and synthesis presents an integrated approach to digital design principles, processes, and implementations to help the student design much more complex systems within a shorter design cycle. This is accomplished by introducing digital design concepts,
VHDL coding, VHDL simulation, synthesis commands, map-ping to reconfigurable computing platforms, and strategies to-gether. In the main, student reaction to the course was posi-tive. The course seems to have the right blend of being current (using VHDL and FPGAs) and being hands-on (using bread-boarding). We conclude by stating that in our experience, modeling using VHDL and mapping designs to FPGAs can be effectively integrated into a first course in logic design.
References
[1] Peter Walsh, “Integrating vhdl into a first course in logic design,” in
IEEE Canadian Conference on Electrical and Computer Engineering,
Edmonton, Canada, 1999, pp. 1531–1534.
[2] J. P. Uyemura, A First Course in Digital Systems Design, An Integrated
Approach, Brooks/Cole Publishing Company, Toronto, Canada, 2000.
[3] K. Skahill, VHDL for Programmable Logic, Addison Wesley, Reading, Massuchusetts, 1996.
[4] S. Yalamanchili, Introductory VHDL From Simulation to Synthesis,
Prentice Hall, Upper Saddle River, New Jersey, 2001.
[5] J. Bhasker, A VHDL Primer, Prentice Hall, Upper Saddle River, New Jersey, 1999.
[6] S. Brown and Z. Vranesic, Fundamentals of Digital Logic with VHDL
Design, McGrawHill, Toronto, Canda, 2000.
[7] M. Mano and C. Kime, Logic and Computer Design Fundamentals, Prentice Hall, Upper Saddle River, New Jersey, 2000.
[8] J. Wakerly, Digital Design:Princples & Practices, Prentice Hall, Upper Saddle River, New Jersey, 2001.
[9] “Xilinx university program,” Step by Step Tutorial available at http://xup.msu.edu/tutorials.htm.
[10] D Vanden Bout, The Practical Xilinx Designer Lab Book, Prentice Hall, Upper Saddle River, New Jersey, 1998.
[11] Jan Gray, “Hands-on computer architecture: Teaching processor and integrated systems design with fpgas,” in Workshop on Computer
Ar-chitecture Education, Vancouver, BC, Canada, 2000.
