2741 Version 2 Maintenance Diagrams Jun70 pdf

(1)

•

EC. NO.

.DAiE

E.C. NO.

DATE

L

.

'

¢~9J!lJ

PIN 5994670

LOGIC·

DIAGRAM MANUAL

2741

COMMUNICATIONS

TERMINAL

VERSION 002

IBM PART NO. 1277303

WIRED TO ACCEPT THE FOLLOWING SPECIAL FEATURES:

1- RIBBON COOTROL

308747

JUN70

2- TRANSMIT INTERRUPT

3- PRINT INHIBIT

(2)

0001

DESCRIPTION

IP~8E

e~C.

NO.

PART NO

TITLE PAGE

0000

·308747

5994670

TABLE OF CONTENTS

0001

308747

5994671

T

ERt~

I NAL IDENT IFICAT

Im~

& FEATURE LISTING

0002

30874]

5994672

..

GENERAL DESCRIPTION OF VERSION 002

0005

308734

1277357

INSTALLATION INSTRUCTIONS

1000

307100

1186225

F E MAINTENANCE DIAGRAM MANUAL

-

---

-

--

Y27-0014

POwER SUPPLY SCHEMATIC

2000

307100

1176191

TYPEwRITER wiRING SCHEMATIC

3000

308734

1277307

OIA-BI BOARD PLUG CHART

4001

308747

5994673

OIA-CI BOARD PLUG CHART

4002

307100

5162302

FEATURE LISTING

&

CARD LOCATION

5000

308747

5994674

PROGRAM CAP, CODE

&

MODE CHART

7000

308734

1277311

SHARED LINE FILTER CONNECTIONS

8000

307100

1186498

MFI DESCRIPTION

9000

308734

5162729

SIGNAL SOURCE LISTING

-4/:-1

9001

~07

100

1176191)

SIGNAL SOURCE LI ST 1 NG #2

9002

308734

1277350

SIGNAL SOURCE LISTING #3

9003

307100

5J62304

ALDIS

TITLE PAGE

9;00

308747

5994675

TAELE OF CONTENTS #1

9501

308747

5994676

TABLE OF CONTENTS #2

9502

346052

5166222

,'-,

DATE

E.

C. NO.

DATE

F.C.NO.

TABLE OF CONTENTS

JUN70

308747

PART NO .5994671

IPAGE

NO. 0001

IBM

2741

VER

(3)

I

-

--

---

-

---

-TERMINAL IDENTIFICATION

0002

MACHINE TYPE

&

MODEL NO.

SERIAL NUHBER _ _ _ _ _ _ _ _

_

TERMINAL

GROUP

II

NE NUMBER _ _ _ _ _ _ _ _ _ _ _

_

ADDRESS _ _ _ _ _ ADDRESS _ _

_

TYPE OF SERVICE (DIAL, PRIVATE, LEASED LINE OR IBM MODEM TYPE _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

_

DATA SET MODEL _ _ _ _ _ _ _ _ _ _

_

COMMON CARRIER IDENTIFICATION OF

LINE~

_ _

~

_ _

~_~_~~_~_~~~~~~~~~~~

MULTIPLEXOR TYPE SERIAL NO. _ _ _ _ _ _ _ _ _ _ _ _ _

_

TELEPHONE NO. _ _ _ _ _ _ _ _

_

HULT I PLEXOR LOCAT ION _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

_

LOCAL cOtMaN CARRIER CONTACTS RESPONSIBLE FOR THIS SYSTEM

NAME

TELEPHONE

PLANT (MA I NT ENANC E ) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

_

MARKET I NG {COORD I NAT ION ) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

_

ENGINEERING (ASSISTANCE) _ _ _ _ _ _ _ _ _ _ _ _ _ _

_

INFORHAT10N TO COMPLETE THE ABOVE IS AVAILABLE FROM CUSTOMER ENGINEERING FIELD MANAGEMENT OR THE

ACCOUNT SALESMAN.

FEATURE II ST I NG

SALES

FACTORY

FIELD

FEATURE

NUMBER

VOL rAGE

112.5V AC 50 HZ

,

2810

'1176628

5190255

123.5V AC 50 HZ

2811

1176629

5190255

195v AC 50 HZ

2812

1176630

5190255

220V AC 50 HZ

2813

1176631

5190255

235v AC 50 HZ

2814

1176632

5190255

IISVAC60HZ

9880 OR 9881 OR 9901

1176607

5190251

208V AC 60 HZ

9884 OR 9885 OR 9902

1176625

5190252 OR 5190253

230 AC 50 HZ

9886 OR 9887 OR 9904

!

176468

5190252 OR 5190253

DATA SET ATTACHMENTS

~'I

E I 0 3 A 0 R

II

3 A

9114

1176627

5190226

WE I03F

9115

1176611

5190228

3976 MODEL I

2949

1176611

5190228

WESTERN UtJION CLASS 0

9116

1186331

5190229

150 BAUD SCHEDULE 3A

9120

1186331 .

5190230

2 WIRE LIMITED DISTANCE TYPE 1

4634

1176613

5190231

4 WIRE LIMITED DISTANCE TYPE 1

4635

1176624

5190232

*2 WIRE LIMITED DISTANCE TYPE I I

4790

1176608

5190233

*2 WIRE LEASED LINE ADAPTER

4639

1186217

5190234

*4 WIRE LEASED LINE ADAPTER

4647

1186218

51902.'i5

*2 WIRE SHARED LINE ADAPTER CH 1

4641

I 186280

5190236

*2 WIRE SHARED LINE ADAPTER CH 2

4642

1186281

5190237

*2 WIRE SHARED LINE ADAPTER CH

3

4643

1186282

5190238

4644

1 186283

5190239

4691

1186284

5190240

4692

1186285

5190241

4693

1 186286

5190242

~'r4

VII RE SHARED LINE ADAPTER CH 4

4694

1 186287

5190243

*C BOARD REQUIRED FOR THESE FEATURES

SYSTEM FEATURES

DIAL UP

3255

I 176626

5190227

RECEIVE INTERRUPT

4708

1176610

5190248

TYPAMATIC

8341

1176609

5190247

6 FT(I,83M) POWER

CO~D

60 HZ

9986

CONTACT PROD. ENG.

TRANSMIT INTERRUPT

7900

5162726

5190846

- PRINT INHIBIT CPU CONTROL

5501

5.62728

5190347

- REO RIBBON CONTROL

RPQ 868019

1277300

1277300 OR 1277052

- AUTO ADDRESS ANSWERBACK

RPQ E46148

1277051 OR 1277344 1277051 OR 1277344

DATE

EC. NO.

DATE

EC. NO.

,TERMINAL IDENTIFICATION

JUN70

308747

PART NO. 599467ZlPAGE NO 0002

(4)

..

1

, "

•

j

1 ...

Page 0005

2741 VERSION 002

GENERAL DESC:UPTION

\;~"·;"F'A.;

FunctionalObJ'ectives

'I:

'

This version machine adds two additional features ar.d two RPQ features ta the standard 2741. They are:

1.

Ribbon Control (RPQ

868019)

2.

Print Inhibit

(SF

5501)

3..

Transmit Interrupt

(SF 7900)

4.

Automatic Address Answerback (RPQ E46148)

These features are modular and may be

install~d

individually or in groups.,.

A: brief de scription of each of the features follows.

.

1.· Ribbon Control - The terminal is placed in red ribbon mode when a '''Prefix'' followed by an "A"

1s received. It remains in this mode until a "Prefix - 5" sequence is received or the terminal

is removed from a receive status or a power off ... ol'" sequence is performed. The "A

II

and "B" mentioned"

above are in BCD code (A

=

SA

1, B::: BA2). See P.

7000

for equivalent CorresF'ondence Codes.

2.

Print Inhibit - The termlna11s placed in a "No-Print" status when a Bypass code is received.

Receiving a Restore code or a power Off-On sequence returns the 2741 tva printable status.

When in a "No-Print" status, the element "Spaces" when a normally printable character is

received or transmitted. '

3.

Transmit Interrupt - The CPU can force the terminal to leave the Transmit Te:xt mode by

I

sending it a "long space" (200 ms or i6hger

in

duration). The 2741 l'J1ust be equipped with

a full duplex line adapter or data set.

4. Auto Address Answerback - The CPU will send the 2741 a "Prefix" followed by a

"+"

and a

"@".

'The terminal will assume the Transmit Text mode and wUl automatically transmit

(1)

@,

(2) its programmable four character station address, and (3)

©.

The

©

will take

the terminal to the Receive Control Mode. Codes which have special meanings (such as

©>

should not be included in the allowable address c;odes. The

"+"

mentIoned above is the

BCD

"+"

(BAC).

See

P.70oo

for the equivalent Correspondence Code.

B.

Circuit Modifications

S!nct the features are instali,€d in a moduIar fashion, the change to the standard machine conSists

of only additions. The electronics package is electrically identical to the standard 2741 when

none of the RPQ's are installed.

C. I/O Modifications

Minor changes to the I/O wiring are necesscuy when the Print Inhibit feature

''.'''' '

• ", installed. The Ribbon Control feature requires a rather major

1/0

modification. The feature

additions are depicted on the I/o schematic in this manual.

EC No. 545071

308734

-DATE

11-15-66

MAR70

---

... ~-~---.---

....

l

i

(5)

-,

.,

1000

INSTALLATIOl\J INSTRUCTIONS

E.C.NO.

DATE

2741

COMMUNICATIONS

TERMINAL

506826

507567

3067.54

16AUG 66

24 FEB 67

MAY

fo7

..

307100

APR 68

(6)

2741 iNSTAllATION INFORMATION

1.

SPECIAL TOOLS AND TEST EQUIPMENT

The following tools should be ovailoble during installation:

CE Aid Box, PN 1272825

SL T Test light, PN 453601

Oscilloscope (Tektronix 561 or equivalent) modem installation

Selectric

VO

Tools

CARD EXTENDER P/N 452554 (MODEM INSTAllATIONS)

2.

ASSEMBLY

A. UN

IT

PLACEMENT

The unit should be moved

to

the final position, indicated by the customer. CAUTION: Care must be exercised

during handling and moving of unit since the printer is not fostened to the console. Do not remove the strops

holding the printer to the console until final unit placement is accomplished. If the cables are to be routed

under the floor, the cutout should be located at the left rear of the uni t. Adj ust foot of machine for proper

leveling.

8. PREPARATION FOR RESHIPMENT

Shipping of systems and units is described in detail in the branch office manual. Packing material required for

shipment may be ordered from the manufacturing plant as described in the branch office manual. The packing

material for the 2741 Communications Terminal is in 8M 7340966, for padded van shipment, or 8M 7340961 for

common carrier and export, '!Ivailable from

I~M,

Raleigh, N. C.

3.

CA8LE INSTALLATION

A. PRELIMINARY CHECK

Before applying power to unit make a complete visual check of unit for possible damage or loose parts. Cheek

SL T gate for loose cards, edge connecton, or bent back panel pins. Check power supply mounting for damage

during shipment.

8.

AC POWER

Voltage specifications may be found or. back of stand under rear cover. Be sure to check that Customer voltage

matches machine requirements before installation.

Electrical Requirements

Voltag,:

115 or 208/230± 10% or 112.5, 123.5, 195, 220 or 235! 10%

Frequency:

60!

1/2 HZ

or

50

±

1/2 HZ

Phase: 1

Service:

15 AMPS

(7)

C..

DATA SET CABLE

All data set installations should be completed prior to arrival of machine. Connection to data set is accomplished with

8'

data

set cable supplied with unit. Connection is made to reor of data set with 25 pin socket marked "Customer Equipment.

It

Check

that data set has AC voltage applied.

D.,

MODEM INSTALLATIONS

Limited Distance Line Adopter Type

1

A SLT 2-wire

When all terminals have been installed

&

all lines without terminals have been terminated properly

(3K,

1/4 watt resistor

across communication line), the following procedure

is used to terminate the terminals at the ends of the network or at end of

all radial lines.

1.

Remove modem cable PIN 1176471 from terminal

(B I

M4 socket). Insert jumper PIN 81 J 824 on coble cord.

2. Insert paddle on SLT extender PIN 452554

&

place extender in machine (BIM4 socket).

3.

Set up scope with a

DIFFERENTAtPRE-AMP OR

THE

ALGEBRAIC ADO OPTION AND MEASURE ACROSS PINS B02ANO'S07 SOCK€T

POS I

TI

ON

B I K4 .

4. Place terminal in transmit mode or bring up request to send

2741 - Depress Communicatp.

5.

Adjust potentiometer on paddle card until 0.9 volts peak to peak is attained as a maximum transmitted mark level on the

la~gest

signal viewed.

6. The other end of the line is then set as stated above, (or all radial ends).

7. Have system or terminal at other end of line send the character

"V

n

repetitively to give alternating mark

&

spClce frequency ..

8.

Che~k

that both mark

&

space frequency received - signal levels must be equal to or exceed 370 millivolts peck

to peak.

9.

For

a

system which is maximally loaded (line length versus number of terminals)

it

may be necessary to repeat s"eps 5 and

6

to satisfy step 8.

10. Remove extender and

set machine back to normal and test on line.

limited Distance line Adapter Type 1B SLT

4-wire

When all terminals have been installed

&

all lines without terminals have been terminated properly

(3K,

1/4 watt resistor across

receive line

&

SK,

1/4 watt resistor across transmit line) the following procedure is used to terminate the terminals at the ends

of the network or at end of all radial lines.

1.

Remove modem cable P/N'1176471 from terminal (B1M4 socket). Insert jumper PiN 811824 on cable card.

2. Insert paddle on SLT extender PIN 452554

&

place extender

in

machine (BJM4 socket),

3.

Set

up scope with a differential pre-amp or the algebraic add option

&

measure acrass pins 802

&

B07

soc:ketpO$itionB

1 K4.

4.

Place ter"..inpl in transmit mode or bring up request to send.

2741 - Depress communicate

s.

Adjust potentiometer on paddle card until 0.9 volts peak

to

peak is tJttained as a maximum transmitted mark level on the

largest signal viewed.

i

6 ..

The other end of the line is then

set as stated above (or all radial ends).

"

'II

7 ..

Set

up scope ocross

JOS

&

J07 socket position

B 1 K4.

8.-

Have system or terminal at other end of line send the characte.'

IIV"

repetitively to give alternating lTIark or space frequency. '

9 ..

Check

that

both mark

&

space frequency received .. signal levels must

be

equal to or exceed 370 millivolts peak to peak.

10.,

For a system which is maximally loaded (line length versus number of terminals) it may

be

necessary to repeat steps

4

and

5

to sati sfy step

o.

11 •.

Re~ove

extender and

set

machine back to normal and .test

on

line.

EC

307100

Page 3 of 9

(8)

limited Distanco lille Adopter Type 2B SlT 2-wire

When all terminals hove been installed and all transmission lines without tarminals hove been terminated properly (600 ohm,

1/4

watt across the ends of a long line network or at the end of all radial lines or a SK ohm/l/4 ¥lott across all side legs)

the

following procedure is used:

1.

Card PIN 5806182 socket CJ86 is plugged as folJows:

0) Transmit level

o

DBM

Jumper

1

to

3

All In-House line

-8

DBM

No Jumpers

Common Carrier lines

b) 2 wire is jumpered

4

wire is not jumpered

c) Line Termination (680 ohm resistor) is jumpered at the ends of a long line network or at the end of all radial

lines~

JUMPERED.

2.

Card PIN 5807495 socket C1C6 has receive

~ensitivity

plugged.

r---;====:;----;::==::-,

Line

Terminator

~

0

I

L . . - - . _ _ _

I

D~"'--

_ ...

2 wire

I

Transmit

Level

~~

____

P~1_N_5_8_06_1_82

___________

~

leased line Adapter Type

lA

SLT 2-wire

o

DD·D

Receive

Sensitivity

'00

5807495

D

&

all lines without terminals have been terminated properly (620 ohm or 680 ohm,

1/4

watt across communication line) the following procedure is followed to set line adapters on all terminals in the networkt

1.

Card PIN 5808123 socket C1B6 is plugged:

a) Transmit level

o

dbm

Jumper

1

to 3

ali in house Unes

'-8 dbm No Jumpers

Common Carrier Lines

b) 2 wire is jumpered

4

wire is not jumpered

c) line termination (680 ohm resistor) is jumpered

2.

Card PIN 5807495

~ocket

C1C6 has receive sensitivity, plugged (Refer to Modem type 28 for card layout)

3.

Card

PIN 5808121, 2 wire

is

plugged.

4.

Modem Wrap test.

a) Place machine in communicate mode

j

b) Place" me-dem te:;t switch to "MOD

II

position.

c) Key characters from keyboard -

MODEM TEST

light wil.1 blink showing test is functioning correctly.

d) Place modem test switch to "off" position

EC

307100

Page

40f

9

(9)

2 wire

[g

?

leased line Adapter Type 18 SLY 4-wire

Line Termination

~

[=:~-=:J

I.

:=]~~L

:J

C=:::.::::J .

[ ,

:J

r---_29""::l-\ir.:~: i~r~

r:

~

:::::

L...]OO

----,

c : J O O

D

~DO'1

C.:::J·

g;

s

.

[ ... :._:1

Transmit

level

&

all lines without terminals have been terminated properly (620 ohm or 690 ohm,

~/4

watt

across

Transmit

line 8.

620

ohm or

680

ohm,

1/4 watt across Receive

liM) the following procedul'e

is

followed

to

set·

line

adapters on all termina"1s in network.

1. Card

5808123* socket

(IB6 is

plugged.

a)

Transmit

level

o

dbm

jumper} to 3

all in house lines

-8

dbm

No

jumpers

Common

Carrier lines

b) 2 wire

UQ!

jumpered

4

wire

jumperad

c) Une

termination

(680

ohm

resistor) is

jumpered

(transmit)

*Refer

to

UA 2

wire

section for card layout.

2. Cord

~/N

5807495

socket

C1C6 has receive sensil'ivity

plugged (Refer to Modem type 28 section for card

layout).

3. Card

5808121" 2 wire is not plugged (Refer to U..A 2 wire section for card

layout)

4. Card PIN 5808119, Une termination Receive is plugged.

5.

Modem

Wrap test

a) Place machine in communicate mode

b) Place modem wrap test switch to

IIMOO"

position

c) Key characters from Keyboard -

MODEM

TEST

light

will

blink

showing test is functioning correctly.

d) Place Modern test swifch to Itoff" position.

Shared line

Adopter

..!r.e:J..~~

T

2·wir~

Une Termination

___

Receive

00

58081 J9

When all terminals have been installed and

2.!.!.

transmission lines

termi~ted

properly (Insert termination plug

5151250 into

the telephone

jock

provided for line termination) ..

THE fOllOWING

PROCEDURE

is

USED:

t.

Cord

5808125 should be plugged for 2 wire.

2,

MODEM WRAP TEST

a) Place machine in communicate mode.

b) Place

Modem Text switch to

"MODlt

position.

c)

Key c.haracters from keyboard-.

MODEM TEST

light will

blink showing test is functioning

c:orreetl)'f

d) Place Modem Text switch to

"off"

position.

EC 30]100

Poge 5 of 9

PN 1186225

(10)

2 wire

{~

PIN 5808125

Shared line Adapter Type

IB

SlT 4-wire

.

When all terminals have been installed and all transmission lines terminated properly Unsert termination plug

(PIN

5151251)

.

-tnto the telephone jack provided for line terminatioriJ thIS following procedure

is

used:

1.

Card

5808125 should not be plugged 2 wire (Refer to Shared

line

2w for cord loyout).

2. Modem Wrap Test

a) Card

5808127 must be plugged to permit wrapping (socket C1A6)

b)

Place machine in communicate mode

c) Flace MDdem Test switch 'to

"MOO"

position.

d) Key characters from keyboard ('

MODEM

TEST

light will

blink

showing test is functioning correctly)

e) Place Modem Test switch to "off" position

EC 307100

Jumpered

To

Permit

Wrap

"00

I

PIN 5808127

1 " - - -_ _ _

...

(11)

4.

UNIT TESTING

. !.

f

:t

A. PROGRAM CAP PLUGGING

1.

Check card in OIA-B1J4 PN 5804515 for correct plugging (Ref. page 7000)

8.

VOLTAGE CHECK

Apply power to unit and check voltages to SLT Gate.

+48

Volts, :4 Volts measured at location A-B1L1D,0'5

+12 Volts, :!:'.6 Volt measured at localion A-B1L1D,0'3

-12 Volts,

:t

1 Volt measured at location A-B1L1B,0'6

C. LOCAL MODE TEST (2741)

With machine in local mode, test all typewriter functions for proper operation •. Perform preliminary test of

electroni cs, using check loop as follows:

1.

Local - Communicate switch in local.

2.

Depress attn key and hold.

3.

Depress key of character.

4.

Character will continuously print until attn key is released. Check as many characters

(1$

necessary

to properly check the

1B

register, 2B register and tilt rotate magnets.

D.

2741 TESTING

. On systems

using27d/,27QZ?27t'.JControl

Units, a program titled 2741 checkout (FD 13) is available to test the

2741 terminal installation. The following items should be noted prior to scheduling the running of the program:

.

1.

The Customer Engineer at the terminal location must establish voice communication prior to and during

testing with the CE at the CPU location.

It

will be necessary for the terminal Customer Engineer to

give the central operator several items of information required to operate the program.

a) Does the terminal have the Interrupt (break) feature?

b) Does the terminal have the 2-wire line adapter?

There are several error messages that may be printed at the central location. If terminal test procedures do

not work the way they are described, the error printouts may provide information helpful

to

the terminal CEo

Contact the central operator for this information. After the program is loaded and data communication

between the CPU and the terminal is established, the program is started when the terminal operator depresses

the attention key. The CPU will respond by transmitting a standard message to the terminal. Theprogram

. then prepares the central

to

receive the same standard message from the terminal •

(12)

Ths central compares the received message with the standard message to determine whether they are

identical-." The next program mode is the alternate mode in which the central receives a mes,saqe from"

the terminal and transmits it back to the terminal. ']he first character' of the messaqe transmitted to

,

the central must be a number between 1 and 9, which determines the number of times the message will

be automatically tra"nsmitted back to thE; terminal.

: ; JIM

MAINTENANCE DIAGNOSTIC PROGRAM

"

.~ ~~~

'.': "2741 CHECKO OT

, -,. ~

.\_~

~-";';'

The program wUlinsert a minimum delay of approximately 5 seconds between repeats of messages

to the terminal. This delay will also be inserted between any program repeat .. due to program

de-.,

tected errors.

-.,.

;

.

:

.

;

..

""" _,_"

NOTE: (CR)

Represents a carrier return

(OC)

Represents upper case shift

(LC)

Represents lower case shift

A step by

ste~

description of the operation follows:

a)

CPO operator starts program

b)

CPO sends the following message:

c)

@

(OC)ASDFGHTKL(LC) 1234567890(CR)

This message is repeated 10 times

I

with the last Une being terminated with a

©.

In lines

2

through

to;

the

@

will appear as the data character

I

9.

" @

The

©

will put the terminal in transmit and

th~

terminal will send a

@

to the CPU.

The terminal operator then keys in the same me.ssage as received from the

CPU--, (UC)ASDFGHTKL(LC)1234567890(CR)

©

NOTE:

Keying CR ends the

~essage

by automatically generating

©

(EOT).

dl The CPO will compare the received message with the message sent in step "b" above; and if

they don't compare, the CPU will respond to the terminal with the following

message--@

(CR) TRANSMISSION NO GOOD

©

and will wait for a retransmission of the message.

e)

"If

the

mes~age

was received correctly by the CPO

I

the program will proceed to alternate mode

and send the following message to the

terminal--@

START ALTERNATE MODE (CR)

©

,The

alternat~

mode of the" program consists of a tete-a-tete between the terminal

an~

the CPU.

f)

The terminal operator may now send a message to the CPU. The first character of the message"

must be a numeral from 1 to

9

followed by no mote than 100 additional characters.

A

tab

or

carrier return 'is counted as 16 characters. "The message is ended with a CR.

g)

Sample tete-a-tete message

Terminal

sends~-

"

" @

4(UC)TEXT(C~

©

The CPU will send the message back, to the terminil1

a

number of times "equal to"the numeral ""

e

entered.

(13)

11.'-Only the last line will contain tho ending

©,

and all

lines

after

the 'int.line

will

recognize the

©

as a data character, 9.

CPU return

transmission--D 4(UC) TEXT (CR)

•

••

15

idles

•

•••

94(UC) TEXT (CR)

•

••

15

idles

•

•••

94(UC) TEXT (CR)

·

..

15

idles ••••

94(UC) TEXT (CR)

•

••

15

idles ••••

©

The

©.'

places the terminal in transmit mode.

h)

The alternate mode of the program may now

b6

repeated; or

if

desired, the

~rogram

may be

terminated by the terminal operator.

NOTE:

The

interrupt

feature must be tested during the alternate mode,

if

desired.

If

the

attention key is depressed while the CPU is transmitting, the line will break and

the

C~U

will send a

©

~o

the terminal and then wait for another message.

Program Termination

1.

To terminate the program, the terminal operator sends the following message to the

CPU--(UC) END

©

The CPU upon receivlng this end message will idle the line by sending a

©.

Keyboard Note:

Standard message listings assume the

2741

has a Courier·

72

Correspondence

EC 307100

Keyboard.

If

:he keyboard is different, the

CE

may observe some differences

in the standard message and

@

translatic:>n.

This

will not affect the logic

of

.the program.

(14)

~) ~5 ~

Field Engineering

Maintenance Diagrams

Communications Terminal Modell

Communications Terminal

Model 2

~'V ~

TI

Communications Terminal

(15)

2740/2741 SRL/FE Publications Availability Guide

Use this guide to determine what available publications

will best fulfill your individual requirements

TP

SRL

Bibliography

A24-3089

TP System Summary

DOS STAM

t -_ _ _

Pr_og_r_am_m_i_ns_ln_f_o_rm_a_ti_o_n _ _ _

--1

DOS QTAM (MCP)

OS STAM

A24-3090

Component

Physical Planning/OEM I

Description

Physical

Planning

2740

A24-3423

2741

A24-3424

Terminal

Physical Planning

Template

X27-2900

OEMI

2740 }

2741

A27-3OO2

2740

A24-3403

2741

A24-3415

Operator's

Guide

2740 }

2741

A27-3001

FE Information

IPC

FETOM

2740 } Y27-OO13

2741

FEMM

2740 } Y27-o035

2741

FEMDM

2740 }

2741

Y27-OO14

2740 Mod 1 }

229-9505

2741

2740 Mod 2

131-0001

Comm Term Printer

123-1008

OS QT AM (MCP)

(16)

Communications Terminal Model

t

Communications Terminal Model 2

~77~

TI

Communications Terminal

Field Engineering

Maintenance Diagrams

(17)

PREFACE

Detailed explanations of the diagrams in this manual are in the

2740 Model 1/2740 Model 2/2741 Communication Terminals

Theory of Operation manual, Form Y27 -0013-2.

All diagrams in this manual are positive logic; that is, a

posi-tive level is required to condition ANDs, ORs, etc. Triggers and

latches also require a positive level to be turned on or off.

The upper half of triggers and latches is the turn-on (set); the

lower half is the turn-off (reset). Lines going directly into the

trigger blocks are dc set or reset; lines going to an AND butted

against the trigger block are the ac set or reset (indicated by a

capacitor symbol in one line).

FEMDM

Y27-0014-0

FES

Y27-1020

FEMDM

Y27-0014-1

FES

Y27-1031

FEMDM

Y27-0014-2

FES

Y27-1037

FEMDM

Y27-0014-3

ABBREVIATIONS

o

CA

CAS

CASS

CL

CR

Symbol used in ALDs and MDM to indicate feature lines

Control Address Mode

CS

CSS

IPM

LRC

NAO

om

RCAB

RCS

Control Address Selected Mode

Control Address Selected Slave Mode

Control LRC

Control Receive Mode

Control Selected

Control Selected Slave Mode

Intermediate Polling Mode

Longitudinal Redundancy Check

Negative Answerback Override

Optical Image Unit

Receive Check Answerback Mode

Receive Check Slave

Fourth Edition (September 1969)

This is a major revision of, and obsoletes, Y27-0014-2. It incorporates FE Supplement Y27 -1037 and information on the 2760 Optical Image Unit Attachment feature and includes other minor changes.

Changes are periodically made to the specifications herein; any such changes will be reported in subsequent revisions or Field Engineering Supplements.

HISTORY

December 66

February 68

April 68

July 68

October 68

January 69

September 69

RL

RLS

RT

RTS

SC

TC

TCAB

TL

TNS

TPAB

TT

TSAB

VRC

EC 506395

2741 at EC 307100

2740-1 at EC 306848

2740-2 at EC 307147

2740-2 at EC 307426

2741 at EC 307100

2740-1 at EC 306848

2740-2 at EC 307426

2740-2 at EC 307463

2741 at EC 307100

2740-1 at EC 307460

2740-2 at EC 307500

Receive LRC

Receive LRC Slave

Receive Text, Reverse Transmission

Receive Text Slave Mode

Station Control

Transmit Control

Transmit Check Answerback

Transmit LR C

Transmit Nonselected Mode

Transmit Poll Answerback Mode

Transmit Text

Transmit Status Answerback

Vertical Redundancy Check

This manual has been prepared by the IBM Systems Development Division, Product Publications, Dept. 860, P. O. Box 12275, Research Triangle Park, North Carolina 27709. A form for readers' comments is provided at the back of this publication. If the form has been removed, comments may be addressed to the above address.

(18)

TAB

IN

D EX

PLEASE NOTE:

In an attempt to increase the usefulness of FE manuals, we are

trying this "tab indexing" scheme

in

this manual. If you feel

that this scheme is:

of assistance

in

locating diagrams,

not needed, or

can use improvement

please tell us so by returning the Reader's Comment form at

the back of the manual.

Thank you,

Product Publications

IBMSDD

Research Triangle Park, N. C.

Error Conditions

Registers

Clocks

Buffer Storage

Transmit

2740-1/2741

Receive

A 11 Terminals

2741

Record Checking

Station Control

Mode Control

2740-2

Enter

Transmit

2740-2

Buffer Print

Buffered Receive

Edit

Data Set/Modem Interface

2760 Optical Image

Unit Interface

(19)

CONTENTS

Section 1. DIAGNOSTIC TECHNIQUES No Information Available

Section 2. ERROR CONDITIONS 2-1. Error Conditions (2740-1)

2-2. Error Conditions and Invalid Character (2740-2) 2-3. Error Storage (2740-2)

2-4. I/O Checking (2740-2) (2 Parts) Section 3. DATA FLOW

3-1. Data Flow and Control (2740-1/2741) 3-2. Data Flow and Control (2740-2) Section 4. FUNCTIONAL UNITS

4-1. 4-2. 4-3.

4-4.

4-5. 4-6. 4-7. 4-8. 4-9. 4-10.

4-11.

4-12.

4-13.

4-14. 4-15. 4-16. 4-17. 4-18.

S-Register Serdes Clock Control Clock

1B Register (2740-1/2741) 1B Register (2740-2) (2 Parts) 2B Register (2740-1/2741) 2B Register (2740-2) Print and Function Decode Strobe and I/ 0 Cycle

Operate Trigger, Initial Lower Case, I/O Motor Control, Keyboard Lock, and Power-On Reset

Local/Communicate, Status (2740-1/2740-2) LRC Register

Garble and Time Out 15

Bit Counter and Buffer Address Time Decode (2740-2) Buffer Address Register (2740-2)

Advance, Backup, or Reset Buffer Storage Address (2740-2) Buffer Storage Operation Flowchart (2740-2)

Buffer Storage Operation Logic (2740-2) Section 5. OPERATIONS

5-1. Mode Triggers (Basic 2740-1) 5-2. Transmit Flowchart (2740-1/2741) 5-3. Transmit Logic (2740-1/2741) 5-4. Transmit Timing Charts (3 Parts) 5-5. Receive Flowchart (All Terminals) 5-6. Receive Logic (All Terminals) (2 Parts)

vi (9/69)

5-7. 5-8. 5-9. 5-10.

5-11.

5-12. 5-13. 5-14. 5-15. 5-16. 5-17. 5-18. 5-19. 5-20. 5-21. 5-22. 5-23. 5-24. 5-25. 5-26. 5-27. 5-28. 5-29. 5-30.

Receive Timing Charts (2 Parts) 2741 with Interrupt

2741 Terminal Logic Interrupt (2741) Typamatic (2741)

Mode Control, All Features (2740-1 ) Record Checking and Auto EOB (2740-1)

Transmit EOB and LRC Characters (2740-1/2740-2) Receive Check/Answerback (2740-1)

Receive Check/Answerback (2740-2)

Receive EOB and LRC Characters (2740-1/2740-2) Transmit Check/Answerback (2740-1/2740-2) Automatic EOB (2740-1)

Station Control (2740-1 )

Receive Addressing Character Sequence, Master or Slave (2740-1/2740-2) Addressing, Transmit Status Answerback (2740-1) (3 Parts)

Receive Polling Character Sequence (2740-1/2740-2) Transmit Poll Answerback (2740-1/2740-2)

Transmit Control with Dial Up (2740-1) Transmit Control (2740-1)

Mode Control Flowchart (2740-2) (2 Parts) Mode Control Logic (2740-2)

Enter Flowchart (2740-2) Enter Logic (2740-2) (2 Parts) 5-31. Enter Timing Chart (2740-2) 5-32. Transmit Flowchart (2740-2) 5-33. Transmit Logic (2740-2) 5-34. Transmit Timing Chart (2740-2) 5-35. Buffer Print Flowchart (2740-2) 5-36. Buffer Print Logic (2740-2)

5-37. Buffered Receive Flowchart (2740-2) 5-38. Buffered Receive Logic (2740-2) 5-39. Line Type Flowchart (2740-2) 5-40. Line Type Logic (2740-2) 5-41. Line Type Timing Chart (2740-2) 5-42. Line Return Flowchart (2740-2) 5-43. Line Return Logic (2740-2) 5-44. Line Return Timing Chart (2740-2) 5-45. Header Control (2740-2)

5-46. Document Insertion (2740-2)

(20)

S1

"

2

,

3

,

4

,

5

,

6

,

7

,

8

,

9

OQ

..,

"

S

N

;.

l:;'

..,

0

..,

()

g

A

&.

...

~.

N

' I

>I>-0

I

..

(Not) L

%~

E

S8-Stop Bit

~n

Notl Send Parity

Error _{Parity Error}

SDAC

q~

FF

H'A

AND2 S Reg Restore

BB021

B---

~~o~S~ ~~ ~1

I A Error OIU

(Not) CI

BB021 AA711 I 2B Set

I

®

A

I <> 2BI-B Bit VRC

B

I _OR

IY-l

2B Set

-

_{2BI-B Bit}

L

J

OErrar Set Gate LRC I

Parity Error or Not S8 {Loads B-Bit

A _I

.

-LRC Error

J

I 2B Set

J

_A

AAOsl

to 2B-Reg

BBI71 I (Not) L I

OR r - -

I

BBOII

(Not) S8-Stop Bit _CI

L

r--*

C2 Parity Error

or Not S8 "

-Not} SO-Start Bit

-Not) Send A FL (Not) L Error

Receive Text A OR

Not) 2B Set _CCI

I~

FF _L

Not) Garble

L

r---~ _{I B Reset} Incorrect Case A Receive Text

A

1<> 2BI-B Bit LRC BB021 _{2B Overflow Reset} 2B Set

BB021

r - CI

BB021 '

-BB021 _BBI71 (Not) I/O Cycle , ,

-D

~

Uppercase I

A _{Enter Serdes}

IA

.---UC Shift Char

{Not).ljO ~cle I - - OR I - - - C2

J

OR D _{I B Generate Ext}

Lowercase 1 Receive Check-Slave

L

-Transmit Answer Back A

(LC Shift Char) A A _{(Not) L} {Bri ngs Up I B

E Generate}

AA091 BB021 '

-BB031

c

IB Full ,

-2B Full

(Not) SI-B Bit _Error _RST

lNoU 2B Reset Gt. A Lock Light

-(Not) 2B Set OR

SDI, SD2 and SD3

BB031 AAI21

D

..

L§

Error OIU

Exit Error to 2760

N AA702 AA731

' I

>I>-0

---

>I>-

,....

* Logically, but not technically correct.

":l

~

E

t:I

~

\0

---

'"

~

N I

(21)

l\.l

t2

I

l\.l

"

aq

...

2

,

3

,

4

,

5

,

6

,

7

,

8

,

9

...

"

--

!:l

'"

l\.l

3

I

1B3-8 Bit 184-4 Bit

!'> _{1B5-2 Bit}

A

9'

g

1B6-1 Bit

I/o Check Enable 1B3 8 Bit

-n

0 ::l

A

~

...

~.

"

::l 0..

8"'

<:

~

0.. ~

9

"

...

"

~ ro

...

N

'-l 01>-0 I l\.l

B

1B4-4 Bit _{I/o Check Register Fa II} _{(Not) I/O Check Inhibit}

A

o

Rekey I/O Error (Not) 1B5-2 Bit A

I

(Not) 1B6-1 Bit I/o Error Sample A

~

(Not) 1B1-B Bit

-

B8502

BB502 (Not) 1B2-A Bit _OR

(Not) C1 lB3-8 Bit _A

¢)

A

1B4-4 Bit _OR _{I nval id Character}

Receive Ans Bk

IOR!k~OR

(Not) lB5-2 Bit

J

I

_{Prevents 2B Set for any bit conf®ation} DD111 _FL (Not) lBl-B Bit

AAi'1i'2

not useable by the I/o (Except B )

Bfr Adr Ti me 6

-

_{(Not) Rec Text Bfr}

7

Lock Keyboard--AA471

1B2-A Bit Vert Cur Ctrl Gt _{Buffer VRC} Ring Bell--AA491

1B3-8 Bit Memory Buffer Buffer Buffer Buffer

1

Write A D09~

-

Block Bid--DDI41 A

R~"",

N/O II::yJ @R

(Not) 1B4-4 Bit _E

1

_A _{Odd Parity} Odd Parity Odd Parity (Not) Odd Parity Block Status--AA541

~

N Turn On RST Light--B8431

lB5-2 Bit (Not) Edit 3

r

AC Input

1

AC Set FL

-(Not) 1 B6-1 Bi t L..--....I OR DD122

DD141

~

Power On Rese t DD111

Ly

AA182 Bfr Adr Ti me 7

DD093 EOT Tgr. RST Light

(Not) Memory Gal A Enter

1B1-B Bit _{(BFR Overflow)}

~

1 B3-8 Bit

J

DD091 A Rekey

(Not) 1B4-4 Bit

o

_{I nvalid Character}

I

_DD093 Reverse Count Seg. Edit 3 Reset {) Rekey Edit DD191

1B5-2 Bit A (Not) Send DD191 FL

( Not) lB6-1 Bit (Not) Garble

c

BB421 (Not) 2B Set

.---

_{Pari ty Error} BAT 7

o

I nval id Char LRC (Not) S8-Stop Bit

L _f _A

U

_0~8

) (Not) SO-Start Bit

OR Parity Error Or Not S8 DD181

BB17l _C2 FL

q

Receive Text

Lg

C1

-

L . . - (Not) L A

..---

Receive Odd

~

_{1 B Reset} Receive Text t - - -

..--(Not) Send OR Error

(Not) Send Parity

"BBo2l

Incorrect Case A ( Error Set Gate LRC OR

Rec Odd Parity

o

Error Set Gate

CC1i~

Set Inhibit Incorrect Message--AA5 S8-Stop Bit A

I

FF

SDACt::~

FF (Not) Garble

2B Overflow Rese t

L . .

-Load Hyphen to 2B--BBI71

(Not) L _{(Not) 2B Set} ~~

.!..--

A f - - _BB021 Load S lash to 2B For WT --BB361

j~

(Not) SO-Start Bit

L Load Hyphen to 2B--BB421 (Not) Send ~ _C2

A

~

BB021 Prevent 1 B Generate--BB031

~A

C1 2B Overflow Reset 2B Set Turn On RST Light--B8431

BB021 _{LRC Error}

Turn On EOT AA521

' - - - ' BB021

BB171 Reset 2B Reg AA 121 _{Receive Text}

52

(Not) I/O Cycle Buffer VRC

BB~84~

Upper Case 1 ~

0

Error Set Gate

( Not) 2B l-B Bit _{I/O Error Set} _{(Not) S Reg Empty}

( Not) 2B2-A Bit 2

C2 _IA 2B3-8 Bit A _{Rece ive Text and Not RT Buffer} A _D

J

2B4-4 Bit

A OR

-2B5-2 Bit BB502 _{Receive Check Slave}

(Not) 2B6-1 Bit

o

(Not) I/O Cycle

r---

OR r - - - .

J

A

I

Lower Case 1 Incorrect Case

2B1-B Bit Print Hyphen AA241 Pari ty

2B2-A Bit Turn On EOT Serial Data Out Xmit Parity Xmit Odd Parity

iB

_{(Not) Xmit Parity Trigger} _Error

(To Parity Error I:=t: F F r---1 N

2B3-8 Bit A In Receive AA521 (Not) S Reg Empty

I

A

I

AC Set _{S Register Full} Latch _Lite) 284-4 Bit 1B Full Block Shift AA251 SD3

I

_{S Reg Empty Set Gt} A _loR _FL

2B5-2 Bit 2B Full

BB084

~

' - - - '

-L-(Not) 2B6-1 Bit (Not) Sl-B Bit _D ( Not) 2B Reset Gate

I

OR

~

Parity Reset Switch AA091 _{(Not) 2B Set}

A

(Not Bfr Print Or E n t e r N

-Parity Error Or Not S8

(Not) Send BB083 1 BB082

A~

SD1 _{(Not) L}

Rec Text Bfr Or Enter SD2 _{Receive Text}

N SD3 DD101 AA121

Enter Serdes Gate _BB084

(22)

N

I

W

:c

,

Receive Text (Not) RT Buffer

B8502

Buffer Print

Communicate

I

A B8502

I/o Cycle

2B Reset latch

I

A

~

2B (* - *) Bit

Set I/O Latches

I/o Check

(*) Enable lA FL Rese t I/O la tches

~

BB521-2 Intergrated Printer (*-*) Bit

I/o Check Strobe

2B Overflow Reset

A

1 I/o Check Enable

r

r--

OR I -Incorrect Case A

B8501 Control 2 and Not Control 1

Power On Reset

,

CJ

Receive Text and Not RT Buffer

I/o Check Enable

A

B8502

Buffer Print and Comm.

Set I/o latches Notes: * I/O Check Enable and I/o Check Registers have seven latches (1 for each Bit).

* - * Seven lines (1 for each Bit).

I

A

I

See Diagram 2-4.

'iB52T

I/O Check (*) Enable

-N I/o Check (*) _{I/O Check}(*)

A

I

JOR FL

.----

-

-=

OR

A

-I JOR

-I

Bs521

88521-2

Bs52i

~

r8

I/O Check

Inhibit _{I/o Check Inhibit}

FL

lOR B8501

,

Transmit Answerback

lst Status Character Answerback Load lst Char. Answerback lB Set Not EOT

(Not) Transmit Odd Parity Transmit Parity Error

~Not) S Register Full IA FL Power On Reset

noR

B8501 Status

J

A

I

Error latch Reset

8ii5ciI

2nd Status Char. Ansbk.

I

A

I

1st Status Character latch Reset Cl

BB5iT

Parity Error or Not S-8 Receive Parity Error Rece ive Text _IA FL

Jmpr.

(Not) L I

-Power On Reset

loR

0

B8502

-:::b.

-Note: This jumper is used ta disable Receive parity error latch •

I/o Error Sample

~

I/O Check Reg Full

I/O Error 1 I/o Check Enable I A FL

(Not) I/O Check Inhibit

J

Power On Reset

r10R

88502

\.n

Receive Text Buffer

~

Buffer Pri nt & Comm.

B8501 Electronic Error Buffer VRC lA FL

Power On Reset

(23)

N

!2

I

.,.

.,

-;::.

'l!l

.,

a

N

\0

I

--..

!'-0\

~ ~

--..

a

n

IT

'"

A

~

s·

OQ

2

,

3

,

4

,

5

,

6

7

,

8

,

9

(N t) I/O Ch a ec k lnh·b·t I r

.----.

I/O Cycle

10

I

A

I

Rekev I/O Error Set I/o latches

I/o Check Register fuJi

~

(DDIII) 2B Reset latch

Notes: * I/o Check Enable- and

EJ-

28 (* - *) Bit B8511 I/o Check Registers have seven

I/o Error Sample latches (1 for each Bit). *-* Seven

A lines (1 for each Bit). B8502

:Jl

Error Set Gate Set I/o latches

r

I/O Check {*} Enable

A

I

_{I/o Check (*) Enable}

BB502

::JA Fl

N

'-l Receive Text

.,.

0

r

N

'"t1

III _~

;+ 8,

N

I

A Receive Text and Not RT Buffer N I/o Check(*)

Va

Check (*) (Not) RT Buffer

2

--~w

_JaR Fl

B8502 B8521-2

~

I/O Check Enable

rr~

Integrated Printer (*-*) Bit

1

A

I----J

JaR

' - - - - '

----~

B8521-2

B8502 _I

I/o Check Strobe I/O Check Strobe Buffer Print

B

I

A

Buffer Print ond Comm.

Communicate I N _{Reset I/O Latches}

A B8502

88512

2

I/O Check I/o Check

Strobe Control J _{I/o Check Control}_J

Strobe N/O I lA Fl

q~

FF

(AAI61) CCI

Strobe N/C I

~

{AA161} JA Power On Reset

I

B8512

Bii5iT

~

Control 2 and Not Control I

c

B8511

~

I/o Check I/o Error Sample

I

Control 2 A

~~

FF

I

BB5il

N I

I/O Check Control 2 CC2 B8511

Power On Reset

I/o Check Register Full

~

BB511

2B Overflow Reset

~

A

I I/o Check Enable _{r f - - O R n}

~

I/o Check Enable

I/O Error _{I/o Error} Incorrect Case

~501

I/O Check

~A

Fl Inhibit

Fl N Error Latch Reset

==

o

Power On Reset OR

2 Reset I/O Latches

-

BB502

Power on Reset JaR

B8501 _{I/O Check Inhibit}

(24)

2

I/o Cycle

A

I

2B Reset Latch

' - - - - '

BB511

A

_{2Bl-B Bit}

Rece ive Text

RT Buffer A Buffer Print

r-

OR

Communicate A

BB502 (Not) Control 2 and Not Cantrall Set I/O Latches

B

2B2-A Bit

Reset I/O Latches

et I a Latc es S / h 2B3-8 Bit

c

Reset I/o Latches

Set I/o Latches 2B4-4 Bit

o

Reset I/o Latches

~ Set I a Latches

/

2B5-2 Bit

E

_{Reset I/O Latches}

Set I/O Latches 2B6-1 Bit

Reset I/o Latches

F

Set I /0 L ate es h 2B7-C Bit

Reset I/o Latches

G

H

,

3

~

1

iF}-G-' - - - - iF}-G-'

BB512

I/o Check 1 Enable

IA

FL

BB521

I/o Check 2 Enable

L -__________ -4~A~ FL

J

A

!

l

A

r

BB521

I/o Check 3 Enable

IA

FL

BB521

I/o Check 4 Enable A FL

BB522

I/o Check 5 Enable A FL

BB522

I/o Check 6 Enable

L-_ _ _ _ _ _ -t...:A:.J FL

BB522

J

A

I/o Check

I

7 Enable A FL

BB522

Diagram 2-4.

I/o

Checking (2740-2) Part 2 of 2

,

4

,

5

,

Set I/O Latches

I/o Check 1 Enable

~Ir~

I/o Check 1 _{I/o Check 1}

~

FL

I/o Check Strobe

1 1

A

Int. Print l-B Bit j _-::::::::lOR

'

-BB521

Reset I/O Latches

I/o Check 2 Enable

I/o Check Strobe Int. Print 2-A Bit

BB521

I/o Check 3 Enable

~ir=~

~

FL

I I

-I/o Check Strobe

I

A

Int. Print 3-8 Bit

I

_JaR '

-BB521

I/o Check 4 Enable

I/o Check 4

I/o Che c k Strobe Int. Print 4-4 Bit

I/o Check 5 Enable

-G-

...-

I/o Check 5

rr=~-~

FL

I/o Check 5

I/o Check Strobe

I

A

JOR

Int. Print 5-2 Bit

'

-BB522

I/o Check 6 Enable

N I - - - I

I/o Check 6

I/o Check Strobe Int. Print 6-1 Bit

BB522

I/o Check 7 Enabl ...

~ ~

!r=~

~

FL

I/o Check Strobe

1

I

A

Int. Print 7-C Bit

1

.-lOR

'

-BB522

(25)

Ii.

2

,

3

'"

()Q

...

'"

E!

Interface

w

I

;-"

I

t:l

'"

...

I

'"

'"'1

0'

A

"

I

'"

::;

p..

I

()

0

I

a

I

g.

N

I

"

oj>. ~ 0 I

>-'-I

I

---

'"

"

oj>.

>-'-B

I

c

Line Data Set _{Data Set}

" >' _or

Adapter Modem

103F FD AA341 103F HD AA342 103A AA343 Lim. Dist. 1 2W AA344 Lim. Dist. 1 4W AA345

D

WE-WU AA346

I

~

I

'"

"

oj>.

0

---

oj>. >-'-'"'1 tT1 ~

~

E

-;j;:

---

'"

00 W I

>-'-,

•

S-Reg AA021 AA031 Serdes Clock AA061 AA052

4

.---Mode

I

Trns

I

~

G

Ftandl by

'---roo-AA211

,

5

SLT Gate

B-

Operation in Process

-AA141

Control Character Detect

•

AA1B4

1 B-Reg AA181 AA182 AA183 AA1B4

,

6

Control Clock AA071 AA051

,

•

2B-Reg AA081 AA091

l-7

.J- Print ar

r---v

Function AA251

Transmit Receive Transmit or Receive Control

,

8

Strobe Circuit AAl0l AA201 Control Character Triggers AA131 AA10l I/o Cycle Circuit AA141 Print Decode AA241

r-j:::::=""

Function Decode AA251 Legend

;: ;;9

,

9

I/o Printer

I

Strobe I CBs

1

I

3000

~

I

_{I/O Code} I/O Transmit To BCD _Contacts

I

3000 9001

I

Control Character

I

Keys

I

3000

I

I lac CBs

I

3000

I

Tilt/

f-~

Rotate

I

Magnets

I

3000

I

_~ _Check

-v _Magnet

(26)

OJ

12

I

2

,

3

,

4

,

N

"

~

"

~

...

a

Enter Char r

-OJ

C\

00 I

!"

Ii'

rt

"

'"'1

0'

A

:;;

§

0..

Store Slop C~de

Buffer Print

OR

-

Memory Clock Transmit Char.

f+-Bfr. Rec. Char

Step

DDi22

I 00081,

I

I I

I

11

I

()

a

~

Address - Register

g.

N

"

oj>. ~ 0 I 128 fOOO?1 00072

~ 256 00051

448 00052

B

,....--A

~

c

Transmission line Comm. Adapter S - Register 1B - Register IJnterface

CCOII AA28 I AA021 AAI81

(Common Carrier Data

•

Thru Thru AA031 Thru Set, IBM line Adapter,

AAI84 or Telegraph Adapter) CCO?l AA283

AA34 I

o

Thru AA34?

Serdes Clock Control Clock

E

AA061

Cycles Continuously AA052

Controls Transfer for Transmit;

to and Reset of Cycles Once for

each Character Registers for Receive

*

Not Dune on Buffered Receive

5

,

6

Vertical Switches 128 00021

25~1

00022

...

..

I'--.

448

Vertical Orivers

-:-,...

D0023

r

-I

I

-IL

A

..

-~

..

Genel'Qte Control Characters AAO?I

AA051

,

7

,

Horizontal Switches

~/

DD033

DD034 Horizontal Drivers 128 OD031

,

~

₂₅₆

1

00032 448 Care Array

128,256, or 448 OD041 (128) DD042 (256)

or (448)

_.

- - -

-

.,

I

Memory Buffer

I

-(trigger)

ODOII

I

c

~

2B-Register AA081

t

AA091

~

Detect Ctrl Character

Detect Terminal

..

Address (Addressing or Polling)

BB101 BB201

8

,

9

ENTER IIIIZIZZZZ IIZI

BUFFER PRINT ii'

TRANSMIT RECEIVE

BUFFERED RECEIVE

-CONTROL

Print and

I/O

Printer Function Decade

t

AA241

t

I I I

AA251 I I

I I

*

I I

Strobe, I/O Cycle

I

AA4?l AA201 AA141

..

Made Control

..

Mode Triggers

4

~

AA211

~

,D BB421

~ BB091 F BB061

I

BB181

(27)

-2

,

3

,

a

aa

Seri I D

t

I

n

AND 1

r

-(Not) Send

~rL~

Send

AND 2

OR

LJ"-.

AA131

S Register Empty

A

N

A

' - -

Repeat

AA131

_Dl.qlQl!C2!ln~f.t

__________

SDAC

(From Serdes Clock)

(Not) 1B7-C Bit

B

(Not) 1 B6-1 Bi t

c

(Not) 1BS-2 Bit

(Not) 1B4-4 Bit

o

Mode Change

-S Register Empty

~

(Not) 1B3-8 Bit

Send

A

SDl

(Not) Enter Serdes Gate

Enter Serdes

A OR

I

-(Not) Send

L-

I

-(Not) Carrier

A

(Not) C2

(Not) 1 B2-A Bi t

AA101

E

AAS01 (Mod 2)

S Reg Res tore

(Not) 1Bl-B Bit

F

1 B Fu

\I

Enter Serdes

(Not) C2

A

Send

AA221

G

H

Diagram 4-1. S-Register

4

,

5

,

Line (Logi cal Bit or Mark)

S8-Stop Bit

\I

IA

FF

Not Mod 2

I

II '

-AND 3

~

)<

(Not) Line

I~

OR

AA131

-A

S Reg 7

Reset

~

AA221

-S Reg6

Reset

A

-

AA221

~

S RegS

Reset

A

~

AA221

...--S Reg4

Reset

A

"

-AA221

S Reg 3

Reset

A

AA221

A

S Reg 2

Reset

AA221

A

S Reg 1

Reset

AA221

S Reg 0 Reset

AA021

S7-C Bit

fA

FF

'

-I

II ~

N

II

JA

I

AA021

S6-1 Bit

fA

FF

"

--8

J A

-,--

_r--I

AA021

SS-2 Bi t

IA

FF

lGJ

r

-IA

'

-_r-

AA021

S4-4 Bit

It

J

A

FF

Lf}

-

IA

~

I

AA031

S3-8 Bi t

I

}~

FF

~

II

IA

N

-r--

AA031

S2-A Bit

l~

FF

LGY~

AA031

Sl-B Bit

\I

IA

FF

II '

-lGJ-

~I

1

A

r

AA031

SO-Start Bit

II

fA

FF

T

II L .

-LG

II ~

IA

L .

1

-AA031

Send

Note: Dotted lines indicate

feature inputs.

6

S8-Stop Bit

S7-C Bit

S6-1 Bit

SS-2 Bi t

54-4 Bit

S3-8 Bit

S2-A Bit

Sl-B Bit

SO-S'tart Bi t

4h

Serial

L

~

Out

A

N

AA101

AAS01

(Mod 2)

(Logical

Bit or

Mark)

(28)

A

B

c

..

0

~

E

~

F

G

H

2

,

3

,

4

,

5

,

6

SDI

300 Hz, telegraph, AA362

9.6 KHz, 600 Baud, AA363

539 Hz, 134 Baud, AA361

~

FF

t-rA

-

--81---.-~r-~1~---s-DC-A-C-2---4---~

AA061

(Not) Mode Change

ro-

AA051

300 Hz

SDMV

2.4 KHz ..

'~HZ

(Not) line

-;:"";';Seln~d~---10R

A

- r -

OSC

SDCACI

1

AA051

SD2

~ ______ ~ ________________________ ~~~ __ ~ ____ ~~~A

FF

AAI31

-8L;~

L-_C_lo_c_k_R_u_n __

~Nr-

__________________________________________

~~

__

~

________

--J1

AA061

--8~IA

I

A

.---~

AA061

'*Hlgh ;Peed divider

...,

_I

I

I~::':'-

n---F-R-EQ-O-IV-I'""1

I

n

FREQ DIV 2

1

SDMV (2.4 KHz)

~

r~

FF

~ ~~r--i--~-rA'r:F;:;F:--l--4t-""":::':":'r:":""';_~_:""::_:"::!_

J

OSC (9.6 KHz)

1

II ~ I

S Register Restore

I ..

J

A AA363

~

*

~,'---,',-A-A-A-3-63"""

I

I(Not) Clock Run

L.::

-

- -

-

- - - - -

-Serial Data In

Clock Run

SDCAC2

SDCACI

SDI

SD2

SD3

SD4

SDAC

S Reg Restore

Diagram

4-2.

Serdes Clock (Re cei ve )

<>

C I Gate (Features and Mad 2)

--2B Set

ro-(Nott Cl

A

L

r--(Not) SO-Start Bi t

A

I:nter :'erdes

18 Generate

r--

OR

(Not)

(Q)

(Not)B

B

I

A

I

8

I

_J

4

CI Gate

2

Power On Reset

(Not)

CO

A

Clock

Ir.!!.'2!~i.!.I.e~t

________

E

Mul tivibrator

(Not)D

[ J - E