900-006-301_Phoenix_211_Disk_Controller_Volume_2_Oct1978.pdf

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Xy1ogics, Inc. phoenix 211 Volume I I of I I

900-006-301

Rev A

phoenix 211 Disk Controller

Maintenance Manual

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. O. DRAWING NO • DESCRIPTION REVISION

1 900-006-000

PARTS LIST

A2

2 900-006-200

DOCUMENT TREE

A2

3 900-006-600

BLOCK DIAGRAM

A

4 900-006-300

OPERATORS MANUAL

A

5 900-006-301

MAINTENANCE MANUAL

A

6 900-006-400

SIGNAL ORIGIN LISTING

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1 300-015-900 1

2 300-038-9xx REF

3 300-020-900 1

4 300-021-901 1

5 300-029-900 1

6 1025-010 1

7 500-008-900 1

8 400-023-900 1

9 500-002-90x REF

10 500-001-90x REF

11 400-032-90x 1

12 500-010-900 REF

13 500-012-90x REF

14 500-011-900 1

15 300-019-900 1

16 500-014-900 REF

17 400-041-900 1

-- 18 400-008-90x REF

19 500-0l5-90x REF

20 300-031-900 1

21 300-043-900 1

22

300-050-90. I

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-DESCRIPTION NOTE

Board No. 1 4

Bd. No. 2 Configuration Kit 1,4

Board No. 3 4

Board No. 4 4

Interface Bd. (P.C.), MUL TI 2,4

Interface Bd.

(w .w.)

2,4

Cable Kit, Flat 1

4 Slot Systems Unit (DEC) 4,2

Autoswitch System Kit 3

Calcomp System Kit 3

Interface Cable 5,1

Multiple CPU Option Kit 3

Data Port Kit 3

Cable Kit, Round - 1

-~, ... _'U:.

Board No. 2

--Rom Bootstrap Kit 3

4 Slot Sys. Unit (SAE) 2

Logic Box Assy 3

Front Panel Kit 3

ECC Bd. #1 6

ECC Bd. #3 7

INTERrACE 80 (2 $10£0) 2 ....

Notes:

1. See customer sales order for p oper tab no.

2. Item »,6&5 are interchangeable. Item 8&17 are inter-changeable) 3. Optional system kits. See cus orner sales order for

usage.

4. See document for proper tab no if optional kits are selected by customer.

5. Do not ship with items 9 & 13, 19 6. Items 1 & 20 are interchangeab e 7. Items 3 & 21 are interchangeab e

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r- CABLE

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r-CO ... CA .. P) 1-480U4-() r-PINS (AMP)

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'--NYLON FASTENER GRAYKILL 6OO~-04oo

NOTES:

I. TABULATED CABLE LENGTH. 2. OPTIONAL SYSTE .. KITS.

3. DESCRETE COMPONENTS, HOWR AND WIRE ARr NOT DENOTED ON TH 15 OWG. 4. MULTIPLE DRIVE OPTION,

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ROM CONFIGURA T ION,

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REVISIONS

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5 300-050-400 LOGIC DIAGRAMS

A

A

A

A

6 300-050-600 ARTWORK B B B B

7 300-050-700 FABRICATION

8

B \.

B

B

8 1009-01 OUTLINE DWG

REF REF REF REF

9 300-050-800 REWORK DWG (NOTE 1)

A A I A A

SIZE

NOTE 1 To Rework A/W From Rev A to B Use X~9

A

300-050-90X

9

(11)

~-,,,--.-~-.. ,

TAB TAB

REV NO

AI

000

~

I 001

AI

002

A2.

003

-,-",---'--"--. - - , ~~ - , -'"----""-"--.~----~- ---

-DESCRIPTION DWO REV ECO. APPD DATE

STANDARD, 50 PIN CONN.

A

0245 REL

:#

wJ-\<.

4-("l.-7~

MULTIPLE CPU WITH TERM.

AI

02.62 (003 TAe)

~

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MULTIPLE CPU WITHOUT TERM.

"2

0308

(ALL TA~S)

.~-

. .. ,"~

_-_

sit

.... __

.-

s

STANDARD, 60 PIN CONN.

TOLERANCES ~

(UNLESS OTHERWISE NOTEOI ~

.xx

!..01

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t!1

XyIogics

OEM COMPONENT GROUP INC .

. XXX :!:. .005 :!:.1/M

1:!:.1J1

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ENGR APPD

3/21/78 ERB TITLE PARTS LIST 211 INTERFACE BOARD

~~GJ' SIZE DRAWING NO. REV

t-'''':'R'':;'OJ':''E=-C-T-' t-:-11.()~~"""'-4-4--I-\ _--I"jg A 300-050-00X A

2

MANAGER I~~,,,,,"'A ~~ J S CALE

I

SHEET 1 O F . 1:.

I

LEVEL

n. :

(12)

,I " 7 ~~

-"'-ITEM PART REFERENCE

NO NUMSER DE SCRIPTION 000 001 002 003 DESIGNATION

1 300-050-100 PC Board 1 1 1 1

2

050-004-001

SWITCH SETTING SPEC

REF

REF

REF P.£F

3 7400 IC Pack 3 3 3 3 roc. 1:'0 011

4 7402 IC Pack ? ? ? ? Rl 1 . H?

5 7404 IC Pack 4 4 A .A 'C'A nD ~"1 ,...11

6 7408 IC Pack 3 3 3.. 3 IFlo.F.t.n7

7 7410 IC Pack 2 ') 2 ') f"? .1".Q.

8 7430 IC Pack 1 1 1 1 Ll

9 7432 IC Pack 1 1 1 1 01

10 7437 IC Pack 1 1 1 1 F7

11 7442 I~ P;H'~k 1 1 1 1 T'l

12 7474 IC Pack 5 5 5 5 G9 K4 F5 E6 .. E7

13 74151 IC Pack 1 1 1 1 H12

14 74193 IC Pack 9 9 9 9 02 cD3..0.4 . OK; .n6...R3...B4 M BL.

15

74367/"~VQ91'

IC Pack 6 6 ..6. 6 R~r:l r:? r:~ r..l r..?

Hi 741q1/74l

5393

Te' P""t"'k 1 1 1 ~ ... 1

17 74Hll .IC..Eack 2 2 .2 2. ,...0 1<'0

18 74S08 IC Pack 3 3 3 3 B2 G5 010

19 74S51 IC Pack 2 2 2 2 G8~K3

,

20 74S74 IC Pack 3 3 3 3 EI0 F8,G4

21 74S163 IC Pack 1 1 1 1 Fll

22 74S174 IC Pack 1 1 1 1 G12

23 74S175 IC Pack 2 2 2 2 Kll,G10

24 74LS257 IC Pack 7 7 7 7 Fl,F2,F3 C3LC4~C51C6

25 75452B IC Pack 9 9 9 9 E2.1(12A.I<I~B. LIZA, Lif8 lOA KIOS. . lilA. 1II8.

26 P,17 / 9'37 T~ P<'It"'k ? ? ? .2 RA.Yl0

/1

NOTES SIZE

A 300-050-00X

P/L

I

SHT 2 OF I

I

REV

A"

(13)

-~. '" ' - J

ITEM PART REFERENCE

NO NUMSER DESCRIPTION 000 001 002 003 DESIGNATION

27 8160 Ie Pack 2 2 2 2 B9,BIO

28 8641 Ie Pack 9 9 9 9 A3 ,A4 ,A5 ,A6 ,A8 ,A9 AIO,AI ~AI&

29 8837/ST37 Ie Pack 2 2 2 2 L3,H7

30 8838/ST3P. Ie Pack 7 7 7 7 H3.H4 H5 H6 B7 BII BIZ.

31 96Q2 Ie P-'ll~k 1 1 1 1 F6

32 2&S02 Ie Pack 1 1 1 1 F12

33 ,

34

3S

36

":17 RPRiRi-nr 150 AJ 1/4W 1 1 1 1 R1

~A R", .. ; ... ,...,... 1 An J t 1/.o!lW 4 4 4 4 R2,R5,R7,R8

39 Resistor, 390../L 1/4W 2 2 2 2 R3,R4

40 Resistor, 470 J1.. 1/4W 1 7 7 1 RIO ,Rll,R12 ,RI3,P.20 ,R22,R"

41 Resistor, 2K 3 3 ·3 3 RI5,RI6,R23

42 Resistor 5.1K 1/4W 1 1 1 1 R17

43 Resistor, 7.5K 1/4W 1 1 1 1 R19

44 Resistor 33K 1/4W 1 1 1 1 R21

4" R"'RiRi-nr 47K 1/4W 1 1 1 1 R14 ,

.o!l~ R"' .. ; ... ",... nn .... ;"'" .. '

, ,

2 2 R6.R9

.11.7

4A

49 898-3-RIOO Resistor Pack l00.JL DIP -Z Z -0-

-Z-

E.:),.l\.b

50 Resistor Pack 300/V DIP 1 1 0 I KI

51 899-1-R470 Resistor Pack 470JVDIP 3 3 *1 3 K8,K9,*E12

~

52 899-1-R2K - Resistor Pack, 2K DIP 2 2 0 2 H8,H9

NOTES SIZE 300-050-00X

A

(14)

~

~

c

ITEM PART REFERENCE

NO NUMBER DESCRIPTION 000 001 002 003 DESIGNATION I

53 784-l ... R470 SILR, 47QflSIP 4 4 4 4 RPl RP5 RP6 RP7

54 784-l-R2K SILR 2K. SIP 5 5 5 5 RP?RP< RP.Il PPA PPQ i

55 TI-(A3-1402 SOCKET 14 PIN

5

5

5

5

K9.>H9 KB~HR) K7

K&,KS

I

1:\1; AI II': AT 3U:'-A~39D SOCKET 16 PIN

2

2

2

2

I

1:\7 002- 00\- 250 E'YELE'T,

Ys

DIA ("'OTE' 2.)

4

4 4-

4

I

1

1:0 CDl5ED 330J Caoacitor 330f 2 2 2. 2 f"1;.f"7

59 15OD686X-9015R Capacitor, 68ufTANT.15V 6 6 6 6 C8.C9 CI0 Cll Cl2 C13

60 CDl5FD101J Capacitor lOOpf 1 1 1 1 C4

61 CD15FD47lJ Capacitor 470pf 2 2 2 2 C1 C5

62 CD7FA102J Capacitor 1000pf 1 1 1 1 C2

63 UK12-503 Caoacitor .05uf 93 93 93. 93 TTnm;tr1c .. t'I

64 r .. n .. ,..ttor Ootional 1 1 1 ] C1

65 SAE 1008-:-692 Dip Switch 8 POS 5 5 5 5 B1.D9 Kl K2 L4

66

o

2 f -00 2. -00 , P.C.S.HAtJDLE (WOTE I) 2- 2 2. 2

67 1040-78 ROM (IM5600) 1 1 1 1 Hll

68 1040-79 ROM (IM5600) 1 1 1 1 Gll

69 1040-80 ROM (IM5600) 1 1 1 ! 1 C12

70 1040-81 ROM (IM5600) 1 1 1 1 D12

71 10.40-RI; ROM (TMI:\I;OO\ 1 1 1 1 QA I 1

72 SAE 6910 Dioswitch CoverClO DOS) I I \ I

73 SAE 6R08 DiDswitch ~ )vel" (8 DOS\

5

5

5

5

74 65268-011 Connector. 50 PIN BERG 1 0 0 0 Jl

7r:; f",r:;?F;R-OO? ("nnn"",... ... nr F;O PTlIl RRRr.: 0 2 2 lit "Jl J2

7f. SAE 1010-692 DI PSWITC H C I 0 POS) I I I I CIO ;

77 021-001- 001

LOWER

EXTRACTOR (NOTE I)

1

J

t

I

18

Ol'-OOI-002. UPPER

EXTRACTOR

(~T€' I) I I I I ,

I

NOTES I. FOR PROPER HANDLE / E~iRACTOR SE'E' CUSTOMER REQUIREMENTS SIZE

/3

2. USED WITH ITEM 66 ONLY A 300-050-00X

(15)

~

Addiess Bit

Affected ABU

ADDRESS·· .

!~

Loe C10-1

~

it

sw

764f1f1f1 ON

7642{1{1 ON

7644!1' ON

764S{lfl ON

7646f1f1

.

ON

7672{1{1 ON .

TO ENABLE

ECC

.-DIGI SW1f4

LOC D-9 6 NONECC

.20 Boundry OFF

ECC or

~g~ ~~

1:l_nnr irv OFlo"

211 INTEBFACE ·BASE ADDRESS DECODE \...Y

C

-AB11 AB1~ ABSJ9 ~SJ8 AB!l7 ABSJ6 ABSJS \B!l4L AB!l4H

rc

v

v

v

V

l7

~

C18-3

rz

[Z

lS-7

[Z

~la-'

rz

~

li

~

.

OFF ON ON ON ON ON ON OW OF"F

OFF ON ON ON OFF ON ON ON OFF

OFF ON ON OFF ON ON ON ON OFF

OFF ON ON OFF ON OFF ON ON OFf

OFF ON ON OFF OFF ON ON ON OFF

I

OFF OFF OFF ON OFF ON ON ON OFF

II

OFF OFF

n

1&1

sw-S

LOC Clf>

..

.~~

7 8 ~

l:

u TITLE SWITCH SETTING CHART (FOR 300-050-901.)

1.1) PHOENIX 211 INTERFACE BASE ADDRESS

~

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~

0

OFF ON N

'"

u D

N 0 IU

SIZE DRAWING NO. REV

0 0

A

050-004-001

C

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SCALE -11- SHEET OF

4

LEVEL:II

01:

(16)

A

C

rr-Port

~

lz:

~

lZ

tL

[

#

L4-B' L4-7 L4-E 4-5 4-4 L4-3

OFF OFF OFF OFF OFF OFF

1 OFF OFF OFF OFF OFF OFF

2 OFF OFF OFF OFF OFF ON

3 OFF OFF OFF OFF ON OFF

4* OFF OFF OFF ON OFF OFF

" , .

5* OFF OFF ON OFF OFF OFF

6* OFF ON OFF OFF OFF OFF

7* ON OFF OFF OFF OFF OFF

DIGI SW #6 LOC IA

1) To enable Multi CPU Logic DIGI 5~.

#4-1 (Loc D9-1) OFFother wise ON

2) To enable Multi CPU Request Bit 5 as R/W Digi SW #4-2 ON (D9-2) and #4-3 (D9-3) ~

~

L4-'~

OFF

ON

OFF

OFF

OFF

OFF

OFF

OFF

3) To enable MULTI CPU Request Bit 5 as always zero Digi SW #4-2 ~ {D9-2) and #4-3 (D9-3)ON

NOTE: ON=CLOSED = +

OFF=OPEN=-~

L4-1

rz

K2-8

~

2-7 ON OFF OFF

OFF OFF OFF

OFF OFF OFF

OFF OFF OFF

OFF OFF OFF

OFF OFF OFF

OFF OFF ON

OFF ON OFF DIGI

~

K2-6

~

K2-5

rL

K2-4

OFF OFF OFF

OFF OFF OFF

OFF OFF OFF

OFF OFF ON

I

OFF ON OFF

ON OFF OFF

OFF OFF OFF

OFF OFF OFF

SW #2 LOC K2

Q. Q.

2

s~

Z Z Z

~

:Witc. it

w1tch K2-3 K2-2 K2-1 cation

OFF OFF ON

OFF ON OFF

ON OFF qFF *Reserved

for futur expansion

OFF OFF OFF

OFF OFF OFF

OFF OFF OFF i

OFF OFF OFF

OFF OFF OFF

____

~+IO~I

tiTLE PHOENIX 211 v MULTI-CPU SWITCH SETTINGS

~ ~18

INTERFACE

I~

~ 0 ~~S~IZ~E~D~RA~W~IN~G~N~O~.---~~R~E~V~I~

~

A

050-004-001

C

<I> I

(17)

~

, "

~~---I

~

Interrupt Vector AddressS

214

254

260

264

270

Notes:

1) ON = Closed = +

OFF = Open =

-2) ON = Address Bit Logic fiJ

OFF Address Bit = Logic 1

11

W5

IN

IN

IN

IN

IN

10 9

W4 W3

IN IN

IN IN

IN IN

IN IN

IN IN

DIGI

S 7 6 5 4 3 2 1 fiJ Ad§n~ss

~

~

~

~

~

~ ~

ti

ti

N/A SW #

s~it

BI-1 B1- Bl-E BI-5 Bl-4 BI-3 1-2 1-1 LOC #

ON OFF ON ON ON OFF OFF ON

ON OFF ON OFF ON OFF OFF ON

ON OFF ON OFF OFF ON ON ON

ON OFF ON OFF OFF ON OFF ON

ON OFF ON OFF OFF OFF ON ON

SW #1 LOCATION B1

~I

~Xyk)gics

~

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~ PHOENIX 211 INTERFACE INTERRUPT

i

~

1

0 VECTOR SNITCH SE'l"l'INGS

I

~

II)N U

::: 0 1&.1 SIZE DRAWING NO. REV·' \

VI I-

t\

050 -

004 - 00 I

C

>

(18)

---on~t

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(R')

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27 26 25 24 23

I

22 21

-

Weight Binary

V V V

V

V

V V

~

!%

~

ti ti

~

~

~

~

SW #

Throttle Bit

Setting Kl-8 1-7 1-6 1-5 1-4 1-3 K1-~ K1- LO'eW#

2 OFF OFF OFF OFF OFF OFF ON OFF

4

OFF OFF OFF OFF OFF ON OFF OFF

8 OFF OFF OFF OFF ON OFF OFF OFF

! •

! ! I

DIGI SW #3 LOCATION K1

~

$~

~

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:r TITLE

~ Phoenix 211 Interface Throttle Setting

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.

Bus Grant Catcher I ,

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-

A

050-004-001

C

>

«

I~ ~~41 r : ; - f I - I ~H!;!;T 4 OF 4

I

LEVEL ]I.

Bus Grant Catcher

To enable Bus Grant Catcher:

DIGI SW #4-4 ON (D9-4)and SW #4-5 OFF (09-5) To disable Bus Grant Catcher:

(19)

D

c

B

o

A

The informotion her-. i. tho property of XYLOG.C OEM COM· ..o..ENT GROUP INCOfiPORATED. Tronsmit1Jll. ,_ipt or

po'-_kin of the infortnltion do.l not compty. hcen ... or impty Iny ri ... to u ... II, 01 manufacture fram this infOl'1v !ion end no

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C S2., BU5SDQjQjL ¥---"~~~~

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(5\.1:3,445,1)

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DA"TACZlH (5HS.3/")

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o.I#'~I--IDB2.H (51-43)4, 5,1)

DATA2.H (St-lS)

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DATA::' 1-1 (SHS)

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Ct.J2.~BUSSDQl4LX---++...;.q 3 OUTJ DATA4H (SI-I5) '.5' BU~ 1 .. ,.1+ 1DB51-1 (~l-I3J4,5.t)

CP2,BUSSD05L~-__t_+_"q I OUT' P!~ DATA5H (SHS)

4 BUS-AS Iw4 5' 1DBG:oH CSH1;4,S.1)

C.,/2.,6USSDQ)G:oL*"---++,q 4 DA'Ac..H (5HS)

11)1371-1 (SH3,+. 5.'1)

C.M 2,BUS5DQl7L)E---t-r=/Z.:q"~~ DATA"7 H (5~S)

CL2,BUSSDQ)8L )E-_ _ ++-'-'qB~5

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DESCRIPTION

0245 R£L·

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81 8POS

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BRL /Z ISRI-I 1-..o(5111.)

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LOGIC DIAGRAM

PH 211 INTERFACE 80

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LOGIC DIAGRAM PH211 'NTERFACe BD

ENGR l i n I DRAWING NO.

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~ _ _ ~=-_~!~:~.;~TERFACEBD

11'1. S"'.

(24)

J3-1 ,,')...---, J3-2 ,)...--..

J3-3

,'>---"

J3-'\8

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oil II I DATE I Al'PROV

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(25)

~

\ , " __ ,J

~ .. '

...

,

...

_

...

" ... .

~ /

()

GROUP DESCRIPrION SWITaIES "ON"

A Nonnal Operation 1(7-1, K7-8, 1(7-2, 1(7-3, 1(7-7, E5-3; E5-7, E5-~, E5-5,

00-6

B 'Nonnal Operation with ECC with 256 1(7-1, 1(7-8, 1(7-2, 1(7-3, 1(7-7, D6-2,' 00-5, D6-7, D6-8,

w::>ms/ sector 00-6, E5-3, E5-~, E5-5, E5-8, E5-6, D7 -1, D7 -3, D7-~ I

I

D7-5, D7-8, C2-1, C2-7 . . . . .

C Multi CPU operation & nonnal Group "A" & 1(7~~

operation

-D Multi CPU with ECC with 256 w::>rds/sector Group "B" & K7-~

E Optional Data Port or Autoswi tch E5-3, E5-7, E5-~, E5-5, 1(7-7, 00-6

..

F Optional Data Port or Autoswi tch with Group t'E" & D6-2, D6-5, D6-7, D6-8, E5-3, ES-~, E5-5, ECC with 256 w::>rds/sector E5-8, E5:-6, D7-1, D7-3, D7-~, D7-5, D7-B. C2-1. C2-7

i i

G Ph 311 Nonnal Operation K7-1, K7-2, .1(7-3, K7-7,K7-B, E5-3, ES-~, ES-S, E5-7,

D8-7

Note: 1. These switch settings pertain to P.C. Xy1ogics, Inc.

Board

300-031-90X.

2. Unless otherwise specified all other

switches not specified are

in

the '''OFF'' SCALI:

"II

W:;~~~~~

OItAWNIY t>Af'V'-..

position.- DaTI:

1/5/78

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~ SWITCH SE'I'TING SPECIFICATION (PH. 200 Bel. #1) ..., ...

...

0 0

""

2

~ C'I

0 0 DRAWING NUIII.It

11

(26)

c

GROUP

~1I

,~

''"'!

J (IFX)

OESCRIPTION

Normal Operation with ECC with 480 words/sector

Multi CPU' with Ece with 480 words/sector

Normal operation with abort on bad sector

SCALa:

DAft:

Cj

(j

SWITCHES "ON"

K7-l,K7-2,K7-l,K7-7,K7-8,ES-3,ES-4,ES-S E5-6, E5-8,C2-l,C2-7,08-6,07-4,07-6,07-8 06-2,06-5,06-7,06-8

Group H plus K7-4

Group 'A' plus ES-2

Xy1ogics,· Inc.

APPROVED .Y:'

DMWNeY OAN

1/5/78 Wally Kewriga

IIIftIUD

SWITCH SETTINGS SPECIFICATION (PH.200 Bd. #llzt

DRAWING NUIIa'R

(27)

TAB TAB DESCRIPTION DWO ECO • APPD DATE

REV NO REV

E2

900

5TD WITH 50

p\W

A

0192

LU~

\~19'77

1~2 90l

STD MCPU

WIT ...

60 PIN

8

OIQ2. (ALL TA8S)- ~~ IlJ(3177

AUTOSWITCH WITH 50 PIN

C.

0197

(All

TAo'S)

\)..fa...

If-J30h)

F2

902

0

o

,~&

(ALL TABS)

W~

').;>3/77

E.2

903

AUTOS\\, 'TCH

e

MCPU W'TH

Of

01t3

(ALl.

TASS)

~

1/30

178

60

paw

Ol

OllS/Oll8A(ALL TABS)

~'"'"

g/u/79

C2.

~O4

'tee

WITH 50

PIW

03

0233 C~OO - g03) ~

4/(hg

ECC MCPU WITH 60

PI~

E

0240

<.

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4/(../78

C,

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F

02G6 (ALL

TABS)

~

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C.2

'lOb

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G

0217

(902)

o.~

(./z8/73

C2

q07

AUTOSWITCH WITH

60

PIN ('1

0282

(900

-901)

~

1/1

'/71

AND MCP\J)

EtC

62.

0308 (ALL TABS) ~ <=)/15/78

C

TOLERANCES

.:I~

X¥bQics

OEM COMPONENT GROUP INC.

CUNLU8 OTHERWISE NOTEDI

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