Broadband
Agenda
•
Introduction
•
Market Dynamics
•
Technology & Equipment
•
Xilinx Solutions
What is Broadband Satellite?
•
Broadband Satellite technology uses a RF satellite link to
provide subscribers with broadband Internet access
– Similar to the technology used in Direct-to-the-Home (DTH)
video broadcast (DirecTV, Dish Network); can coexist
•
Targets users in a location with poor or nonexistent
terrestrial infrastructure
•
Early “one-way” systems capable of up to 400 kbps
download, but used 56 kbps analog modem for upload
•
New “two-way” systems expected to perform at 1 Mbps
download and 500 kbps upload typically
Benefits & Applications
Benefits
• High-speed, always-on
Internet connection
• Access for users in areas with
non-existent or poor terrestrial infrastructure
• Integrated with
Direct-to-the-home TV equipment
• Works well for
broadcast-oriented data traffic
Applications
• High speed Internet access
• Multimedia, elearning, gaming
• Video on Demand
• VPN
Broadband
Drivers & Challenges
•
Drivers
– Demand for high-speed internet in areas with poor or
non-existent terrestrial infrastructure
– Decreasing component costs
– Standardization for increased vendor interoperability
•
Challenges
– Decreasing cost for equipment two-way terminals
– Latency needs to be improved
– Increasing capacity to mitigate shared bandwidth architecture
Revenue Growth & Players
•
Worldwide broadband satellite equipment market
forecasted to grow from $300M in 2000 to $1.6B in 2007*
•
Main Service and Equipment providers
– Hughes Electronics: DirecWay service
• Formerly DirecPC; provider of DirecTV
– Echostar Technologies: Starband service
Technology &
Equipment
Satellite Access Service Provider Hub Station Home User Dow nload Upload PSTN
One-way Architecture
• Home users “dial-up” connection to upload data to the service
provider’s Hub station which forwards the request to the internet
• Requested data is broadcast back to home users via satellite
• Have fast download, but slow upload
– Sufficient for normal web surfing, downloading, video/audio streaming
Satellite Access Service Provider Home User Dow nload Upload
Two-way Architecture
Internet• Satellite transmission in both Download and Upload channels
• Download is a broadcast protocol and Upload is TDMA-based
• Much faster upload speeds compared to one-way architecture
– Good for applications like video conferencing (high-bandwidth, two-way communication)
Standards
•
Proprietary standards
– DSS: Hughes Network Systems (HNS) proprietary
•
Open standard
– DVB consortium standard: DVB (ETS 300-421)
– Recently proposed DVB Return Channel over Satellite
(DVB-RCS) as the standard for the return channel on newer two-way systems
Satellite Access Equipment
•
Subscriber Side Ground Terminal
– Outdoor Unit (ODU)
• A small (~2-3 ft diameter), low-cost dish antenna with transmit and receive components placed at the focal point of the antenna
• Receives/sends data from/to the satellite in two-way systems
• One-way systems use a dish for download direction only
• Needs to face the southern sky for proper transmission
– Indoor Unit (IDU)
• A Satellite Modem which serves as an interface between the ODU and customer equipment and controls satellite transmission
• Analog Modems are used in one way systems to upload subscriber data to the ISP via the PSTN
Satellite Access Equipment
•
Service Provider Ground Station (Hub)
– Outdoor Unit
• Dish antenna (15-36 feet) and transmit/receive operate similarly to subscriber terminals
– Indoor Unit (Access Server/Gateway)
• The equipment which demodulates an incoming signal from the ODU carrying IP packets and sends the packets to local network
• Traffic could be transported to the Internet, over a VoIP gateway to the PSTN, to a local cache, from a streaming server, etc.
• Network Management System (NMS) is the portion of the satellite server that manages the activity at the Hub
Satellite Access Equipment
•
Spacecraft
– High-power, Geostationary Earth Orbit (GEO) satellite located
at 23,800 mi. above the equator and operating typically in the Ku-band (11-14 Ghz) and/or Ka-band (20-30 Ghz)
Xilinx – The PLD Industry
Leader
The Spartan-3 Platform
World’s Lowest Cost FPGAs
Spartan-3 Family MatrixDevice XC3S50 XC3S200 XC3S400 XC3S1000 XC3S1500 XC3S2000 XC3S4000 XC3S5000
System Gates 50K 200K 400K 1000K 1500K 2000K 4000K 5000K
Logic Cells 1,728 4,320 8,064 17,280 29,952 46,080 62,208 74,880
Block RAM Bits - 216K 288K 432K 576K 720K 1,728K 1,872K
Distributed RAM Bits 12K 30K 56K 120K 208K 320K 432K 520K
Max Single Ended I/O 124 173 264 391 487 565 712 784
Max Differential I/O 56 76 116 175 221 270 312 344
Availability NOW 2H 03 2H 03 NOW 2H 03 2H 03 2H 03 2H 03
Volume Pricing < $20* < $100*
Device XC3S50 XC3S200 XC3S400 XC3S1000 XC3S1500 XC3S2000 XC3S4000 XC3S5000
System Gates 50K 200K 400K 1000K 1500K 2000K 4000K 5000K Logic Cells 1,728 4,320 8,064 17,280 29,952 46,080 62,208 74,880 Block RAM Bits - 216K 288K 432K 576K 720K 1,728K 1,872K Distributed RAM Bits 12K 30K 56K 120K 208K 320K 432K 520K Max Single Ended I/O 124 173 264 391 487 565 712 784 Max Differential I/O 56 76 116 175 221 270 312 344 Availability NOW 2H 03 2H 03 NOW 2H 03 2H 03 2H 03 2H 03 Volume Pricing < $20* < $100* 3 Devices Under $10* 1 Million Gates 391 I/Os Under $20* 4 Million Gates 712 I/Os Under $100*
Low Cost Spartan-IIE FPGA
Total Cost Management for Consumer Products
• No obsolete inventory • Extend product life
through design upgrades
• Cost-optimized silicon and packaging • Hardware software
co-development • Fewer engineer-ing man hours • No NRE
CLB IOB CLB CLB CLB IOB IOB IOB CLB CLB CLB CLB CLB CLB CLB CLB CLB IOB CLB CLB CLB IOB B R A M DLL DLL IOB CLB CLB CLB CLB CLB CLB CLB CLB CL I O B CL I O B I O B I O B I O B B R A M DLL CLB IOB CLB CLB IOB IOB IOB B R A M CLB CLB CLB CLB B R A M CLB CLB CLB CLB I O B I O B I O B I O B I O B I O B CL CL B R A M I O B CLB DLL B R A M IOB 2ns 2ns 2ns CLB Tiles • Fast, predictable interconnect CLB Differential I/O • 400 Mbps • LVDS • Bus LVDS • LVPECL I O B
Delay Lock Loops
• 200+ MHz performance
• 4 DLLs in every device
• Deskew 4 system Clks
• Zero-delay clock conv.
CLKIN CLKFB RST CLK0 CLK90 CLK180 CLK270 CLK2X CLKDV LOCKED DLL Dual-Port 4Kbit BRAM Port B Block RAM • Up to 64Kbits • 200 MHz B R A M System I/OTM • 19 signaling standards • Chip to Backplane • Chip to Memory • Chip to Chip IOB
Viterbi Decoder Tuner Interface Flash System Interconnectivity CPU RAM QPSK/BPSK Demodulator Synch & De-Interleaver Reed-Solomon Decoder Descrambler Clock MPEG Transport & A/V I/O
Decryption Video Encoder MPEG A/V FIFO ADC
Quadrature Data from Tuner
Clock Generator Q - Channel Input I - Channel Input ADC De-Interleaver RAM
Xilinx in Satellite Modems
USB Controller
Data
ODU
Spartan-IIE Device Functions
• 32-bit soft processor
– MicroBlaze
• Processor interface
– Control registers, watchdog timer
• Data buffering
• USB 2.0 controller interface
– Bus arbitration, FIFO control, DMA control
• 32-bit CRC check for
incoming packets
• PCI target interface
– Lets RISC chip take over host processor functions
• 10/100 MAC
– Used to interface Satellite gateway to the 10/100 local network
• Encryption
Soft Processor Solution
•
Runs at 150Mhz, delivering 100 D-MIPS and features
Harvard style 32-bit RISC architecture
– More than three times the D-MIPS speed and half the density
of the nearest competitor
– Full 32-bit operands, 32-bit data path and 32-bit registers
providing maximum performance
– Supports both on-chip BlockRAM and/or external memory
•
Designed with compatibility and reuse in mind
– Standard set of peripherals use the same CoreConnect OPB
Block Diagram
Off-Chip Memory 0-4GB Off-Chip Memory 0-4GBMachine Status Reg
Program Counter Data Bus Controller Register File 32 x 32bit r0 r1 r3 1 Address side LMB CoreConnect OPB I/F CoreConnec t OPB I/F TM TM Data Side LMB UART Timer / Counters Interrupt Controller General Purpose I/O Watchdog Timer Instruction Buffer Inst ruct ion Bus Cont roll er Control Unit Multi ply Multipl y Add / Subtract Shift / Logical Multiply PROCESSOR PERIPHERALS I-LMB I-OPB D-OPB D-LMB
MicroBlaze Features
• Processor– Powerful 32-bit RISC architecture
– Efficient Harvard-style busses
– Efficient 3-operand instruction word
– 100 D-MIPS (Dhrystone 2.1)
– 32-bit data path (non-multiplexed)
– 32-bit general purpose registers (32 registers)
– Fast operation – 125MHz on Virtex-II (-5) FPGAs
– Minimal logic requirements – uses less than 900 Logic Cells
– IBM CoreConnect bus for interconnect • Peripheral set: – UART, GPIO – Timer/Counter – Interrupt Controller – Watchdog Timer
– External Flash and SRAM interface
– Arbiter
– 10/100 Ethernet MAC
– SPI
– IIC
• Internet Reconfigurable Logic (IRL)
– Allows change of hardware design remotely over any network
Satellite Hub Gateway
Ethernet MAC/PHY Satellite Modem PSTN VOIP Switch Internet Router Streaming ServerSatellite Hub Gateway
Network Mgmt. Server
Virtex-4 Breakthrough Innovation:
Embedded Hard IP
200,000 Logic Cells 0.6-10.3125 Gbps RocketIO™ Transceivers PowerPC®Processor with APU
10/100/1000 Ethernet MAC 500 MHz XtremeDSP™ Slice 1 Gbps SelectIO™ with ChipSync™ AES Secure Chip
Design Security
500 MHz BRAM with FIFO & ECC 500 MHz Xesium™
Multiple Platforms
Endless Possibilities
LX Platform Highest logic density &
performance
SX Platform Unrivaled DSP
performance
FX Platform
Only FPGA with hard µP & serial transceivers Logic Memory DCMs DSP Logic Memory DCMs DSP Logic Memory DCMs DSP RocketIO PowerPC
Choice of 17 Devices
24 4 2 192 896 20 9,936 142,128 XC4VFX140 20 4 2 160 768 12 6,768 94,896 XC4VFX100 16 4 2 128 576 12 4,176 56,880 XC4VFX60 12 4 2 48 448 8 2,592 41,904 XC4VFX40 8 2 1 32 320 4 1,224 19,224 XC4VFX20 -2 1 32 320 4 648 12,312 XC4VFX12 -512 640 8 5,760 55,296 XC4VSX55 -192 448 8 3,456 34,560 XC4VSX35 -128 320 4 2,304 23,040 XC4VSX25 -96 960 12 6,048 200,448 XC4VLX200 -96 960 12 5,184 152,064 XC4VLX160 -96 960 12 4,320 110,592 XC4VLX100 -80 768 12 3,600 80,640 XC4VLX80 -64 640 8 2,880 59,904 XC4VLX60 -64 640 8 1,728 41,472 XC4VLX40 -48 448 8 1,296 24,192 XC4VLX25 -32 320 4 864 13,824 XC4VLX15 RocketIO transceiver 10/100/ 1000 EMAC PowerPC XtremeDSP Slice SelectIO DCM Block RAM [Kb] Logic Cells DeviceVirtex-II Pro FPGA
Virtex-II Series Expanded to
Include Virtex-II Pro FPGA
• Virtex-II Logic, Routing, Features
– Upward compatible, same design tools
– Embedded Multipliers, SelectIO-Ultra (with 840Mbps LVDS), DCI/XCITE, DCM
• Up to 24, 3.125 Gbps serial transceivers
– Channel bonding, 8b/10b encoding – Supports high-speed interfaces inc GbE, 10GbE (XAUI), PCI/PCI-X, Infiniband, RapidIO, HyperTransport, FlexBus 3/4, POS-PHY 3/4
• Up to four IBM 405 PowerPC®
– 32-bit RISC CPU: 420 DMIPS @ 300 MHz – The leading embedded CPU
architecture in telecom & networking infrastructure – IBM CoreConnect™ on-chip bus
Virtex-II Pro Enables Transition
from Parallel to Serial I/Fs
SelectI/O-Ultra™
technology for parallel interfaces
Rocket I/OMulti-Gigabit Serial Transceivers
Up to Twenty Four 3.125 Gbps transceivers
32b @ 78 MHz
32b @ 78 MHz Gb Serial
Transceiver TransceiverGb Serial
Reg Reg DDR mux 3-State OCK1 OCK2 Reg Reg DDR mux Output OCK1 OCK2 PAD Reg Reg Input ICK1 ICK2 IOB P N DDR FF IOB • 25 I/O Standards • XCITE Technology • 840 Mbps LVDS • Dedicated DDR Registers
• Helps preserve investment in legacy designs
Virtex-II Platform FPGA
The Winning Architecture
Virtex-II Platform FPGA
The Winning Architecture
• BlockRAM
• XtremeDSP™ - multipliers
• DCM™
• XCITE technology - DCI
• SelectIO-Ultra™
• BlockRAM
• XtremeDSP™ - multipliers
• DCM™
• XCITE technology - DCI • SelectIO-Ultra™
• #1 FPGA architecture
• 150 nm 8-layer metal CMOS
• Advanced logic & routing
• Highest density in the industry
• Embedded Dual Port RAM
• #1 FPGA architecture
• 150 nm 8-layer metal CMOS • Advanced logic & routing
• Highest density in the industry • Embedded Dual Port RAM
Virtex-II Features
50 : Impedance Controller Digital Clock Management (DCM) -Precise Clock clock signal control signal CLKIN RST CLK0 CLK90 CLK180 CLK270 CLKDV LOCKED CLKFX180 PSEN CLKFX PSDONE CLK2X180 PSINCDEC STATUS[7:0] DSSEN PSCLK CLK2X CLKFB 18 Bit 18 Bit Embedded DSP functionality - up to 500 Billion MAC/s 50 : 36 Bit Active Interconnect Technology with a 300 MHz 0 500 1000 1500 2000 2500 3000 3500 4000 0 200 400 600 800 1000 LUTs Reached Del a y (ps) 4000XL Virtex Virtex-II Φαστεστ ΦΠΓΑ ον τηε Πλανετ SelectIO™ 25 IO types including XCITE Digitally-ControlledImpedance (DCI) for simpler PCB layout
BRAM
Embedded DualPort RAM -for Data Buffering
Supporting Legacy &
Evolving System Interfaces
PCI 32/64 10/100 Ethernet (MII) Proprietary RapidIO POS-PHY L3/L4 FlexBus 3/4 CSIX HyperTransport SPI4 Phase1, Phase2 Gigabit Ethernet - GMII 10 Gbit Ethernet (XGMII)840Mbps LVDS Proprietary QDR SRAM NoBL/ZBT SRAM SDR/DDR SDRAM FCRAM Sigma RAM RLDRAM CAMs Xilinx Virtex-II Pro FPGAs Serial RapidIO Infiniband 3GIO/Arapahoe Fibre Channel
Optical Networking Related
Soft IP Available Today
• Networking / Telecom
– 1/10Gb Ethernet MACs - XAUI, XGMII – 10/100 Mbps Ethernet MACs
– T1/E1 Framer/De-framer – UTOPIA Level-2/3 PHY-ATM
– Network Classification Processor (2.5Gbps) – HDLC Controller
– 8b/10b Encoder Decoder – Cell Assembler/Delineation – CRC10/32 Generator/Verifier – ADPCM 16 - 1024 channels
• 32-bit Xilinx Soft Processor: MicroBlaze
• 8-/16-bit Microcontrollers
• SystemIO Interfaces
– RapidIO
– PCI-X 64-bit / 100 MHz – PCI 32/33, PCI 64/66
– SPI-3, SPI-4 P1/P2, FlexBus 3/4, POS PHY L3/L4, SFI-4
– CSIX, HyperTransport, 3GIO, Fibre Channel, Infiniband
• High-Speed Memory Interfaces
– SRAM - ZBT, QDR – DDR SDRAM – CAM
• Encryption
Summary
•
Satellite Internet Access is a growing segment of the
larger Broadband Access market
– Is considered a niche market compared to DSL and Cable
Access, but still significant
•
Xilinx provides Silicon and IP solutions for Satellite
Broadband equipment at the SP and Customer Premises
– Spartan IIE series of FPGAs is a solution for designs requiring
low cost and high volume, e.g. modem
– Virtex-II & Virtex-II Pro are solutions for high-end designs
requiring highest density and performance, e.g. gateway