Interfacing With Microprocessor

MICROPROCESSOR BASED SOLAR TRACKING SYSTEM USING STEPPER MOTOR

Jyotirmay Gadewadikar

B. E. Final Year (Electronics), S.G.S. Institute of Tech. & Science, Indore

This project uses a stepper motor to control the position of

solar energy collectors, using Intel 8085

m

p . The software

includes the positioning of collectors through stepper motor &

data acquisition and processing in Microprocessor.

OPTICAL SENSING AND PROCESSING :

LDR ( Light Dependent Resistance)

is used as a sensor for generating an

electric signal proportional to

intensity of light falling on it. LDR

is mounted at the focus of reflector

which is directly mounted on solar

energy collectors.

L.D.R. SIGNAL PROCESSING CIRCUIT

STEPPER MOTOR AND ITS

DRIVING CIRCUIT

The stepper motor requires that its

stator windings should be energized

in a programmed sequence to cause

the motor to run in a given

direction and with a required speed.

Hardware design can be categorized into two parts

(a) Logic sequence generating circuit (b) Driving Circuitry

LOGIC SEQUENCER CIRCUIT +5V +5V 11 16 14 7 7486 7404 4 2 14 +5V 1 3 TO GREEN TO BLUE TO ORANGE TO RED 1 2 3 3 14 7 4 1 9 1 5 QA QB LOAD ENABLE DOWN/UP CLOCK 2 8 4

Interfacing With Microprocessor

EXPANDER PORT ONE

EXPANDER PORT TWO Vcc B7 A7 B7 D0 A B C START ALE OE EOC B0 A0 C0 C7 C7 CLK GND. TO LDR. CIRCUIT A D C 8 0 9

THE TRACKING SOFTWARE

MAIN PROGRAM

M : MEMORY LOCATION DENOTED BY REG. PAIR BC

S T A R T

LOAD M WITH 9200 LOCATION FOR STORING O/P OF ADC. LOAD 9240 WITH 004

INITIALIZE 8255 A AND 8255 B SELECT ANALOG INPUT CHANNEL ZERO

JUMP TO SUBROUTINE

READ DIGITAL O/P AT PORT B OF 8255 B AND STORE IT INTO ACC. MAKE OE LINE OF ADC LOW TO

ENABLE OUTPUT LINES

LOAD CONTENT OF M INTO ACC. ACC. CONTAINS PREVIOUS VALUE

NO

NO NO

YES

YES _END YES

LOAD REG H WITH PRESET MIN. DIFFERENCE BETWEEN

SUCCESSIVE VALUES OF ADC. INCREASE M LOCATION BY ONE

MOVE CONTENT OF LOCATION M FROM ACC. MOVE CONTENT OF REG D

INTO ACC. TRANSFER CONTENT OF ACC. INTO

REG. D (NEW VALUE)

MOVE CONTENTS OF C INTO ACC. SET THE CARRY TO ONE

LOAD ACC. WITH THE CONTENT OF LOCATION M MOVE CONTENT OF ACC.

TO D REG

GO TO REVERSE MOTOR ROTATE

FORWARD MOTOR ROTATE FORWARD MOTOR ROTATE

S T A R T S T A R T LOAD THE REG. H WITH 00H LOAD THE REG. H WITH 00H

MAKE P1C1 LINE OF 8255A LOW FOR COUNT UP MODE

DELAY OF 0.125 SECONDS DELAY OF 0.125 SECONDS

MAKE PICO LINE OF 8255A LOW MAKE P1C0 LINE OF 8255A LOW

DELAY OF 0.125 SECONDS DELAY OF 0.125 SECONDS

INCREMENT REG. H BY ONE INCREMENT REG. H BY ONE

LOAD A WITH 04 H NO NO YES YES RETURN RETURN

REVERSE MOTOR ROTATE

START MAKE P1C0 LINE OF 8225 A HIGH DELAY OF 0.125 SECONDS MAKE P1C0 LINE OF 8255 A LOW DELAY OF 0.125 SECONDS LOAD A WITH 04H INCREMENT REG. H BY ONE LOAD THE REG. H WITH OO4 MAKE P1C1 LINE OF 8255 A HIGH FOR COUNT DOWN MODE

DELAY OF 5 MINUTES READ THE ADC READ THE DIGITAL O/P OF PORT B

OF 8255 B AND STORE IN A TRANSFER THE CONTENTS OF A TO

MEM. LOCATION POINTED BY BC GO TO SUBROUTINE NO

YES

START

DISABLE THE OUT PUT ENABLE OE OF ADC

CALL FORWARD MOTOR ROTATE

MAKE ALE AND START LINES OF ADC HIGH

MAKE START LINE LOW

READ THE LINE P2C6 (EOC) LINE OF ADC

JUMP TO THE INSTURCTION NEXT TO THE SUBROUTINE CALL INSTRUCTION IN MAIN PROG.

NO

YES

SUBROUTINE

MICROPROCESSOR BASED FIBRE OPTIC PRESSURE SENSOR

Jyotirmay Gadewadikar, Department of Electronics, Shri Vaishnav Institute of Technology & Science, Indore.

The system works on the principle of micro bending of optical fibres. Low cost, constructional simplicity, versatility and microcomputer compatibility are some of the important features of the proposed device. The design of the

instrument involves a fibre optic sensor, hardware and software parts.

Principal of Operation:

Loss of optical signal inside the fibre when pressure is applied on the surface of a monomode optical fibre is known as microbending losses.

Microbending loss for monomode fibres is related by expression. µ ~ wo2+4p

p = 0,1,2…..n, n being a positive integer.

wo = Spot Size, µ= Attenuation coefficient.

Hardware design details:

Sensor : The sensor used for pressure measurement is based on microbending principle. The sensor has 2 ft. long fiber of 50 micrometer core diameter. The Fibre is placed between two corrugated surfaces, out of which the upper one is movable and the lower is fixed. Optical power is taken from a 6.0 V drywell torch bulb and is given to the core of the fibre. On application of continuous physical pressure varying from .02 Kg/cm2 _{to 20 Kg/cm}2 _{on the upper}

surface, the fibre undergoes a proportional microbending resulting into losses and attenuation of the optical signal. A pin photodiode(SI 100S) acts as photo detector at the receiving end of the fibre.

Signal Conditioner : Signal from photo detector is amplified through a DC Amplifier using OPAMP 741. The analog amplified output needs to be converted to Digital Signal before it is applied to a Microprocessor which is done through ADC 0809.

Microprocessor Interfacing Circuit: ADC is interfaced with an 8 bit Intel 8085 mP via a programmable peripheral interface( Intel IC 8255). Clock for ADC is taken from mP after manipulation using a monolithic decade counter ( IC 7490).

Pressure Indication Circuit : ICMAN74A, a common Cathode display Chip is used for automatic display. The circuit includes a LED decoder/driver IC 74LS48P to interface the 7 Segment display with the I/O IC 8255.

Software:

1. Control word is defined as 98H (Port A, B, Cupper, Clower defined as the

i/p port in mode 0, o/p port in mode 0,i/p port, o/p port resp.)

2. Control word is read from the input bus lines if MODE is high and WRITE is low.

3. After the control word has been written into the control register, the display data is written into memory with each successive negative going WRITE pulse.

4. After all 8 digit memory locations have been written addnl transitions of WRITE are ignored. Pressure data converted into binary codes and subsequently into Hex-decimal

5. The IC 1 : 7490 MONOLITHIC COUNTER IC 2 : ADC 0809 IC 3 : OPAMP A741 IC 4 : INTEL 8255 PPI IC 5 : 74LS48P DECODER / DRIVER IC 6 : MAN 74A 7-SEG. DISPLAY

1 5 2 3 6 7 V + 11 10 CC O/E + 5V D.C. 216 6 1 M 1 M DIGITAL DATA IC 4 36 35 PORT CUPPER PB 0 PB 1 PB 2 PB 3 PORT CLOWER 26 6 5 INTEL 8085 UP +5V D.C. 16 IC 5 IC 6 7 1 2 6 8 14 .... .. 27 WR RESET EDC PC3 PC2 PC1 PC0 10 IC 2 21 20 19 18 17 15 14 8 7 6 22 23 24 25 9 3 13 10 12 8 11 6 10 5 9 4 14 2 15 15

numbers and are stored into a look up table.

data received from the online sensor is compared with prestored look up table.

y subroutine is called.

RESULTS & CONCLUSIONS:

he developed instrument was subjected to different magnitude of applied

6. Displa

T

pressure, it is observed that output of amplifier decreases almost linearly in 5

6

ts

)

A. I. - A REALITY JYOTIRMAY GADEWADIKAR

logy & Science, Indore

BSTRACT

The Computers have invaded into every walk of life. Almost in ery other situation computers are being used as an

s &

non-ore concerned with the application of Artificial Intelligence in such fields where A.I. is realized in a much effective

COLD ROLLING MILL AUTOMATION

L. P. Halway (D ar(Sr. Officer)

ABSTRACT

n Steel industry is employing new information technology solutions as a part of facility vamp

evel 4 Sales & Distribution, manufacturing Planning, Financials, Plant maintenance, evel 3 Production Planning & Control, Quality Control, Energy

evel 2 Material Tracking, Process Optimization, SCADA. evel 1 Direct control Through PLC, RTU etc.

ata Steel is in the process of implementation of a complex IT and automatic solution for its new

i) Use the existing IT set-up and

chnology solutions for the new

his presentation addresses the information architecture in the context of a steel plant,

e plant e

B.E. IV Year Electronics S. G. S. Institute of Techno

A

ev

indispensable tool. The problem / processes which are complex in nature, involve number of inter-dependent variable

linearities which can be solved to some extent with the help of Micro-Processors based systems/controllers. However, they are insufficient to the extent that they fail to generate any control signal in situations which are not defined or unknown under such circumstances, A.I. seems to resolve the problems in a much effective way. Today A.I. has been used in disciplines like Military, Space, Medicine and Process Industry where conventional methods do not give sufficient precision & are theref not suitable.

This Paper is way.

ept. Manager), Jyotirmay Gadewadik C R M Complex, Tata Steel

India

re ing programme to meet the challenges of the twenty-first century. The information technology reaches obsolescence much before the manufacturing technology it supports. Hence it is extremely important to employ IT architecture which would protect investment, allow-incremental development and scalability, and ensure lower cost of ownership. This presentation makes an attempt to primarily address issues related to computerization and automation and explain an IT architecture classifying into Four Levels of Automation that can sustain the IT requirement for a long period.

L

costing Transportation L

management, Conditioning Monitoring, Process MIS L

L T

CRM at Jamshedpur. The new plant is integrated with its hot strip mill. So is its new information system, called CRMIS. There are many design trade-offs to

(

(ii) Implement best-of-breed new te plant.

T

particularly, CRM. Implementation of the manufacturing applications and integration of th

applications along with the Supply chain and Customer relationship management solutions are th biggest challenges to the Information System departments of all steel plants at present.

CPU Design.

Abstract: Control, ALU and External Memory Block description, performance verification using VHDL and RTL

CPU (cpu.vhd) consists of 2 sub-blocks:

synthesis tools. Control block handles the state machine for the memory interface and ALU functions.

A

1. CONTROL (control.vhd)

2. ARITHMETIC (alu.vhd)

CONTROL

ALU

MEMORY

256 x 16

CPU

An external memory model is

The CPU performs the following operations: Idle, Add, Subtract, AND, NOT, Load memory to Register, he ALU contains an 8 word by 16 bit register file and handles the arithmetic and logical operations. The

2,

he control block handles the state machine for the memory interface and ALU functions. The control will he Load command will take a word from external memory, addressed by a field in the instruction word,

s s track of the external

d Store register to memory, and Jump. (See next page.)

T

selection of which register words the operation is performed on comes from the instruction source1, source and destination fields. For example if an addition operation with source1=0 and source2=5 and the destination=1, then the register words 0 and 5 are added together and the result placed in register 1. T

handle all memory read, write, and chip select control outputs. T

and store it in a word of the 8x16 register block, indexed by the destination register. These Load operation allow the internal registers to be filled before ALU operations are performed.

The instructions are loaded from the external memory. The control block keep

memory instruction address. The Store instruction will take a word from the internal register block an store it in external memory. A Jump instruction will change the memory instruction address.

Instruction format INSTR(15 downto 0):

15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 <- OP -> <-DEST-> <-SRC1-> <-SRC2->

<--- MEM ADDRESS --->

OP = INSTR(15 downto 13) :

000 => IDLE -- ALU does nothing, control gets next Instr.

nto 0))

1 => JMP -- InstrReg <= 001 => ADD -- Reg(DEST) <= Reg(SRC1) + Reg(SRC2)

010 => SUB -- Reg(DEST) <= Reg(SRC1) - Reg(SRC2) 011 => AND -- Reg(DEST) <= Reg(SRC1) AND Reg(SRC2) 100 => NOT -- Reg(DEST) <= NOT Reg(SRC1)

101 => LD -- Reg(DEST) <= MEM(INSTR(7 dow

110 => STO -- MEM(INSTR(7 downto 0) <= Reg(DEST);11

CPU Design

PC

IR

State_r

MEMORY

Control

Addr

Data

CPU

ALU

CONTROL

Clk

Reset

CPU_TB

RF AMPLIFIER DESIGN

Jyotirmay Gadewadikar

Graduate Student, University of Texas at Arlington

Abstract : A 1 GHz RF Amplifier has been designed using NPN BJT. Amplifier is unconditionally stable in the given frequency range achieving the required gain, harmonic balance analysis is performed using a large signal input power source.

The objective of this project is to design a Stable Class A power amplifier using a BJT and meeting the following specifications.

Transistor Biasing:

· VCC : 8 Volts.

· IC : 3 mA.

· VCE :3V.

The Transistor model is required to include the package parasitics along with the raw device model.

Amplifier:

· Center Frequency: 1GHz.

· Gain: 7dB < G < 8dB.

· Bandwidth: 400 MHz.

· Stable Range: 600 MHz to 6 GHz.

· Input and Output Impedances: 50 W.

Software Tools:

The software used for this project is HP-ADS (Advanced Design System) developed by Agilent Technologies Inc.