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PS 431

Time-Overcurrent Protection

Device

1 PS 431 in case for wall surface or panel flush mounting

Numerical Time-Overcurrent Protection with

Definite -Time and Inverse -Time Characteristics

PS 431 time-overcurrent

protection devices are used

for selective short-circuit

protection in high-voltage

networks.

The networks can be

opera-ted with impedance neutral

grounding, with resonant

grounding or with an isolated

neutral.

The PS 431 time-overcurrent

protection device has the

following features:

❑ Four-pole measurement

(A, B, C, N)

❑ Phase-selective phase

current timer stage with

DTOC and IDMT

characte-ristics (IDMT can be set to

normally inverse, very

inverse, extremely inverse,

long time ground fault or RI

inverse)

❑ Time-lag high set phase

current timer stage

❑ Residual current timer

stage with DTOC and IDMT

characteristics (IDMT can

be set to normally inverse,

very inverse, extremely

inverse, long time ground

fault or RI inverse)

❑ Time-lag high set residual

current timer stage

❑ Tripping matrix

❑ Optional latching of the

individual tripping criteria

❑ Possibility of reverse

inter-locking

❑ Circuit-breaker failure

protection

The protection functions

listed above are

complemen-ted by comprehensive

self-monitoring and fault

diagno-sis. In addition, the PS 431 is

equipped with the following

supplementary functions:

❑ Measuring circuit

monito-ring

❑ Operating data

measure-ment

❑ Event counting

❑ Fault data acquisition

❑ Fault logging

The PS 431 is constructed

with a multifunctional case

design that is equally well

suited to wall surface

moun-ting or panel flush mounmoun-ting

due to the reversible terminal

blocks and reversible

moun-ting brackets.

The auxiliary voltage for the

power supply can be

separa-tely switched internally from

110-250 V DC to 24-60 V DC.

The binary signal inputs may

be operated with control

voltages of 24-250 V DC.

Current measurement inputs

having a frequency range of

45-65 Hz, input transducers

with 1 A and 5 A taps, and

the surface-mounting design

provide for optimum use and

versatility without variance.

The PS 431 has the following

inputs and outputs:

❑ 4 current measurement

inputs

❑ 2 binary signal inputs

(optical couplers) with

freely configurable function

assignment

❑ 4 output relays with freely

configurable function

assignment

Control and display:

❑ Local control panel

❑ 8 LED indicators, including

6 with freely configurable

function assignment

❑ PC interface

Parameters may be set either

from the local control panel or

through the PC interface, as

desired.

(2)

PS 431 Time-Overcurrent Protection Device

Functions

Definite or

Inverse Time-Delay

Short-Circuit Protection

The PS 431 time-overcurrent

protection device is generally

equipped with four current

measurement inputs A, B, C

and N.

DTOC Mode

In DTOC mode (Definite Time

Overcurrent), PS 431 has the

following overcurrent timer

stages:

❑ Phase-selective phase

current timer stage I>/t

I>

❑ Residual current timer

stage I

N>

/t

IN>

❑ High set phase current

timer stage I>>/t

I>>

❑ High set residual current

timer stage I

N>>

/t

IN>>

The effect of the timer stages

measuring in the ground path

on the general starting signal

and therefore on the start of a

fault record can be

suppres-sed, if desired. Formation of

the general trip command by

the residual current timer

stages is then automatically

disabled.

All threshold operate values

and lag times can be set

independently.

Normally inverse t = · ––––––––––– s Very inverse t = · ––––––––––– s Extremely inverse t = · ––––––––––– s Long time ground fault

t = · ––––––––––– s RI inverse t = · ––––––––––– s 2 Inverse-time characteristics characteristic factor characteristic factor characteristic factor characteristic factor characteristic factor 0.14 0.339 – ––––– (I /Iref) – 1 80 13.5 120 1 (I /Iref) 0.236 (I /Iref) – 1 (I /Iref)0.02 – 1 (I /Iref)2 – 1

IDMT Mode

In the IDMT (inverse definite

minimum time) mode the

phase current timer stage t

I>

and/or the residual current

timer stage t

IN>

are delayed

by an inverse time lag. The

other stages and functions

correspond to the DTOC

mode.

For inverse-time delay the

following tripping time

cha-racteristics can be selected:

❑ Normally inverse

❑ Very inverse

❑ Extremely inverse

❑ Long time ground fault

❑ RI inverse

The mode, base current,

characteristic type and

cha-racteristic factor can be set

independently for the phase

current timer stage and the

residual current timer stage.

Tripping Matrix and Latch

The tripping matrix is used to

decide which of the

individu-al overcurrent timer stages

shall participate in forming

the general trip command.

The phase-selective phase

current timer stage is

perma-nently assigned to the

gene-ral trip command; this cannot

be changed. Another matrix

is used to determine which of

the individual tripping criteria

shall result in latching of the

general trip command.

The function of circuit

brea-ker failure protection is also

considered in the tripping

matrix and in the matrix for

setting the latching function.

Reverse Interlocking

The individual overcurrent

timer stages can be blocked

externally by way of two

independent signals. In this

connection it is possible by

using the selection matrix to

determine which of the timer

stages shall be included in

the blocking. This makes it

possible to add on a feature

such as reverse interlocking,

for example (”busbar

protec-tion with starting the

corre-sponding scan”).

(3)

PS 431 Time-Overcurrent Protection Device

Functions

(continued)

Cir

Cir

Cir

Cir

Circuit Br

cuit Br

cuit Br

cuit Br

cuit Breaker Failur

eaker Failur

eaker Failur

eaker Failur

eaker Failure

e

e

e

e

Pr

Pr

Pr

Pr

Protection

otection

otection

otection

otection

When the trip command is

issued a timer stage for

monitoring the circuit breaker

is also started. When this

timer stage has elapsed due

to a sustained general

star-ting condition, then the circuit

breaker failure signal is

issued.

The input of a circuit breaker

failure signal through an

appropriately configured

binary input brings about a

non-delayed trip command if

the general starting signal is

present.

Measuring Cir

Measuring Cir

Measuring Cir

Measuring Cir

Measuring Circuit

cuit

cuit

cuit

cuit

Monitoring

Monitoring

Monitoring

Monitoring

Monitoring

Measuring circuit monitoring

of the phase currents is

based on the principle of

maximum allowable

magnitu-de unbalance. In this case

the arithmetic difference

between the maximum and

minimum phase currents as

referred to the maximum

phase current is compared

with the set threshold operate

value. With the appropriate

settings it is also possible to

monitor the phase currents

even with an economy-type

CT connection (CTs in only

two phases).

Operating Data

Operating Data

Operating Data

Operating Data

Operating Data

Measur

Measur

Measur

Measur

Measurement

ement

ement

ement

ement

The PS 431 time-overcurrent

protection device acquires

the following measured

operating data and updates

them at approximately 1 s

intervals, as long as a fault is

not being processed at the

time:

❑ Maximum value of the

three phase currents

❑ Phase currents

❑ Residual current

The measured data are

displayed as r.m.s. values

and are normalized to the

corresponding nominal value

of the protection device.

Event Counting

Event Counting

Event Counting

Event Counting

Event Counting

The following events are

counted by the PS 431

time-overcurrent protection

de-vice:

❑ Tripping on faults

❑ Faults

❑ Warning entries

Fault Data Acquisition

Fault Data Acquisition

Fault Data Acquisition

Fault Data Acquisition

Fault Data Acquisition

After the end of a general

starting condition, the

follo-wing measured fault data are

acquired:

❑ Running time

❑ Short-circuit current

Fault Logging

Fault Logging

Fault Logging

Fault Logging

Fault Logging

Protection signals at the time

of a fault are stored in

chro-nological order. A total of five

faults with a maximum of 64

start/end signals each, can

be held in a circular memory

- the signal memory. If more

than five faults occur and no

faults have been erased in

the interim, the oldest fault

record will be overwritten. A

four-digit resettable counter

identifies the individual faults

by serial number.

The fault records can be read

from the local control panel.

Self-Monitoring

Self-Monitoring

Self-Monitoring

Self-Monitoring

Self-Monitoring

Extensive monitoring routines

in the PS 431 ensure that

internal hardware or software

faults will not lead to

mal-functioning of the protective

relaying system. When the

auxiliary voltage V

A

is turned

on, a function test is carried

out. Cyclic self-monitoring

tests are run during

operati-on. If test results deviate

from the default value, a fault

signal is issued. The result of

fault diagnosis determines

whether a protective blocking

will occur or whether only a

warning will be issued. The

faults diagnosed in

con-junction with self-monitoring

are stored in a memory

(monitoring signal memory).

The contents of the

monito-ring signal memory can be

read from the local control

panel.

(4)

PS 431 Time-Overcurrent Protection Device

Design

3 Local control panel

Mechanical Design

Mechanical Design

Mechanical Design

Mechanical Design

Mechanical Design

The PS 431 consists of an

aluminum case with

reversi-ble connector blocks and

adjustable side brackets.

The case can be used for

wall surface mounting or for

panel flush mounting, as

desired. In either case the

unit is connected by

threaded terminal ends.

The processor module

car-rying the local control panel

is mounted directly on the

rear of the removable front

panel. It is connected to the

combined I/O (input/output)

module by a flat connecting

cable. The I/O module

con-tains the voltage supply, the

input transformers, the output

relays, and the optical

coup-lers for the binary inputs.

In the front panel are

win-dows for the display and

label strips located behind

them. The keyboard for the

integrated local control panel

is also located in the front

panel.

Figure 4 on Page 10 shows

the case and mounting

dimensions.

Local Contr

Local Contr

Local Contr

Local Contr

Local Control Panel

ol Panel

ol Panel

ol Panel

ol Panel

The integrated local control

panel comprises two 4-digit,

7-segment LCD displays and

six function keys. The

set-tings, signals and measured

variables are numerically

coded. This code is called

the address and is displayed

in the lower 4-digit 7-segment

display. Access barriers

safeguard against accidental

or unauthorized changing of

settings.

Eight LED indicators are

provided for visual signaling.

The first two have permanent

signal assignments, while the

other six can be configured

as desired (see Page 9).

The control panel has two

label strips. The strip on the

left is used to label the LED

indicators, and the strip on

the right provides a visual

record of frequently

performed control steps.

Both strips can be replaced

and labeled by the user as

desired.

(5)

PS 431 Time-Overcurrent Protection Device

Technical Data

Type Tests (continued)

Insulation

Voltage test

According to IEC 255-5 2 kV AC, 60 s

For the voltage test of the power supply inputs, direct voltage (2.8 kV DC) must be used.

The PC interface must not be subject-ed to the voltage test.

Impulse voltage withstand test According to IEC 255-5 Front time: 1.2 µs Time to half-value: 50 µs Peak value: 5 kV Source impedance: 500 Ω Mechanical Robustness Vibration test According to IEC 255-21-1, test severity class 1

Frequency range, in operation: 10 to 60 Hz, 0.035 mm, 60 to 150 Hz, 0.5 g

Frequency range, during transport: 10 to 150 Hz, 1 g

Shock response and withstand test, bump test

According to IEC 255-21-2, test severity class 1 Acceleration: 5 g/15 g Pulse duration: 11 ms Seismic test According to EN 60255-21-3, test procedure A, class 1 5 to 8 Hz, 3.5/1.5 mm, 8 to 35 Hz, 10/5 m/s2 3 × 1 cycle

Routine Tests

All tests according to EN 60255-6 and DIN 57 435 Part 303 Additional thermal test

100 % controlled thermal endurance test, inputs loaded

Environmental

Conditions

Allowable ambient temperatures Operating temp.: – 5 °C to + 55 °C Storage temp.: – 25 °C to + 55 °C Shipping temp.: – 25 °C to + 70 °C Ambient humidity range

Relative humidity to preclude any condensation;

45 to 75 % (annual mean)

Notices

Manufacturer’s Conformity Statement The product designated as ”PS 431 Time-Overcurrent Protection Device” has been developed and manufac-tured in conformity with the interna-tional standard series EN 60255-6 and in accordance with the provisions of the Low Voltage Directive issued by the European Community. Membership in ALPHA

AEG and the company that manufac-tures our measurement and protective relays, Hartmann & Braun, are members of the low-voltage equip-ment testing and certification associa-tion called ALPHA (Frankfurt am Main, Germany). ALPHA promotes independent responsibility on the part of the manufacturer and the assur-ance of high product quality through basic process specifications for equipment inspection and testing in compliance with applicable stand-ards. When certain conditions are met, ALPHA also issues officially recognized product certificates if required. Furthermore, ALPHA is working toward international recogni-tion of conformity declararecogni-tions and certificates.

DQS Certificate

The internationally recognized, independent and impartial associa-tion for the certificaassocia-tion of quality assurance systems, DQS (Deutsche Gesellschaft zur Zertifizierung von Qualitätssicherungssystemen), has awarded AEG the DQS certificate, thereby certifying that AEG has introduced and uses a state-of-the-art quality assurance system that complies with all requirements stated in EN ISO 9001 that apply to its products and services.

General Data

Design

Case suitable for wall surface mounting or panel flush mounting. Installation Position

Vertical ± 30° Degree of Protection

IP 51 according to DIN VDE 0470 and EN 60259 or IEC 529 Weight

3.4 kg Dimensions See Page 10

Terminal Connection Diagram See Page 10

PC Interface

DIN 41652 connector, type Submin-D, 9-pin.

A special connecting cable is required for electrical isolation. Terminals

Threaded terminal ends M4, self-centering with wire protection for conductor cross-sections of 0.5 to 6 mm2 or 2 x 2.5 mm2

Creepage Distances and Clearances Per IEC 255-5, series C

Type Tests

All tests according to EN 60255-6 and DIN 57435 Teil 303

Electromagnetic Compatibility (EMC)

Interference suppression According to EN 55022 and DIN VDE 0878 Part 3, class B 1 MHz burst disturbance test According to IEC 255 Part 22-1, class III

Common mode test voltage: 2.5 kV Differential test voltage: 1.0 kV Test duration: > 2 s

Source impedance: 200 Ω Immunity to electrostatic discharge According to EN 60801 Part 2, severity level 3 Contact discharge, Single discharges: > 10 Holding time: > 5 s Test voltage: 6 kV Test generator: 50 to 100 MW, 150 pF/330 Ω Immunity to radiated electromagnetic energy

According to ENV 50140, level 3 Antenna distance to tested device: > 1 m on all sides

Test field strength, frequ. band 80 to 1000 MHz: 10 V/m Test using AM: 1 kHz / 80 % Single test at 900 MHz: AM 200 Hz /100 % Electrical fast transient / burst requirements

According to IEC 801-4, test severity level 3

Rise time of one pulse: 5 ns Impulse duration (50% value): 50 ns Amplitude: 2 kV / 1 kV

Burst duration: 15 ms Burst period: 300 ms Source impedance: 50 Ω Surge immunity test According to IEC 1000-4-5, test level 3

Testing of power supply circuits, unsymmetrically / symmetrically operated lines

Open-circuit voltage front time / time to half-value: 1.2 / 50 ms

Short-circuit current front time / time to half-value: 8 / 20 ms

Amplitude: 1 / 2 kV Pulse frequency: > 5 / min Source impedance: 12 / 42 Ω Immunity to conducted disturbances induced by radio frequency fields According to IEC 65A/

77B (Sec) 145/110, test level 2 Disturbing test voltage: 3 V Power frequency magnetic field immunity

According to EN 61000-4-8, level 4 Frequency: 50 Hz

Test field strength: 30 A/m

Alternating component (ripple) in d.c. auxiliary energizing quantity of measuring relays

According to IEC 255-11 12%

(6)

Definite-Time Overcurrent Protection (DTOC)

Phase Current

Threshold operate value I>: Increments:

0.4-4.0 Inom 0.1

Delay time tI>: Increments:

0.00-9.99 s 0.01

10.0-99.9/∞ s 0.1 Threshold operate value I>>: Increments: 0.4-40.0/∞ Inom 0.1

Delay time tI>>: Increments:

0.00-9.99 s 0.01

Residual Current

Threshold operate value IN>: Increments:

0.05-2.00/∞ Inom 0.05

Delay time tIN>: Increments:

0.00-9.99 s 0.01

10.0-99.9/∞ s 0.1 Threshold operate value IN>>:Increments:

0.10-8.00/∞ Inom 0.05

Delay time tIN>>: Increments:

0.00-9.99 s 0.01

10.0-99.9/∞ s 0.1

Inverse Definite Minimum Time Overcurrent Protection (IDMT)

Phase Current

Base current IB: Increments:

0.40-4.00 Inom 0.01

Characteristic factor: Increments: 0.10-1.00 Inom 0.05

Characteristic type: Normally inverse Very inverse Extremely inverse Long time ground fault RI inverse

Threshold operate value I>>: Increments: 0.4-40.0/∞ Inom 0.1

Delay time tI>>: Increments:

0.00-9.99 s 0.01

Residual Current Base current INB or

Threshold operate value I>: Increments: 0.04-0.40/∞ Inom 0.01

0.08-0.80/∞ Inom 0.01

Characteristic factor: Increments: 0.10-1.00 Inom 0.05

Characteristic type: Normally inverse Very inverse Extremely inverse Long time ground fault RI inverse

Delay time tIN>: Increments:

0.00-9.99 s 0.01

10.0-99.9/∞ s 0.1 Threshold operate value IN>>: Increments:

0.10-8.00/∞ Inom 0.05

Delay time tIN>>: Increments:

0.00-9.99 s 0.01

10.0-99.9/∞ s 0.1

PS 431 Time-Overcurrent Protection Device

Technical Data

(continued)

Inputs and Outputs

Measurement Inputs

Current

Nominal current Inom:

1 and 5 A (terminal choice) Nominal consumption per phase: < 0.3 VA at Inom Load rating: continuous: 4 Inom for 10 s: 30 Inom for 1 s: 100 Inom Frequency

Nominal frequency fnom:

50 or 60 Hz Operating range: 45 to 65 Hz

Binary Signal Inputs

Equipment:

2 optical coupler inputs (freely configurable) Function assignment: see Page 9 Nominal VIn,nom: 24-250 V DC Operating range:

0.8-1.1 VIn,nom with a residual ripple of

up to 12% of VIn,nom

Power consumption per input: 35 mA ± 30% at VIn, nom = 24 V DC

15 mA ± 30% at VIn,nom = 48 V DC

4 mA ± 30% at VIn,nom = 60-250 V DC Output Relays

Equipment:

4 output relays (freely configurable) Function assignment: see Page 9 Contact rating Rated voltage: 300 V DC, 250 V AC Continuous current: 5 A Short-time current: 30 A for 0.5 s Making capacity: 1000 W (VA) at L/R = 40 ms Breaking capacity: 0.2 A at 220 V DC and L/R = 40 ms 4 A at 230 V AC and cos ϕ = 0.4

Local Control Panel

Input or output of protection data: via six keys and two 4-digit displays State and fault signals:

8 LED indicators (2 permanently assigned, 6 freely configurable) Function assignment: see Page 9 PC Interface Transmission speed: 4800 baud

A special PC connecting cable is required for connecting to a PC (see Page 12).

Settings

Global Function Parameters

General Starting without IN> or IN>> with IN> or IN>> Trip Command 1/2 tI> tI> CBF tI> tIN> tI> tIN> CBF tI> tI>> tI> tI>> CBF tI> tI>> tIN> tI> tI>> tIN> CBF

Latching 1/2 without latching CBF tIN> tIN> CBF tI>> tI>> CBF tI>> tIN> tI>> tIN> CBF tI> tI> CBF tI> tIN> tI> tIN> CBF tI> tI>> tI> tI>> CBF tI> tI>> tIN> tI> tI>> tIN> CBF

Trip Command 2/2 without tIN>>

with tIN>>

Latching 2/2 without latching at tIN>>

with latching at tIN>>

Blocking E1 without block tIN>> tIN> tIN> tIN>> tI>> tI>> tIN>> tI>> tIN> tI>> tIN> tIN>> tI>

tI> tIN>> tI> tIN> tI> tIN> tIN>> tI> tI>> tI> tI>> tIN>> tI> tI>> tIN> tI> tI>> tIN> tIN>>

Blocking E2

See selection for blocking E1 Mode for Current Timer Stages Definite-time-lag (DTOC) Inverse-time-lag (IDMT)

Information Output

Operating Data Measurement

Max. phase current Increments IP,max: 0.00-18.00 Inom 0.01 Phase currents IA: 0.00-18.00 Inom 0.01 IB: 0.00-18.00 Inom 0.01 IC: 0.00-18.00 Inom 0.01 Residual current IN: 0.00-3.50 Inom 0.01 Event Counting

Number of trip commands: 0 to 9999

Number of faults: 0 to 9999

Fault Data Acquisition

Increments Running time: 0.00-99.99 s 0.01 Short-circuit current: 0.00-36.00 Inom 0.01 Fault Logging

Up to 5 faults are stored, then the oldest fault is erased.

Up to 64 signals per fault can be stored, subsequent signals trigger the overflow indication.

(7)

PS 431 Time-Overcurrent Protection Device

Technical Data

(continued)

Typical Characteristic

Data

Reset time

from 2-fold threshold operating value to 0:

≤ 25 ms Resetting ratio:

≥ 0.95

Minimum output pulse for trip com-mand:

100 ms

Deviations

Time-Overcurrent Protection1)

Threshold Operate Values, Phase-Current Stages

Deviationwhen I < 0.2 Inom: ± 15%

Deviation when I 0.2 Inom: ± 5%

Variation at 20°C ± 20 K: ± 2.5% Variation at VA,nom ± 20%: ± 1%

Variation at fnom ± 5%: ± 5%

Threshold Operate Values, Residual Current Stages

Deviation: ± 5%

Variation at 20°C ± 20 K: ± 2.5% Variation at VA,nom ± 20%: ± 1%

Variation at fnom ± 5%: ± 5%

Delay Time of Definite-Time-Delayed Stages

Deviation: ± 1% or ± 30 ms Variation at 20°C ± 20 K: ± 1% Delay Time of Inverse-Time-Delayed Stages

Deviation: ± 7.5%

Variation at 20°C ± 20 K: ± 2.5% Variation at VA,nom ± 20%: ± 1%

Variation at fnom ± 5%: ± 5%

Operating Data Measurement2)

Currents IA, IB, IC, IN each > 0.4 Inom

Deviation: ± 5%

Variation at 20°C ± 20 K: ± 2.5% Variation at VA,nom ± 20%: ± 1%

Variation at fnom ± 5%: ± 5%

Fault Data Acquisition2)

Short-circuit current > 0.4 Inom :

Deviation: ± 5%

Variation at 20°C ± 20 K: ± 2.5% Variation at VA,nom ± 20%: ± 1%

Variation at fnom ± 5%: ± 5%

Settings (continued)

Circuit Breaker Failure Protection tCBF: 0.00-9.99/∞ s; increments: 0.01 Measuring-Circuit Monitoring Mode: without IA, IB IA, IB, IC Imcm>: 0.25-0.50 IPmax; increments: 0.05 tmcm: 0.00-9.99s; increments: 0.01 0.0-99.9/∞ s; increments: 0.1

Power Supply

Nominal auxiliary voltage VA,nom:

24-60 V DC and (internally switcha-ble) 110-250 V DC / 100-230 V AC 3)

Operating range for direct voltage: 0.8 to 1.1 Vnom

with a residual ripple of up to 12% of VA,nom

For alternating voltage: 0.9-1.1 VA,nom

Nominal consumption: approx. 5 W at VA = 220 V DC

1) Deviations referred to the set value

with sinusoidal measured variables, total harmonic distortion ≤ 2%, ambient temperature 20°C, and nominal auxiliary voltage VA,nom 2) Deviations referred to the

respective nominal value with

sinusoidal measured variables, 3) V

(8)

PS 431 Time-Overcurrent Protection Device

Signal List

Signal Inputs

The signal inputs allow

inter-vention in the Protection

sequence. Each input can be

set for one of the signals

given in Table 1. However, a

given signal may be

as-signed to only one input. The

signal names refer to the

”active” state of the input

signal. Each input can be set

as follows:

active = low signal or

active = high signal.

Abbreviations for

Function Groups

CBF:

Circuit breaker

failure protection

DTOC: Definite-time

overcurrent

protection

IDMT:

Inverse definite

minimum time

overcurrent

protection

MAIN: Main function

MON:

Self-monitoring

Output Relays

The output relays are freely

configurable and can be

assigned any of the signals

listed in Table 3. Any signal

can also be assigned to more

than one free output relay for

contact multiplication

purpo-ses.

All relays are operated in an

energize-on-signal

arrange-ment (‘open-circuit function’,

the make contact is closed

when the signal is present)

except for the case where an

output relay is configured for

the signal ”MAIN: Blocked/

faulty.” In this case the relay

operates in an

normally-energized arrangement

(‘closed-circuit function’) and

the break contact is closed

for the blocked/faulty

conditi-on.

LED Indicators

Two LED indicators on the

local control panel have

permanently assigned

sig-nals (Table 2a). The other six

LED indicators are freely

configurable and can be

assigned any of the signals

listed in Table 2b.

(9)

Without function

MAIN: Block outp. rel. EXT E1 block. EXT E2 block. EXT Reset latch. + indic. Reset latch. EXT Reset indicat. EXT CBF: Input EXT U 1 U 2 H 1 MON: Warning H 2 MAIN: Blocked/faulty H 3 H 4 H 5 H 6 H 7 H 8 Without function MAIN: Trip command

E1 block. EXT E2 block. EXT IDMT/

DTOC: Starting I> or Iref>

Starting I>> Starting A Starting B Starting C Starting GF Gen. starting tI>> elapsed tI> or tI>> tIN> elapsed tIN>> elapsed tIN> or tIN>> tIref elapsed inv. tINrefelapsed inv.

CBF: Input EXT tCBF elapsed

MON: tmcm

DTOC: tI> elapsed def.

Without function MAIN: Trip command

Blocked/faulty IDMT/

DTOC: Starting I> or Iref>

Starting I>> Starting GF Gen. starting tI>> elapsed tI> or tI>> tIN> elapsed tIN>> elapsed tIN> or tIN>> tIref elapsed inv. tINrefelapsed inv.

CBF: tCBF elapsed

MON: tmcm

Warning DTOC: tI> elapsed def.

K 1 K 2 K 3 K 4

PS 431 Time-Overcurrent Protection Device

Signal List

(continued)

Table 2a:

Permanently Configured LED Indicators

Indi- Func-

Signal

cator

tion

Group

Table 3:

Freely Configurable Output Relays

Re-

Func-

Signal

lays

tion

Group

Table 2b:

Freely Configurable LED Indicators

Indi- Func-

Signal

cator

tion

Group

Table 1:

Freely Configurable Signal Inputs

Input Func-

Signal

tion

(10)

PS 431 Time-Overcurrent Protection Device

Dimensional Drawing and Terminal Connection Diagram

4 Dimensional drawing and panel cutout

5 Terminal connection diagram

11

80

0.DS

4

Panel cut-out and mounting frame outline

Surface-mounting Surface-mounting Flush-mounting

18 36 1 19 F x y E R ! PS 431 175.6 254 125 6.4 294.2 299 X1 X1 X6 X3 X3 30 9 20 .6 48.6 93 28 9 9 29 4.2 27 9 65.6 20 .6 172 162.5+-0.5 125+-0.5 30 0 281 +1 256 +1 Æ 6.4 H1 H2 H3 H4 H5 H6 H7 H8 X3 36 35 33 32 34 31 30 28 27 29 26 25 23 22 24 20 19 21 D1 1) D2 E2 X6 2 3 5 X1 13 14 L+ L– X1 1 (1 A) 2 (5 A) 3 4 (1 A) 5 (5 A) 6 7 (1 A) 8 (5 A) 9 10 (1 A) 11 (5 A) 12 A1 A2 A3 B1 B2 B3 C1 C2 C3 N1 N2 N3 L+ L– L+ L– X1 15 16 17 18 Power Supply Meas. Inputs LED Indicators Output Relays Signal Inputs PC Interface

PS 431

80 1. DS 4 U1 U2 U100 T1 T2 T3 T4 K1 K2 K3 K4

MAIN: Trip command 1)

IDMT/DTOC: Gen. starting 1)

1) Main: Blocked/Faulty 1) MON: Warning MAIN: Blocked/Faulty IDMT/DTOC: Starting A 1) IDMT/DTOC: Starting B 1) IDMT/DTOC: Starting C 1) IDMT/DTOC: Starting GF 1)

IDMT/DTOC: tI> V tI>>1) IDMT/DTO C: tIN> V tIN>>1)

MAIN: Reset latch.+indic. 1)

MAIN: Block. outp. rel. EXT 1)

1) Freely configurable (see signal list on page 9); signals as per factory setting

are entered in the diagram 2) L+ und L- circuit may be tested only

with 2.8 kV DC to ground

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PS 431 Time-Overcurrent Protection Device

Connection Example

6 PS 431 connection example A B C 11 80 2. d s 4 H1 H2 H3 H4 H5 H6 H7 H8 X3 36 35 33 32 34 31 30 28 27 29 26 25 23 22 24 20 19 21 D1 1) D2 E2 X6 2 3 5 X1 13 14 L+ L– X1 1 (1 A) 2 (5 A) 3 4 (1 A) 5 (5 A) 6 7 (1 A) 8 (5 A) 9 10 (1 A) 11 (5 A) 12 A1 A2 A3 B1 B2 B3 C1 C2 C3 N1 N2 N3 L+ L– L+ L– X1 15 16 17 18 Power Supply Meas. Inputs LED Indicators Output Relays Signal Inputs PC Interface

PS 431

11 80 1. DS 4 U1 U2 U100 T1 T2 T3 T4 K1 K2 K3 K4 Aux. voltage VA 2)

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PS 431 Time-Overcurrent Protection Device

Ordering Information

Designs Order No. Extension No.

(append to order no.)

PS 431

Wall-mounting case with 36 terminals

for wall surface mounting 89431-0- 1 1 2 3 3 1 0 for panel flush mounting with cover frame 89431-0- 2 1 2 3 3 1 0 Nominal current Inom: Phase current inputs 1 A, residual current input 5 A

Nominal frequency fnom: 50 Hz and 60 Hz

Nominal auxiliary voltage for power supply VA,nom:

24-60 V DC and 110-250 V DC or 100-230 V AC1)

Nominal auxiliary voltage for signal inputs VIn,nom:

24-250 V DC

Additional Options

Labeling and documentation in English -598

Accessories

PC connecting cable (2.5 m) 255 002 096 FPCC parameter setting program 251 254 271

1) Range selection via plug-in jumper, factory setting underlined.

SL

TS.06.04185PDF/0597EN

·

Ti

Subject to modifications · Printed in Germany

Numerical time-overcurrent protection device with inverse-time and definite-time characteristics

Case for panel surface or flush mounting

4-pole measurement (A, B, C, N) User-selection of IDMT or DTOC mode Phase-selective overcurrent timer stage and starting signals Time-lag high set phase current and high set residual current stages Tripping matrix

Optional latching of individual tripping criteria

Circuit breaker failure protection Option of reverse interlocking Measuring circuit monitoring Operating data measurement Event counting

Fault data acquisition Fault logging

Comprehensive self-monitoring 2 signal inputs (freely configurable) 4 output relays (freely configurable) Integrated local control panel 8 LED indicators (6 freely configurable) PC interface

AEG Energietechnik GmbH

Bereich Schutz- und Schaltanlagenleittechnik System Protection and Control Lyoner Straße 44-48 D-60528 Frankfurt P.O. Box 71 01 07 D-60491 Frankfurt Phone +49 69 6632 1521 Fax +49 69 6632 2548

AEG Starkstromanlagen Dresden GmbH Bereich Schutz- und Schaltanlagenleittechnik System Protection and Control Königsbrücker Straße 124 D - 01099 Dresden P.O. Box 10 03 60 D-01073 Dresden Phone +49 351 820 3360 Fax +49 351 820 3366

References

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