Proceedings
2021 International Conference on Hardware/Software Codesign and System Synthesis
CODES+ISSS 2021
October 8 - 15, 2021 Virtual Conference
Proceedings
2021 International Conference on Hardware/Software Codesign and System Synthesis
CODES+ISSS 2021
October 8 - 15, 2021 Virtual Conference
2021 International Conference on Hardware/Software
Codesign and System Synthesis (CODES+ISSS)
CODES-ISSS 2021
Table of Contents
Message from the Program Chairs vii
Committees viii
Special Sessions
Emergent Design Challenges for Embedded Systems and Paths Forward: Mixed-criticality,
Energy, Reliability and Security Perspectives 1
Siva Satyendra Sahoo (Technische Universität Dresden), Akash Kumar (Technische Universität Dresden), Martin Decky (Dresden Research Center of Huawei), Samuel C.B. Wong (University of Southampton), Geoff V. Merrett (University of Southampton), Yinyuan Zhao (South China University of Technology), Jiachen Wang (South China University of Technology), Xiaohang Wang (South China University of Technology), and Amit Kumar Singh (University of Essex)
Automated HW/SW Co-design for Edge AI: State, Challenges and Steps Ahead 11 Oliver Bringmann (University of Tübingen), Wolfgang Ecker (Infineon
Technologies AG), Ingo Feldner (Bosch Corporate Research), Adrian Frischknecht (University of Tübingen), Christoph Gerum (University of Tübingen), Timo Hämäläinen (Tampere University), Muhammad Abdullah Hanif (Technische Universität Wien, New York University Abu Dhabi), Michael J. Klaiber (Bosch Corporate Research), Daniel
Mueller-Gritschneder (Technical University of Munich), Paul Palomero Bernardo (University of Tübingen), Sebastian Prebeck (Infineon
Technologies AG), and Muhammad Shafique (New York University Abu Dhabi)
CODES+ISSS Work-in-Progress
Work-in-Progress: Achieving Fast Lane Detection of Autonomous Driving by CNN Based
Differentiation 21
Xingzhi Zhou (University of Electronic Science & Technology of China), Jinyu Zhan (University of Electronic Science & Technology of China), and Wei Jiang (University of Electronic Science & Technology of China)
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Work-in-Progress: The RISC-V Instruction Set Architecture Optimization and Fixed-point
Math Library Co-design 23
Meng Liu (Beijing University of Technology)
Work-in-Progress: Learned Buffer Management: A New Frontier 25 Yigui Yuan (University of Science and Technology of China) and Peiquan
Jin (University of Science and Technology of China)
Work-in-Progress: A Physically Realizable Backdoor Attack on 3D Point Cloud Deep Learning 27 Chen Bian (University of Electronic Science & Technology of China),
Wei Jiang (University of Electronic Science & Technology of China), Jinyu Zhan (University of Electronic Science & Technology of China), Ziwei Song (University of Electronic Science & Technology of China), Xiangyu Wen (University of Electronic Science & Technology of China), and Hong Lei (University of Electronic Science & Technology of China)
Work-in-Progress: Early Power Estimation of CUDA-based CNNs on GPGPUs 29 Christopher A. Metz (University of Bremen), Mehran Goli (University of
Bremen), and Rolf Drechsler (University of Bremen)
Work-in-Progress: Register File Management for PRET Machines 31 Martin Košťál (Czech Technical University in Prague) and Michal Sojka
(Czech Technical University in Prague)
Work-in-Progress: Critical-Weight Based Locking Scheme for DNN IP Protection in Edge
Computing 33
Ziwei Song (University of Electronic Science & Technology of China), Wei Jiang (University of Electronic Science & Technology of China), Jinyu Zhan (University of Electronic Science & Technology of China), Xiangyu Wen (University of Electronic Science & Technology of China), and Chen Bian (University of Electronic Science & Technology of China)
Work-in-Progress: Improving Security and Maintainability in Modular Embedded Systems with
Hardware Support 35
Maja Malenko (Graz University of Technology), Leandro Batista Ribeiro (Graz University of Technology), and Marcel Baunach (Graz University of Technology)
Work-in-Progress: A Study of Transistor Degradation in Cyber-Physical System Control
Devices 37
Spencer Millican (Auburn University, USA) and SueAnne Griffith (Auburn University, USA)
Author Index 39
CODES+ISSS 2021
Message from the Program Chairs
Welcome to CODES+ISSS 2021, the ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis. CODES+ISSS 2021 is part of the Embedded Systems Week (ESWEEK) 2021.
CODES+ISSS is the leading conference in the domain of embedded and cyber-physical systems offering unique opportunities for sharing ideas and disseminating results on system-level design, modeling, analysis, and implementation aspects. The conference spans across a wide range of design abstractions -- from system-level specification and optimization down to synthesis of multi- processor systems and hardware/software implementations.
CODES+ISSS 2021 features a dual publication model -- in which the papers are categorized in two tracks, namely the Journal track and the Work-in-Progress (WiP) track. Journal-track papers, which are full-length (10-page) papers describing mature work, have been published in ACM Transactions on Embedded Computing Systems (TECS). The WiP-track papers, which are short (2-page) papers representing not-yet-mature but promising research work, have been published in the ESWEEK proceedings and are listed as regular publications within the ACM and/or IEEE digital libraries. For a thorough evaluation of submitted papers, while giving a fair chance to the authors to pose a rebuttal to the understanding of the reviewers, we applied a two-stage review process. We received a total of 70 complete journal-track submissions. After the first round of reviews, 27 journal-track papers entered into revisions and the second round of review. In the end, 18 of these papers were accepted for presentation at the conference. This represents a highly selective acceptance rate of 25.7%. The vast majority of the papers were reviewed by five experts in the respective domain, with every paper receiving at least four reviews. In the WiP track, we received a total of 17 submissions. Out of these submissions, 9 WiP papers were accepted for a short presentation. This represents an acceptance rate of 52.9%.
This year's program is the result of the hard and dedicated efforts of the Technical Program Committee. We would like to thank all the members for their contributions, patience and diligence.
We also would like to thank the General Chairs Andreas Gerstlauer and Aviral Shrivastava who helped us coordinate with the other sister conferences involved in ESWEEK, including organization of joint keynotes, panels and the final program.
We are also very grateful to the anonymous members of the best paper award committee for their help in selecting the best contributions at CODES+ISSS. Finally, we would like to acknowledge the other members of the organization committee and the secondary reviewers, who were instrumental in putting together this event.
CODES+ISSS Program Chairs: Jason Xue and Chengmo Yang
vii
PROGRAM CHAIRS Jason Xue
CODES+ISSS Chair
City University of Hong Kong
Chengmo Yang
CODES+ISSS Co-Chair University of Delaware
PROGRAM COMMITTEE Tosiron Adegbija
University of Arizona
Siddharth Advani
Samsung Research America Mohammad Al Faruque
University of California, Irvine
David Atienza
École Polytechnique Fédérale de Lausanne (EPFL)
Lars Bauer
Karlsruhe Institute of Technology (KIT)
Christophe Bobda University of Florida Paul Bogdan
University of Southern California
Eli Bozorgzadeh
Univ. of California, Irvine Oliver Bringmann
University of Tuebingen / FZI
Rosario Cammarota Intel
Wanli Chang University of York
Yuan-Hao Chang Academia Sinica Xiang Chen
George Mason University
Robert P. Dick
University of Michigan Rainer Doemer
University of California, Irvine
Nikil Dutt
University of California, Irvine Petru Eles
Linkoping University
Xin Fang Qualcomm Fabrizio Ferrandi
Politecnico di Milano Swaroop Ghosh
Pennsylvania State University Dimitris Gizopoulos
University of Athens Michael Glaß
Ulm University Soonhoi Ha
Seoul National University Jie Han
University of Alberta
Jörg Henkel
Karlsruhe Institute of Technology Pi-Cheng Hsiu Academic Sinica Reiley Jeyapaul
ARM Research
Fadi Kurdahi
University of California, Irvine Luciano Lavagno
Politecnico di Torino
Sébastien Le Beux Concordia University Kyoungwoo Lee
Yonsei University
Jenq-Kuen Lee
National Tsing Hua University Youn-Long Lin
National Tsing Hua University
Chen Liu Intel Weichen Liu
Nanyang Technological University
Roman Lysecky University of Arizona Enrico Macii
Politecnico di Torino
Grant Martin
Cadence Design Systems Hiroki Matsutani
Keio University
Nele Mentens KU Leuven Brett Meyer
McGill University Prabhat Mishra
University of Florida Wolfgang Mueller
University of Paderborn Daniel Mueller-Gritschneder Technical University of Munich Gabriela Nicolescu
École Polytechnique de Montréal Mahdi Nikdast
Colorado State University Hyunok Oh
Hanyang University
Alex Orailoglu UC San Diego Gianluca Palermo
Politecnico di Milano
Maurizio Palesi University of Catania Partha Pratim Pande
Washington State University
Sri Parameswaran
University of New South Wales Sudeep Pasricha
Colorado State University
Andy Pimentel
University of Amsterdam Ilia Polian
University of Stuttgart
Graziano Pravadelli University of Verona
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Ann Ramirez (Gordon-Ross)
University of Florida Francesco Regazzoni
University of Amsterdam Gunar Schirner
Northeastern University
Zili Shao
The Chinese University of Hong Kong Sandeep Shukla
Indian Institute of Technology Kanpur
Amit Kumar Singh University of Essex Todor Stefanov
Leiden University
Sander Stuijk
Eindhoven University of Technology Sara Tehranipoor
Santa Clara University
Jürgen Teich
University of Erlangen-Nuremberg Ishan Thakkar
University of Kentucky
Hiroyuki Tomiyama Ritsumeikan University Eugenio Villar
University of Cantabria
Chao Wang
University of Science and Technology of China Fei Wu
Huazhong University of Science and Technology
Jiafeng Xie
Villanova University
Jiang Xu
Hong Kong University of Science and Technology
Ming-Chang Yang
The Chinese University of Hong Kong Mengying Zhao
Shandong University
