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ADDI9020 GUI User’s Guide
DIS April, 2013
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Contents
GUI Installation
GUI Operation
TG Project development
Project files
GUI Installation
Download GUI software package:
ftp://ftp.analog.com/pub/Digital_Imaging/adi_tools/ADDI9020_tools/
Install Microsoft .NET Framework 3.5 or later if not installed
already.
Run the install package setup_addi9020lite042013_1.0.0.2.exe
The application(ADDI9020VisualTgIde1.0.0.2.exe) is installed to:
Win7(64bit): C:\Program Files (x86)\ADI_TOOLS\bin”
Vista: C:\Program Files\ADI_TOOLS\bin”
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ADDI9020 GUI Operation
Menu bar:
Tool bar:
New project Save project Build project
Display simulation output
Tabs for edit pages
Start
Information Signal map Pattern editor Mode editor VD/HD timing
New Project and Open exist project
New project can be created by
menu bar-> file->New->project
Or click Tool bar->new project bar
Or from the Start page-> Rapidly start a new ISATG project
The new project will be saved to default:
C:\Users\xx\Documents\ADI Projects
Then the project can be moved to the engineer preferred
working directory by “save as” or manually “copy to”
Open exist Project:
Can be done by menu, tool bar or recent projects list(Start Page) The project file is backed up to projectname.pxj2_time.bak in case
it need recovered from some old stages.
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Information Page:
Signal Mapping:
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V_Pattern editor
XSG_HBLK_pattern editor
Add, delete, rename pattern
Cut, Copy paste toggles
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Mode editor:
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Sequence editor: for pattern link
Rename, Add, delete, move up/down copy and comment
Sample Code –
how to define and link patterns?
VD
HD
P0
Pattern P0
Seq0 Seq0
Control if next Sequence/Pattern will wait for HD or not
=1: wait for next HD
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Sample Code –
how to define and link patterns?
VD
HD
P0 P1 P0 P1
Seq0 Seq1 Seq0 Seq1
Sample Code –
how to define and link patterns?
VD
HD
P0
Pattern P0 P0 P1
P0 repeat n times (n=10)
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VD/HD timing editor:
Enter length(line) of each field
Enter length(pixel) of each line
Project build and Simulation
Configure simulation files and modes
Build project by click the icon in tool bar
If no error message, simulate the project by click icon
If no errors, review the result by click icon
If the waveform show up, the tool is installed properly
User can focus on CCD timing development
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TG Project developing procedures
1. Project planning:
Study CCD timing sheet figure out patterns allocation ,how many modes, Etc
Study CCD to AFE connection 2. Edit timing project by GUI
Enter project info,
Enter modes, fields, polarities for each mode and VD/HD info
Enter patterns
Link pattern by sequences for each fields
3. Build project and simulate each modes
If there are errors, go back to step2
4. On camera check
Load the generated loading files(*.lf) to camera to check image
Some register settings from GUI generated files can be optimized, like clock phase, driver strength,
GUI related project files
Projectname.pxj2: GUI project database file
GUI generated loading files(*.lf) which are used for simulation
and silicon
afestartup.lf : AFE register setup file
projectname_data.lf, projectname.lf: TG loading files tgstartup.lf register file: TG register setup file
addi9020mux.lf : proper V driver mux settings which can be found
in: adi_tools\doc or released demo project package.
“runsim.tcl” file: To save simulation parameters, it will be
updated after modify the simulation setting by GUI and rebuild the project.
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Recommended power up loading sequence
Load afestartup.lf register file
Load Assembled Program and the mux.lf
projectname_data.lf projectname.lf
addi9020mux.lf
Load tgstartup.lf register file
Mode switching
To select mode of operation, write to register
0x4000(tgstartup.lf)
Example:
For mode 0, set 0x4000=0x0000
For mode 1, set 0x4000=0x0001
For mode 2, set 0x4000=0x0002 and so on..
