IRF5305S/L
HEXFET
®Power MOSFET
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Advanced Process Technology
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Surface Mount (IRF5305S)
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Low-profile through-hole (IRF5305L)
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175°C Operating Temperature
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Fast Switching
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P-Channel
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Fully Avalanche Rated
S D
G
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF5305L) is available for low-profile applications.
Description
V
DSS= -55V
R
DS(on)= 0.06Ω
I
D= -31A
2 D P ak T O -26 2Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.4
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** ––– 40
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -31
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -22 A
IDM Pulsed Drain Current -110
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 110 W
Linear Derating Factor 0.71 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy 280 mJ
IAR Avalanche Current -16 A
EAR Repetitive Avalanche Energy 11 mJ
dv/dt Peak Diode Recovery dv/dt -5.8 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
VDD = -25V, Starting TJ = 25°C, L = 2.1mH RG = 25Ω, IAS = -16A. (See Figure 12)
Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 )
Notes:
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
ISD ≤ -16A, di/dt ≤ -280A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRF5305 data and test conditions
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -55 ––– ––– V VGS = 0V, ID = -250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– -0.034 ––– V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.06 Ω VGS = -10V, ID = -16A
VGS(th) Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 8.0 ––– ––– S VDS = -25V, ID = -16A
––– ––– -25
µ A VDS = -55V, VGS = 0V
––– ––– -250 VDS = -44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 n A VGS = -20V
Qg Total Gate Charge ––– ––– 63 ID = -16A
Qgs Gate-to-Source Charge ––– ––– 13 nC VDS = -44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 29 VGS = -10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 14 ––– VDD = -28V
tr Rise Time ––– 66 ––– ID = -16A
td(off) Turn-Off Delay Time ––– 39 ––– RG = 6.8Ω
tf Fall Time ––– 63 ––– RD = 1.6Ω, See Fig. 10
Between lead,
––– –––
and center of die contact
Ciss Input Capacitance ––– 1200 ––– VGS = 0V
Coss Output Capacitance ––– 520 ––– pF VDS = -25V
Crss Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz, See Fig. 5
Electrical Characteristics @ T
J= 25°C (unless otherwise specified)
IGSS
ns IDSS Drain-to-Source Leakage Current
nH 7.5
LS Internal Source Inductance
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) ––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– -1.3 V TJ = 25°C, IS = -16A, VGS = 0V
trr Reverse Recovery Time ––– 71 110 ns TJ = 25°C, IF = -16A
Qrr Reverse Recovery Charge ––– 170 250 nC di/dt = -100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) A S D G -31 -110
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1 1 0 1 0 0 1 0 0 0 0 . 1 1 1 0 1 0 0 D D S 20 µ s P U L S E W ID T H T = 25 °Cc A -I , D ra in -t o -S o u rc e C u rre n t (A )-V , D rain-to-S o urce V oltage (V )
VGS TOP - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V -4 .5V 1 1 0 1 0 0 1 0 0 0 0.1 1 1 0 1 0 0 D D S A -I , D ra in -t o -S o u rc e C u rre n t (A )
-V , D rain-to-S ource V oltage (V )
VGS TOP - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V -4 .5 V 20 µ s P U L S E W ID T H T = 17 5°CC 1 1 0 1 0 0 4 5 6 7 8 9 1 0 T = 2 5°CJ T = 17 5 °CJ A V = -2 5 V 2 0µ s P U L S E W ID TH DS G S
-V , G ate -to-S ource V olta ge (V )
D -I , D ra in -t o -S o u rc e C u rre n t (A ) 0 . 0 0 . 5 1 . 0 1 . 5 2 . 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0 J
T , J unc tion T em perature (°C )
R , D ra in -to -S o u rc e O n R e s is ta n c e DS (o n ) (N or m a liz ed) A I = -2 7A V = -1 0V D G S
Fig 2. Typical Output Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0 5 0 0 1 0 0 0 1 5 0 0 2 0 0 0 2 5 0 0 1 1 0 1 0 0 C , C a p a c it anc e ( p F ) A V = 0V , f = 1 M H z C = C + C , C S H O R TE D C = C C = C + C G S iss g s g d d s rs s g d o ss ds g d C is s C os s C rs s D S-V , D rain-to -S o urc e V oltag e (V )
0 4 8 1 2 1 6 2 0 0 1 0 2 0 3 0 4 0 5 0 6 0
Q , T otal G ate C harge (nC )G
A F O R TE S T C IR C U IT S E E F IG U R E 1 3 V = -4 4V V = -2 8V I = -16 A GS -V , G a te -t o -S o u rc e V o lt a g e ( V ) D D S D S 1 0 1 0 0 1 0 0 0 0 . 4 0 . 8 1 . 2 1 . 6 2 . 0 T = 2 5°CJ V = 0 V G S S D SD A -I , R e v e rs e D ra in C u rre n t (A )
-V , S o urc e -to -D rain V o lta g e (V ) T = 17 5 °CJ 1 1 0 1 0 0 1 0 0 0 1 1 0 1 0 0 O P E R A T IO N IN T H IS A R E A L IM ITE D B Y RD S (o n) 1 0 0 µ s 1 m s 1 0 m s A T = 25 °C T = 17 5°C S ing le P u ls e C J D S
-V , D rain-to-S ourc e V oltage (V )
D -I , D ra in C u rre n t (A )
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS -10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % RD VGS VDD RG D.U.T. VDS 90% 10% VGS td(on) tr td(off) tf + -25 50 75 100 125 150 175 0 5 10 15 20 25 30 35 T , Case Temperature ( C)-I , Drain Current (A)
° C D 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 Notes: 1. Duty factor D = t / t 2. Peak T = P x Z + T 1 2 J DM thJC C P t t DM 1 2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z ) 1 thJC 0.01 0.02 0.05 0.10 0.20 D = 0.50 SINGLE PULSE (THERMAL RESPONSE)
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
QG QGS QGD VG Charge-10V
D.U.T. VDS ID IG -3mA VGS .3µF 50KΩ .2µF 12V Current Regulator Same Type as D.U.T.Current Sampling Resistors
+
-Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp V(BR)DSS IA S R G IA S 0 .0 1Ω tp D .U .T L VD S VD D D R IV E R A 1 5 V -2 0 V 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 1 7 5 J E , S in g le P u ls e A v a la n c h e E n e rg y ( m J ) AS A
S tarting T , J unc tion T em perature (°C ) V = -2 5V I T O P -6 .6A -1 1A B O T TO M -16 A D D D
Peak Diode Recovery dv/dt Test Circuit
P.W. Period di/dt Diode Recovery dv/dt Ripple ≤ 5%Body Diode Forward Drop Re-Applied
Voltage Reverse Recovery Current
Body Diode Forward Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISDWaveform D.U.T. VDSWaveform Inductor Curent D = P.W. Period + -+ + + - RG VDD • dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test D.U.T
*
Circuit Layout Considerations • Low Stray Inductance• Ground Plane
• Low Leakage Inductance Current Transformer
*
Reverse Polarity of D.U.T for P-Channel VGS[ ]
[ ]
***
VGS = 5.0V for Logic Level and 3V Drive Devices[ ] ***
D
2
Pak Package Outline
D2Pak
Part Marking Information
1 0.16 (.4 00 ) RE F . 6.47 (.2 55 ) 6.18 (.2 43 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 8.8 9 (.3 50 ) R E F . B -1.3 2 (.05 2) 1.2 2 (.04 8) 2.7 9 (.110 ) 2.2 9 (.090 ) 1.3 9 (.0 5 5) 1.1 4 (.0 4 5) 5 .28 (.20 8) 4 .78 (.18 8) 4.69 (.1 85) 4.20 (.1 65) 1 0.54 (.4 15) 1 0.29 (.4 05) A -2 1 3 15 .4 9 (.6 10) 14 .7 3 (.5 80) 3 X 0 .93 (.03 7 ) 0 .69 (.02 7 ) 5 .08 (.20 0) 3X1.40 (.0 55) 1.14 (.0 45) 1.7 8 (.07 0) 1.2 7 (.05 0) 1.4 0 (.055 ) M AX. NO TE S: 1 D IM EN S IO N S A F T ER SO L D ER D IP. 2 D IM EN S IO N IN G & T O LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 3 C O N T RO L LIN G D IM EN SIO N : IN C H . 4 H E AT SINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S. 0.5 5 (.022 ) 0.4 6 (.018 ) 0 .25 (.01 0 ) M B A M M IN IM U M R E CO M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) 8.89 (.3 50 ) 17 .78 (.70 0) 3 .8 1 (.15 0) 2 .08 (.08 2) 2X LE A D A SS IG N M E N TS 1 - G A TE 2 - D R AIN 3 - S O U RC E 2.5 4 (.100 ) 2 X
P A R T N U M B E R
IN TE R N A TIO N A L
R E C T IF IE R
L O G O
D A T E C O D E
(Y YW W )
YY = Y E A R
W W = W E E K
A S S E M B L Y
L O T C O D E
F 5 3 0 S
9 B 1 M
9 24 6
APackage Outline
TO-262 Outline
TO-262
Tape & Reel Information
D2Pak 3 4 4 TR R F E E D D IRE C TIO N 1 .8 5 ( .0 7 3 ) 1 .6 5 ( .0 6 5 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 ) TR L F E E D D IRE CTIO N 10 .9 0 (.42 9) 10 .7 0 (.42 1) 16 .10 (.63 4 ) 15 .90 (.62 6 ) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) 0 .3 68 (.0 1 4 5 ) 0 .3 42 (.0 1 3 5 ) 1 .60 (.06 3) 1 .50 (.05 9) 13.50 (.532 ) 12.80 (.504 ) 33 0.00 (1 4.1 73) M A X . 2 7.4 0 ( 1.079) 2 3.9 0 ( .9 41) 60.00 (2.3 62) M IN . 3 0.40 (1.1 97) M A X . 26 .40 ( 1.03 9) 24 .40 ( .961 ) N O T E S : 1. C O M F O R M S TO E IA -4 18. 2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER . 3. D IM E N S IO N M E A S U R E D @ H U B . 4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E .WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 http://www.irf.com/ Data and specifications subject to change without notice. 4/99