CC415 Chapter 2 Signal Conditioning

CC 415 Data Acquisition System

CHAPTER 2

Signal Conditioning

Amplification and Filtering

Prof. Fawzy Ibrahim

Electronics and Communication Department

Chapter Contents

2.1 Ideal Operational Amplifiers

2.2 The Inverting Configuration

2.3 The Noninverting Configuration

2.4 Difference Amplifiers

2.5 The Instrumentation Amplifier

2.6 Active Filters

2.1 Ideal Operational Amplifier (op–Amp

)

Introduction:

• OP–Amps are utilized in hundreds of application. One can do almost anything with op–Amps. Therefore, op – amps are produced on IC’s. • An IC op–amp is made of a large number of transistors (tens),

resistors and usually one capacitor.

2.1.1 The op–Amp Terminals

• From signal point of view op–Amp has three terminals as shown in Fig. 2.1:

– Two input terminals (Terminal 1 and Terminal 2 ) – One output terminal (Terminal 3)

• From operational point of view op–Amp has five terminals as shown in Fig. 2.2:

– Two terminals for the inputs and one for the output.

– Two terminals for dc power supplies: (Terminal 4 for the positive voltage V_CC and Terminal 5 for the negative voltage – V_EE)

2.1.1 The op–Amp Terminals (Continued)

• Other terminals are induced for frequency compensation and terminals for offset nulling.

Fig. 2.1 Circuit symbol for the op amp.

2.1.2 Function and characteristics of the ideal op–Amp

Refer to Fig. 2.3:

1. V3 = Vo = A (V2 – V1) where A is the amplifier gain (open-loop gain)

2. The ideal op – amp is not supposed to draw any input current: i1 = 0 and i2 = 0, therefore, the input impedance Zin = ∞

3. V3 = A (V2 – V1) independent of the current that may be drawn from

terminal 3 into the load impedance, therefore the out impedance Zout = 0.

4. V3 is in phase with V2 and out of phase with V1. For this reason

Terminal 1 is called the inverting input terminal and is distinguished by “–” sign, while terminal 2 is called the noninverting input terminal and is distinguished by a “+” sign.

Fig. 2.3 Equivalent circuit of the ideal op amp.

2.1.2 characteristics of the ideal op–Amp (Continued)

5. V3 = A (V2 – V1), the op–amp respond only to the difference signal (V2 – V1) and hence ignore any signal common to both inputs. This is called common – mode rejection (zero common mode gain or infinite common mode rejection)

6. Op–amps are direct–coupled or dc amplifiers that amplify signal whose frequency is low or zero.

7. The ideal op–amp has a very large gain and ideally A ∞. These characteristics are summarized in Table 2.1.

Table 2.1 characteristics of ideal Op – Amp.

Description Characteristic

#

Infinite input impedance Z_in = ∞

1

Zero output impedance Z_out = 0

2

Infinite common mode rejection Zero common mode gain

3

Infinite open–loop gain A ≈ ∞

4

Infinite bandwidth BW = ∞

2.2 The Inverting Configuration

Refer to Fig. 2.4

• R2 is connected from the output terminal of the op–amp (Terminal 3)

back to the inverting or negative input terminal (Terminal 1) R2 apply

a negative feedback.

• Input signal is connected terminal 1 through a Resistance R1

• Terminal 2 is grounded

2.2 The inverting configuration (Continued)

Refer to Fig. 2.5

• The closed – loop gain G is defined as G = Vo/V1

Since Vo = (V2 – V1) A yields V2 – V1 = Vo/A = 0 (A  ∞)

V2 = V1 or V1 = V2

• This is called a virtual short circuit means that whatever voltage at 2 will automatically appears at 1 because A  ∞

Fig. 2.5 The inverting closed-loop configuration.

2.2.1 The Closed – Loop Gain

2.2.1 The Closed – Loop Gain (Continued)

Apply Ohm’s law we have:

R

V

R

V

R

V

V

i

I I I 1 1 1 1 1

0











For ideal op–amp Z_in = ∞ No current go into the op–amp therefore Vo is given by:

R

R

V

R

R

V

R

i

V

V

I I I o 1 2 2 1 2 1



0











R

R

G

R

R

V

V

I o 1 2 1 2

_

_

_





• The closed–loop gain is the simply the ratio of the two resistor R₂ and R₁.

• The minus sign (–) means that the closed–loop gain amplifies provides a signal inversion (or the output signal is 180° phase– shifted with respect to the input. Therefore, this is called inverting configuration).

• It is required that the input resistance must be high, we have to select a high value of R₁. However if the required gain R₂/R₁ is also high, then R₂ could became impractically large.

• We may conclude that the inverting configuration suffers from a low input resistance.

• Refer to fig.2.6 (a) V_o = A (V₂ – V₁) ideal voltage source, it follows that the output resistance of the closed–loop amplifier R_o = 0

• A solution to compromise between the requirement high R_i and high gain consider the following example:

R

R

V

V

i

V

R

I I I i 1 1 1

/







_{Fig.2.6 The inverting}

closed-loop configuration

2.2.2 Input and Output Resistances

• Assume ideal op–amp with infinite

open–loop gain.

• The input resistance of the closed – loop inverting amplifier of Fig.2.6 is given by:

Example 2.1

Assuming ideal op–amp, consider the amplifier circuit shown in Fig.2.7. Assume also that for practical reasons it is required not to use resistors greater than 1 MΩ. For this circuit do the following: a) Derive an expression for the closed–loop gain V_o/V_I.

b) Design this circuit to have a gain of G = 100 and R_i = 1 MΩ.

c) Compare your design with that based on the inverting configuration of fig.2.5

Solution:

V₂ – V₁ = V_o/A = -V_o/∞ = 0 V₁ = V₂ = 0 virtual ground Determination of the current i₁

R

V

R

V

V

i

I I 1 1 1 1







Figure 2.7 Circuit for Example 2.1 the circled numbers indicate the sequence of the steps in the analysis

Example 2.1 (Continued) Determination of i₂

i₁ = i₂ Since zero current flows into the inverting terminal i₂ = i₁ = V_I/R₁

The voltage at node x is given by:

Determination of i₃: Determination of i₄:

V

R

R

R

R

V

R

i

V

V

x I I 1 2 2 1 2 2 1





0









V

R

R

R

R

V

i

I x 3 1 2 3 3

0







V

R

R

R

R

V

i

i

i

I I 3 1 2 1 3 2 4









Example 2.1 (Continued) Determination of V_o:

a) The closed – loop voltage gain is given by:

b) Since the input resistance of 1 MΩ is required. R_i = R₁ = 1 MΩ.

From the gain equation G, the maximum possible value for the first factor R₂/R₁ = 1, thus select R₂ = 1 MΩ

To obtain G = -100, the second factor of the gain expression is 100, we select maximum allowed value of resistance to R₄ = 1 MΩ

The value of R₃ is calculated as

R

V

R

R

R

R

V

V

R

R

R

i

V

V

I I I x o 4 3 1 2 1 1 2 4 4







(



)





)

1

(

3 4 2 4 1 2

R

R

R

R

R

R

V

V

G

I o

_

_

_

_



100 ) 1 1 1 1 ( 3       R M M M R₃ = 10.2 KΩ

Example 2.1 (Continued)

c) In comparison with inverting configuration shown in Fig. 2.8, use input resistance:

R_i = R₁ = 1 MΩ

For G = -R₂/R₁ R₂ = 100 MΩ Which is impractically large value.

Current Amplifier:

Refer to Fig. 2.9, marking R₃ < R₂, if (R₃ = R₂/K, where K > 1)

i₂ = i₁ and i₃ = K i₁ i₄ = (K+1) i₁

• The circuit can be used as a current amplifier • The current i₄ is independent of R₄.

The current amplifier of Fig. 2.9 delivers its output

current to R₄. It has a current gain of (1+R₂/R₃), a zero input resistance, and an infinite output resistance. The load(R₄), however, must be floating (i.e., neither of its

two terminal can be connected to ground). _{Figure 2.9 a current amplifier}

Figure 2.8 The inverting configuration

• A very important application of the inverting configuration is the weighted summer amplifier as shown in Fig. 2.10. • V₂ – V₁ = V_o/A = V_o/∞ = 0

V₂ = V₁ = 0 Virtual Ground

• Apply ohm’s law to have:

i₁ = V₁/R₁, i₂ = V₂/R₂, …… i_n = V_n/R_n

i = i₁ + i₂ + i₃ +……+i_n since op–amp input current = 0

• The output voltage is a weighted sum of the input signals V₁, V₂, … • Each summing coefficient can be independently adjusted by the

corresponding feed in resistors (R₁, R₂, … or R_n).

)

....

(

0

₂ 2 1 1

V

R

R

V

R

R

V

R

R

R

i

R

i

V

n n f f f f f o



















2.2.3 The Weighted Summer Amplifier

• For summing signals with opposite signs, two ideal op–amps can be used as shown is Fig.2.11 and is given by:

)

(

)

(

)

)(

(

)

)(

(

4 4 3 3 2 2 1 1

R

R

V

R

R

V

R

R

R

R

V

R

R

R

R

V

V

c c b c a b c a o









Figure 2.11 A weighted summer capable of implementing summing coefficients of both signs.

2.3 The Noninverting Op Amp Configuration

As shown in Fig.2.12, the input is connected to input (+ve) terminal of the op-amp and one terminal of R₁ is connected to the ground.

2.3.1 Closed – loop Gain

Refer to Fig. 2.13

• The closed loop – gain • G = V_o/V₁

Fig.2.12 The Noninverting configuration

Fig.3.13 Analysis of the noninverting circuit. The sequence of the steps in the analysis is indicated by the circled numbers.

• Assuming that the op-amp is ideal A ∞ • V_Id = V₂ – V₁ = V_o/A = 0 V₁ = V₂ = V_I

i

R

V

R

V

i

I I 2 1 1 1

0









)

1

(

.

1 2 2 1 2 2

R

R

V

R

R

V

V

R

i

V

V

I I I I o













R

R

V

V

G

I o 1 2

1 





The gain G is positive

• The input impedance Z_in = ∞ V_I/I = V_I/0 = ∞

• The output impedance Z_out = 0 ideal voltage source

which yields:

2.3.1 Closed – loop Gain (Continued)

• Fig.2.13 can be utilized as voltage follower by making R₂ = 0 and R₁ = ∞ as shown in Fig. 2.14.

Fig. 2.14 (a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model.

2.3.4 The Voltage Follower

• In many applications, a buffer amplifier is needed as an impedance transformer or power amplifier that has R_in = ∞, R_out = 0 and G = 1 or the output just follow the input which is called voltage follower.

2.4 Difference Amplifiers

• Difference amplifier is one that

responds to the difference between the two signals applied at its input and

ideally rejects signals that are common to the two inputs.

• As discussed before, the representation of signals in terms of their differential and common – mode components as shown in Fig. 2.15

• The output voltage V₀ is given by: V₀ = A_d V_Id + A_Cm V_ICm

Where

A_d denotes the amplifier differential amplifier gain. A_Cm denotes the common – mode gain.

Fig. 2.15 Representing the input

signals to a differential amplifier in terms of their differential and common-mode components.

• The efficiency of a differential amplifier is measured by the degree of its rejection of the common–mode signals in preference to

differential signal which is referred to as Common – Mode Rejection Ratio (CMRR) and is defined as:

A A CMRR Cm d log 20 

• The gain of the noninverting Configuration (1+ R₂/R₁) and the gain of inverting configuration (-R₂/R₁).

• To get the difference between the two inputs, we have to make the two gain magnitudes equal in order to reject the common mode signals. Fig.2.16 is used to alternate (1+ R₂/R₁) to (R₂/R₁).

• The proper ratio of the voltage divider can be determined by:

R

R

R

R

R

R

R

1 2 1 2 3 4 4

₍

₁

_

₎

_



R

R

R

R

R

R

1 2 2 3 4 4







or

• This condition is satisfied

• The output can be determined by superposition as shown in Fig.2.17 • Refer to Fig.2.17 (a)

• Refer to Fig.2.17 (b)

• The output voltage, by applying the superposition principle

• The difference amplifier gain

• We can select R₃ = R₁ and R₄ = R₂

R

R

R

R

1 2 3 4

_

V R R V V I o I1 1 2 1 2  0    .

V

R

R

R

R

R

R

R

V

V

V

I o I I 2 1 2 1 2 3 4 4 2 2 1

0

(

1



)











Id I I o o o

V

R

R

V

V

R

R

V

V

V

1 2 1 2 1 2 2 1





(



)





R

R

A

d 1 2



Fig. 2.16 A difference amplifier.

Fig. 2.17 Application of superposition to the analysis of the circuit of Fig. 2.16.

• Refer to Fig.2.18 the common – mode gain A_Cm can be calculated as follows:

i

R

R

R

R

V

V

R

R

R

V

R

i

ICm ICm ICm 2

1 3 4 3 3 4 4 1 1

1

]

[

1















V

R

R

R

R

R

R

R

V

R

R

R

R

R

V

R

R

R

R

i

V

R

R

R

V

o ICm ICm

.

ICm

(

1

.

)

ICm

4 3 1 2 3 4 4 3 4 3 1 2 3 4 4 2 2 3 4 4

_



















0

)

.

1

)(

(

4 3 1 2 3 4 4

_

_





R

R

R

R

R

R

R

V

V

A

ICm o Cm

R

R

R

R

4 3 1 2

_









CMRR

A

ICm

0

Thus When

• Refer to Fig. 2.19 the input resistance

• R₁ is required to be large and R₂/R₁ is desired to be large • This configuration has two disadvantages:

1. Low input resistance 2. It is difficult to vary A_d

i

V

R

id Id 1



R

R

i

R

i

R

V

Id



1 1



0



1 1



_id



2

1

Fig. 2.18 Analysis of the difference amplifier

Fig. 2.19 Finding the input resistance of the difference amplifier.

2.5 The Instrumentation Amplifier

• The low input resistance problem of the difference amplifier can be solved by using two voltage followers with gain as shown in Fig. 2.20(a) A₁ and A₂ which connected as noninverting configuration with gain

• The difference amplifier A₃ operates on the difference signal and provides the output

Therefore, the differential gain ) 1 ( 1 2 R R  V R R R R V V I I )(1 ) (1 ) Id ( 1 2 1 2 1 2     V R R R R V o (1 ) Id 1 2 3 4 _  ) 1 ( 1 2 3 4 R R R R A d  

• A_Cm = 0 and high differential gain • The disadvantages of 2.20 (a) are:

1. V_ICm is amplified in the first stage and may saturate the 2nd state 2. A₁ and A₂ must be matched to have the same gain.

3. To vary A_d, we have to change R₁ (up with A₁) and R₁ (with A₂) and have to be perfectly matched (very difficult).

• Disconnect the node X between the two resistors R₁ and R₁ as shown in Fig.2.20.(b) will solve the three problems.

- Refer to Fig.2.20 (b) assuming ideal op–amps as shown in Fig.2.20 (c)

R

V

i

V

V

V

I I Id Id

2

1 1 2









V

R

R

V

V

o o

)

Id

2

2

1

(

1 2 2



1





Fig. 2.20 A popular circuit for an instrumentation amplifier: (a) Initial approach to the

circuit; (b) The circuit in (a) with the connection between node X and ground removed and the two resistors R₁ and R₁ lumped together. This simple wiring change dramatically

improves performance; (c) Analysis of the circuit in (b) assuming ideal op amps.

• The overall difference voltage gain is given by:

Example 2.3:

Design an instrumentation amplifier circuit (Fig.3.20(b)) to provide a gain that can be varied over a range of 2 to 1000 utilizing 100 KΩ variable resistances or potentiometer (pot).

Solution:

• The first stage is used as gain stage.

• The second stage is used as a difference stage of gain 1 therefore select R₃ = R₄ = 10 KΩ.

• Choose 2R₁ as a series of two resistors R_1f (fixed) and R_1V = 100KΩ pot. as shown in Fig.2.21

• difference voltage gain is

)

1

(

1 2 3 4

R

R

R

R

V

V

A

Id o d







)

2

2

1

(

1 2 3 4

R

R

R

R

A

d





Fig. 2.21 Choice of 2R₁

Example 2.3: (Continued)

• To realize an adjustable gain over a range of 2 to 100, we can write:

)

2

1

(

1 1 2

R

R

R

V f





_{= 2 to 1000}

2

)

2

1

(

1 1 2

_





R

R

R

V f

1000

)

2

1

(

1 1 2

_





R

R

R

V f and

• Solve these two equations gives

R_1f = 100.2 Ω and R₂ = 50.05 KΩ

We can choose the standard resistors R_1f = 100 KΩ and R₂ = 49.9 KΩ

2.6 Active Filters

• A Filter circuit can be constructed using passive components:

resistors and capacitors. An active filter additionally uses an amplifier to provide voltage amplification and signal isolation or buffering.

)

1

1

).(

1

)(

(

)

1

).(

/

1

/

1

)(

(

)

(

1 1 1 1 1

R

Sc

R

R

s

V

R

R

R

Sc

Sc

s

V

s

V

G f i G f i o













2.6.1 Low-Pass Filter

An ideal low-pass filter provides a content output from the dc up to cutoff frequency f_OH and then passes no signal above that frequency. The ideal response of low-pass filter is shown in Fig.2.22.

• The first order low-pass filter using a signal resistor and capacitor is shown in Fig.2.23 (a). The output voltage is given by:

)

/

1

1

(

)

/

1

1

)(

1

(

)

(

)

(

)

(

oH v oH G f i o

j

j

R

R

j

V

j

V

j

H

_A



























• The filter transfer function is defined as H(s) = V_o(s) / V_i (s) and is given by:

Where A_v is the filter voltage gain and OH is the cutoff frequency which calculated as:

)

1

1

)(

1

(

)

(

)

(

)

(

1 1

C

R

s

R

R

s

V

s

V

s

H

G f i o









• The filter frequency response is determined by replacing s by j in

the filter transfer function H(s) which leads to H(j) = V_o(j) / V_i (j) and is given by: 1 1 1 1

2

1

1

2

C

R

f

R

C

f

w

_{oH oH oH}













• The Bode-plot of H(j) is shown in Fig.2.23 (b)

Example:

• Calculate the cutoff frequency of a first order low-pass filter when G f V

R

R

A

 1



1 1 1 1

2

1

1

2

C

R

f

R

C

f

w

_{oH oH oH}













kHz

f

_oH

6

.

63

)

10

02

.

0

)(

10

2

.

1

(

2

1

µF

0.02

C

_{3 6}













_







1.2

K

R

₁ and

Fig.2.23 First-order low-pass active filter (a) the circuit; (b) the Bode plot.

2.6.2 High–Pass Filter

• A filter that provides or passes signals above cutoff frequency F_OL is high-pass filter The ideal

response of this filter is shown in Fig.2.24.

• The first-order high-pass filter circuit is shown in Fig.2.25 (a). The output voltage is given by:

)

1

).(

/

1

)(

(

)

(

1 1 1 G f i o

R

R

Sc

R

R

s

V

s

V







)

1

(

)

1

)(

1

(

)

(

)

(

)

(

1 1 1 1 1 1 1 1

R

SC

R

SC

R

SC

R

SC

R

R

s

V

s

V

s

H

_A

_v G f i o













G f V

R

R

A

 1



1 1 1 1

2

1

1

2

C

R

f

R

C

f

w

_{oL oH oL}













and

• The Bode-plot of H(j) is given in Fig.3.25 (b)

Fig.2.24 The idea response of HPF

)

/

1

/

(

)

(

)

(

)

(

OL OL v i o

j

j

j

V

j

V

j

H

_A





















The filter transfer function

Example:

• Calculate the voltage gain and the cutoff frequency of a high-pass filter shown in Fig.2.25 for R₁ = 2.1 KΩ, C₁ = 0.05 µF and R_G=10KΩ and R_F = 50 KΩ

Solution:

The cutoff Frequency:

6

10

50

1

1











G f V

R

R

A

(The voltage gain)

KHz

C

R

f

_oL

1

.

5

)

10

05

.

0

)(

10

1

.

2

(

2

1

2

1

6 3 1 1











_





Fig. 2.25 High-pass filter: (a) the circuit; (c) response Bode plot.

2.6.2 High–Pass Filter (Continued)

(a)

2.6.3 Band-Pass Filter

• The Band-pass filter circuit passes signals above one ideal cutoff

frequency f_OL and below a second cutoff frequency f_OH as shown in Fig.2.26.

• Fig.2.27 shows a band-pass filter using two stages, the first a high-pass filter and the second a low-pass filter. The combined response represent the filter.

)

1

)(

1

)(

(

)

1

).(

/

1

)(

(

)

(

1 1 1 1 1 1 1 1 G f i G f i o

R

R

C

SR

C

SR

s

V

R

R

Sc

R

R

s

V

s

V













)

1

).(

1

1

)(

(

)

1

).(

/

1

/

1

)(

(

)

(

2 2 1 2 2 2 1 G f o G f o o

R

R

c

SR

s

V

R

R

Sc

R

SC

s

V

s

V













)

(

)

(

)

(

)

1

1

)(

1

(

)

1

).(

(

)

(

2 2 1 1 1 1 2 1

H

s

s

V

s

V

c

SR

C

SR

C

SR

R

R

s

V

s

V

i o G f o













• Combine the above equations we get the filter transfer function as:

2.6.3 Band-Pass Filter (Continued)

• The Bode-plot is shown in Fig.2.27 (b).

Example:

• Calculate the cutoff frequencies of the band-pass filter if R₁ = R₂ =10kΩ, C₁ = 0.1 µF and C₂ = 0.002 µF Solution: 2

)

1

(

G f V

R

R

A





1 1

2

1

C

R

F

_oL





2 2

2

1

C

R

F

_oH





and

Hz

C

R

F

_oL

159

.

15

)

10

)(

10

10

(

2

1

2

1

7 3 1 1









_





KHz

C

R

F

_oH

7

.

96

10

2

10

2

1

2

1

5 4 2 2













_



















OH OL OL v

j

x

j

j

j

H

_A

/

1

1

/

1

/

)

(







• The filter frequency response is determined by replacing s by j in

the filter transfer function H(s) which leads to H(j) = V_o(j) / V_i (j) and is given by:

Fig. 2.27 Bandpass active filter (a) the circuit; (b) response Bode plot.