ELE101: Fundamentals of Electrical
and
Electronics Engineering
Sequential Logic Circuits
2
Combinational Logic Circuits
Output is a function of the inputs
only.
Do not have “history”
Sequential Logic Circuits
Output is a function of the inputs and
the present state.
Have “history”
Maintain state information
Sequential Logic Circuits
Basic Memory Elements
4
Latch
Clock input is level sensitive.
Output can change multiple times during
a clock cycle.
Output changes while clock is active.
Flip Flop
Clock input is edge sensitive.
Output can change only once during a
clock cycle.
SR Latch (NOR)
5
Qa
Qb
SR Latch (NAND)
Gated SR Latch
7
S'
Gated D Latch
8
S'
R' S
Latches: Symbols
9
Memory
11
Memory is required to store:
1. data
2. application programs 3. operating system
Can be broadly classified as:
Random Access Memory (RAM) or
Random Access Memory
(RAM)
12
Can be written to or read from.
Read/Write memory
Reading from RAM is non-destructive. Access time to read from any memory
location is the same.
As compared to serial access memory.
Volatile
Information is lost when power is
Random Access Memory
(RAM)
13
Static Random Access Memory (SRAM)
Based on the Flip-Flop
Requires a large number of
transistors
Fast
Dynamic Random Access Memory
(DRAM)
Uses a single transistor to store
charge
Requires very few transistors Must be periodically refreshed
Random Access Memory
14
Address
Location in memory of the binary
information
Must be decoded to select the
appropriate location and read/write the associated data
k-bit address → 2k memory locations
Data
Binary information of interest
Stored in a specific location in the
memory
Random Access Memory
15
address
10-bit address 1024 locations
Random Access Memory
Random Access Memory
17
Rather than use the
Read
and
Write
signals, most commercially available RAM
chips use Enable and Read/Write'
Enable
Used to enable the selected RAM
chip
Aka. “chip select”
Read/Write'
Read Only Memory (ROM)
18
Can only be read from.
Memory is written (or “programmed”)
once
Reading from ROM is non-destructive.
Access time to read from any memory
location is the same.
As compared to serial access
memory.
Non-Volatile
Information is retained even after
Read Only Memory (ROM)
19
Programmable Read Only Memory (PROM)
Can be “programmed”
Erasable PROM (EPROM)
Can be “programmed” and erased
Electrically Erasable PROM (EEPROM)
Can be erased using an electrical
signal
UV Erasable PROM (UVEPROM)
Read Only Memory
20
ROM store “permanent” binary
information
One-time programmable memory
Multiple-time programmable memory
Address and Data
k address bits n data bits
2
kx n ROM includes
k-to-2k decoder
Read Only Memory
Read Only Memory
Read Only Memory
23
EEPROM (E
2PROM)
Electrically Erasable Programmable
ROM
Flash ROM
Similar to E2PROM
Has additional circuitry to selectively
erase and program the memory in-circuit
Analog Signals
Analog signals – directly measurable
quantities in terms of some other quantity
Examples:
Thermometer – mercury height rises as
temperature rises
Car Speedometer – Needle moves farther
right as you accelerate
Stereo – Volume increases as you turn the
Digital Signals
Digital Signals – have only two states. For
digital computers, we refer to binary states,
0 and 1. “1” can be on, “0” can be off.
Examples:
Light switch can be either on or off
Examples of A/D Applications
Microphones -
take your voice varying pressurewaves in the air and convert them into varying electrical signals
Strain Gages -
determines the amount of strain(change in dimensions) when a stress is applied
Thermocouple –
temperature measuring deviceconverts thermal energy to electric energy
Voltmeters
BLOCK DIAGRAM
Analog
Digital Conversion
2-Step Process:
Quantizing - breaking down analog value is a
set of finite states
Encoding - assigning a digital word or number
Step 1: Quantizing
Example:
You have 0-10V
signals. Separate
them into a set of
discrete states with
1.25V
increments.
(How did we get
1.25V? See next
slide…)
Output
Quantizing
The number of possible states that
the converter can output is:
N=2
nwhere n is the number of bits in the AD
converter
Example: For a 3 bit A/D converter,
N=2
3=8.
Analog quantization size:
Encoding
Here we assign
the digital value
(binary number)
to each state for
the computer to
read.
Output
States Output Binary Equivalent
Accuracy of A/D Conversion
There are two ways to best improve
accuracy of A/D conversion:
increasing the resolution which improves
the accuracy in measuring the
amplitude of the analog signal.
increasing the sampling rate which
Resolution
Resolution (number of discrete values the
converter can produce) = Analog Quantization size (Q)
(Q) = Vrange / 2^n, where Vrange is the range of analog voltages which can be represented
limited by signal-to-noise ratio (should be around
6dB)
In our previous example: Q = 1.25V, this is a high
resolution. A lower resolution would be if we used a 2-bit converter, then the resolution would be
Aliasing
Occurs when the input signal is changing
much faster than the sample rate.
For example, a 2 kHz sine wave being
sampled at 1.5 kHz would be reconstructed
as a 500 Hz (the aliased signal) sine wave.
Nyquist Rule:
Use a sampling frequency at least twice as
Overall Better Accuracy
Increasing both the sampling rate and the
A/D Converter Types
Converters
Flash ADC
Delta-Sigma ADC
Flash ADC
Consists of a series of comparators, each
one comparing the input signal to a unique
reference voltage.
The comparator outputs connect to the
How Flash Works
As the analog input voltage exceeds the
reference voltage at each comparator, the
comparator outputs will sequentially
saturate to a high state.
The priority encoder generates a binary
Accumulator(AC) : takes input from ALU
oThe ALU takes input from DR, AC and INPR : oADD DR to AC, AND DR to AC
Note) Input register is not connected to the bus. The input register is connected only to the ALU
Computer Registers
Data Register(DR) : hold the operand(Data) read from
memory
Accumulator Register(AC) : general purpose processing
register
Instruction Register(IR) : hold the instruction read from
memory
Temporary Register(TR) : hold a temporary data during
processing
Address Register(AR) : hold a memory address, 12 bit
Computer Registers
Program Counter(
PC
) :
hold the address of the next instruction to be read
from memory after the current instruction is executed
Instruction words are read and executed in
sequence unless a branch instruction is encountered
A branch instruction calls for a transfer to a
nonconsecutive instruction in the program
The address part of a branch instruction is
transferred to PC to become the address of the next instruction
To read instruction, memory read cycle is initiated,
IR and TR
The instruction register, IR, can only be
loaded; it cannot be incremented nor
cleared. Its output is used to generate
Di’s and Ti’s control signals.
TR is a temporary register. The CPU uses
this register to store intermediate results
of operations. It is not accessible by the
external programs. It is loaded,
Common Bus System
The basic computer has eight registers,
a memory unit, and a control unit.
Paths must be provided to transfer
information from one register to another
and between memory and registers
A more efficient scheme for transferring
Instruction Codes
A process is controlled by a
program
A program is a set of instructions that
specify the operations, data, and the control sequence
An instruction is stored in binary code that
specifies a sequence of microoperations
Instruction codes together with data are
1. Memory
2. Program Counter
The basic computer instructions are stored in the memory
The size of each memory word is 16 bits.
Each instruction occupy one word. 0101010101010101
1010101010101010 1100110011001100 0011001100110011 0101010101010011 1010101010101010 1100110011001100 0011001100110011 000000000001 PC
3. Instruction Register
0101010101010101 IR
Building A Basic Computer!
Instruction code format
Instruction code format with two parts : Op.
Code + Address
Op. Code : specify 16 possible operations(4
bits)
Address : specify the address of an
operand(12 bits)
If an operation in an instruction code does
not need an operand from memory, the rest of the bits in the instruction (address field) can be used for other purpose
Op. Code Address
15 12 11 0
instruction
data
15 12 11 0
Instruction Cycle