Produced by Semiconductor Equipment and Materials International and TechSearch International, Inc.
Global Semiconductor
Packaging Materials Outlook
EXECUTIVE SUMMARY
Semiconductor Equipment and Materials International (SEMI®) and TechSearch International, Inc. have cooperated in the development of Global Semiconductor
Packaging Materials Outlook, a comprehensive market research report on
the global semiconductor packaging materials markets. Interviews were conduct-ed with more than 140 semiconductor manufacturers, packaging subcontractors and packaging materials suppliers to gather information for the report.
The semiconductor industry continues to recover from the economic downturn that hit the entire industry beginning in late 2008. Revenues, unit shipments, and capital spending across the supply chain plunged as a result of the global economic crisis, and companies reacted by implementing steep cost reduction measures. By early 2009, semiconductor sales had fallen to the low levels last reported during the 2001/2002 downturn. From that bottom of the downturn in early 2009, many segments of the industry experienced a sharp recovery with some indicators and data sets indicating that third quarter 2009 activity is on par with 2008 prior to the collapse. While economic challenges and uncertainty have not completely vanished, the general outlook is for this growth to continue into 2010 and beyond.
Key semiconductor packaging growth areas include flip chip, wafer-level packaging (WLP), ball grid array (BGA), leadframe-based chipscale packaging (CSP), stacked die packages, and system-in-package (SiP)/multichip packages. For the latter, pack-age-on-package (PoP) designs are growing in application. Many companies are also looking at through-silicon via (TSV) technology to further address requirements for increased performance and smaller form factor. Miniaturization of products, such as mobile phones, is a major driver in component packaging developments. Increased functionality in a smaller and smaller space has driven the development of CSPs, including stacked die packages and wafer level packages. An increasing number of devices are shipping in WLP. The outlook for advanced packaging remains strong, and this includes BGA, CSP (including leadframe-based), flip chip, and WLP packages. These package types have the strongest unit growth trends over the next four years. More traditional packaging technologies will see demand stagnant and, for some basic form factors, to continue to decline. Materials are key in further improving and developing new packaging technolo-gies. As discussed in the 2008 update to the International Technology Roadmap for Semiconductors (ITRS), advancements in device technologies have “accelerated the pace of change in the Roadmap for Assembly and Packaging.” Material solutions and integration of processes are needed to overcome the challenges. As the industry moves from 45 nm to 32 nm and below technology generations, however, there will be new material needs that are difficult to define today. Some highlights identified by the ITRS for process technologies down to 22 nm include:
EXECUTIVE SUMMARY 1 1 INTRODUCTION 5 1.1 Methodology 5 1.2 Assumptions 6 1.3 Report Organization 7 2 SEMICONDUCTOR PACKAGING 8 AND INDUSTRY TRENDS
2.1 Semiconductor Industry Trends 8 2.2 Regional Trends—The China Market 16 2.3 Packages and Electronic End-Market 19
Applications
3 SUBSTRATES 22
3.1 Laminate Substrates 22
3.2 Build-up Substrates 22
3.3 Organic Substrate Technology Trends 23 3.4 Organic Substrate Material 24
Markets and Forecasts
3.5 Organic Substrate Pricing 25 3.6 Organic Substrate Supply 25 3.7 Flex Circuit/Tape Substrates 27
4 LEADFRAMES 29
4.1 Leadframe Market and 29 Technology Trends
4.2 Leadframe Markets 31
4.3 Leadframe Pricing 34
4.4 Leadframe Market Forecasts 36
4.5 Leadframe Supply 37
5 BONDING WIRE 43
5.1 Bonding Wire Market and 44 Technology Trends
5.2 Bonding Wire Markets 47
5.3 Bonding Wire Pricing 49
5.4 Bonding Wire Market Forecasts 49
5.5 Bonding Wire Supply 50
6 MOLD COMPOUNDS 53
6.1 Mold Compound Technology Trends 54
GLOB AL SEMICONDUCTOR PACKAGING MATERIALS OUTLOOK GLOB AL SEMICONDUCTOR PACKAGING MATERIALS OUTLOOK
• Solutions for interconnect density scaled to silicon • Improved reliability
• Thermal management
With the slower demand and increased competition among suppliers, many seg-ments of the materials industry have experienced strong price pressure that has dampened revenue growth. Price pressures are expected to continue. Also, invest-ments by materials suppliers will continue to take place in China to be aligned with the growing packaging assembly based there. Some China-headquartered suppliers will emerge in the market place. Suppliers headquartered in Korea continue to seek a larger presence in the packaging materials market.
As technology is evolving, the semiconductor packaging materials market is in the midst of significant changes and over the next several years some opportunity areas include:
• Fine pitch substrates for 150 µm solder bump and 130 µm copper pillar flip chip
• New laminate dielectric materials for 32 nm and 22 nm silicon technology • Thin core materials with rigidity for processing
• Leadframe surface treatments and plating process technologies (including pre-plated) to enhance packaging reliability
• Cost effective alternatives for gold wire (Au price)
• Alloy and metallurgical development to support on-going migration to smaller diameter gold bonding wire, more complex wiring schemes, and smaller pad size (<45 µm)
• Low cost mold compound for low-k interconnect
• Mold compound or encapsulant materials for high wire density (40 µm pitch) • Mold compounds for thin gap filling for conventional transfer mold technology
and materials for compression molding
• Cost effective die attach film (DAF) solution and/or high conductive epoxy for wafer screen print
• Good thermal exposure for DAF technology for multichip application (high thermal DAF solution not readily available)
• Green die attach, liquid encapsulants, substrates, underfills, and mold compounds that do not degrade moisture sensitivity levels, have a low coefficient of thermal expansion (CTE), and are compatible with low- and ultra low-k dielectrics and lead-free (Pb-free) processing at a competitive price • Underfill materials with CTE of 20 ppm
• Over-molded underfill (OMUF)
• Development of standardized solder ball composition and reflow profiles • Integrating WLP dielectrics into larger die size applications and dielectric
materials that have low dielectric constants, low cure temperatures, and better photoresolution
• High-end gel, compound, and phase-change material (PCM) alternatives for TIM1 needed for microprocessors
• TIM materials compatible with low pressure processing during assembly 7 UNDERFILL MATERIALS 59
7.1 Underfill Technology Trends 59 7.2 Underfill Material Market 60
and Forecast
7.3 Underfill Supply 61
8 LIQUID ENCAPSULANTS 62 8.1 Liquid Encapsulant Technology Trends 62 8.2 Liquid Encapsulant Markets 62 8.3 Liquid Encapsulant Pricing 63 8.4 Liquid Encapsulant Market Forecasts 63 8.5 Liquid Encapsulant Supply 63 9 DIE ATTACH MATERIALS 65 9.1 Die Attach Technology Trends 65
9.2 Die Attach Markets 66
9.3 Die Attach Market Forecasts 68
9.4 Die Attach Supply 68
10 SOLDER BALLS 70
10.1 Solder Ball Material Technology Trends 70 10.2 Solder Ball Market and Forecast 70
10.3 Solder Ball Supply 70
11 WAFER LEVEL PACKAGE 72 DIELECTRICS
11.1 Wafer Level Package Dielectrics 72 Technology Trends
11.2 Wafer Level Package Dielectrics 72 Market and Forecast
11.3 Wafer Level Package Dielectrics Supply 73 12 THERMAL INTERFACE MATERIALS 75 12.1 Thermal Interface Material Trends 75 12.2 Thermal Interface Material Types 76 12.3 Thermal Interface Material Market 77
and Forecast
12.4 Thermal Interface Material Supply 77 13 SUMMARY AND CONCLUSIONS 79
14 APPENDICES 81
List of Acronyms and Abbreviations 81 Packaging Materials Supplier Web Site 82 List of Figures and Tables 82
In total, the semiconductor packaging materials covered in this investigation are forecasted to grow from $15.4 billion in 2009 on a global basis to $19.6 billion in 2013, exclud-ing thermal interface materials. This represents a compound annual growth rate of 6.2%. Thermal interface materials will add $338.1 million and $525.7 million in 2009 and 2013, respectively, to the packaging materials market.
The global market for laminate substrates for IC pack-ages is forecasted to experience a compound annual growth rate (CAGR) of 7.9% from 2009 through 2013 on the basis of square meters of material processed. The growth rate for flip chip laminates will be stronger, 16.4% CAGR, while wire bond PBGA substrates will decline over the forecast period. The decline in wire bond PBGA substrates is mainly driven by Intel’s shift of the Southbridge chipset from wire bond to flip chip. Another factor in the decline of the wire bond substrate area is the desire to reduce the individual substrate size.
Both in units and total revenues, the leadframe market remains a sizeable portion of the total packaging materi-als market. This market, however, was one of low revenue growth prior to the 2008 downturn, and one that will expe-rience a sharp decline in both revenues and units for 2009. The market is estimated to reach $2.9 billion in 2013. Gold metal pricing is a major concern in an industry com-pelled to reduce costs, with pricing reaching more than $1,000/trz this fall. As a result, the transition to copper wire is strong and increasingly centered on higher pin count, finer diameter applications. Also, the copper wire market in China is active and is mainly driven by local IC design houses for low-end power devices. Total wire shipments were 15.4 billion meters in 2009 and are forecasted to increase by 11.6% CAGR through 2013.
Green requirements are a key driver in mold compound material development, with several semiconductor compa-nies reporting nearly 100% conversion to halogen-free mate-rials. Total revenues will be an estimated $1.0 billion in 2009 and are forecasted to increase to over $1.2 billion by 2010.
The main application for underfill today is flip chip. Selection of the correct flip chip underfill is critical for reliability espe-cially as future devices will be fabricated with ultra low-k materials and continue to use Pb-free bumps. While compa-nies have made progress in eliminating the need for underfill in BGA and CSP packages, Japanese handset and some smart phone makers use underfill. The total underfill market will be an estimated $150.0 million in 2009 and will grow at a CAGR of about 11.6% through 2013.
Liquid encapsulant revenues will be $117.3 million in 2009 and will increase to $151.0 million by 2013.
The die attach film (DAF) market is experiencing strong growth for stacked die and ultrathin wafer applications. Alternatives to DAF, e.g. self-filleting die attach and Wafer Backside Coating (WBC), are also being developed to address tight bondline control and to potentially lower material costs. The die attach materials market will decline to $582.5 million in 2009 but is estimated to grow to $747.7 million by 2013.
Solder ball revenues will be $157.7 million in 2009 and will increase to $254.9 million by 2013. A majority of sales are for CSP applications. The industry continues to face challenges in standardizing material as a variety of material compositions are available.
The WLP dielectrics market is forecasted to grow from $21.7 million in 2009 to $39.6 million in 2013. DRAM mem-ory adoption of WLP today and future production with TSV technology is included in this outlook.
Thermal interface material (TIM) is needed to manage thermal performance as power density requirements increase in many device applications. The TIM market will be $338.1 million in 2009 and is forecasted to grow to $525.3 million by 2013. Estimated 2009 global market size and key trends in each semiconductor packaging materials segment are summarized in the following Table, on page 4.
GLOB AL SEMICONDUCTOR PACKAGING MATERIALS OUTLOOK GLOB AL SEMICONDUCTOR PACKAGING MATERIALS OUTLOOK
Laminate Substrates $6,834 Substrates are the single largest cost component in laminate packages. Growing use of flip chip CSP in wireless applications. Increase in panel production efficiency. Coreless structures still in development.
Flex Circuit/Tape Substrates $132 Declining market due to transition to thin rigid laminate. Leadframes $2,586 Continued strong growth in LFCSP. Investments and new
manufacturing capacity in China. Some evaluation of China-based alloy suppliers to lower material costs.
Bonding Wire $3,838 High gold metal pricing. Migration to smaller diameter gold wire continues. Copper wire represents 5.8% of wire shipped. Mold Compounds $1,016 Green compounds are key market driver. Low/minimal shrinkage
following cure and mechanical properties compatible with low-k interconnects. Average selling prices continue to decline. Underfill Materials $150 Main application is flip chip. Interest in no-flow materials for flip chip. Underfill for FBGA with body size larger than 3 mm x 3 mm at some companies.
Liquid Encapsulants $117 Improved reliability formulations for high wire density applications. Die Attach Materials $583 DAF larger than paste in terms of revenues. Large number of
suppliers competing in DAF. WBC interest strong because of DAF costs and increasingly demanding bondline thickness control. Solder Balls $158 Lead-free balls a majority shipments. Material development
on-going to improve mechanical performance. New suppliers in China.
Wafer Level $21.7 Many WLP use RDL. Consolidation in dielectric supply base. Package Dielectrics
Thermal Interface Materials $338.1 Increasing power densities and development of new TIM. Price volatility with indium. Commoditization of TIM2. On-going evaluations of alternative materials.
Semiconductor Packaging Materials Segment
Source: SEMI Industry Research and Statistics and TechSearch International, November 2009
Estimated 2009
List of Figures and Tables
List of Figures
Figure 2.1 Global Semiconductor Sales and Unit Shipments by Quarter 9 Figure 2.2 Global Sales for Assembly and Packaging Equipment 9 Figure 2.3 Quarterly Revenues of Five Packaging and Test 11
Subcontractors Package and Subcontrator Revenues
Figure 2.4 Silicon Shipment Area Index Worldwide Wafer Area Index 11 (Three-Month Average)
Figure 2.5 Monthly IC Leadframe Shipments for Japan and 12 Rest of World Markets
Figure 2.6 Monthly Discrete Leadframe Shipments for Japan and 12 Rest of World Markets
Figure 2.7 Global Fab Capacity by Product Type 13 Figure 2.8 Total Semiconductor Capacity Outlook by Technology
Generation (Quarterly Outlook through End of 2010) 13
Figure 2.9 Raw Material and IC Pricing Trends 15
Figure 2.10 Precious Metal Pricing 15
Figure 2.11 Copper Metal Pricing—Average Monthly LME Price 16 for Copper
Figure 2.12 Key Assembly and Test Plant Locations in China 17 Figure 2.13 Packaging Material Suppliers in China 20 Figure 4.1 Leadframe Market Revenue Share by 32
Company Headquarter Region
Figure 5.1 Monthly Average Gold Pricing Trends 43 Figure 5.2 Diameter Trends for Gold Bonding Wire 44
List of Tables
Table 1.1 Companies Interviewed 5
Table 1.2 Currency Exchange Rates per $1 U.S. Dollar 6 Table 1.3 Assumed Unit Growth Rates for Relevant 6
Electronic End Equipment Markets
Table 1.3 Assumed Unit Growth Rates for Relevant 6 Electronic End Equipment Markets
Table 1.5 Assumed Unit Growth Rates for Relevant Package Types 7 Table 2.1 Companies Spending a Billion Dollars or More— 10
Total CAPEX from 2007 to 2010
Table 2.2 General Development Activities/Needs for 14 Each Packaging Material Segment
Table 2.3 Near-Term Pitch Requirements Identified by the ITRS 14 Table 2.4 Key Chinese Government Funding Programs 16 Table 2.5 Location and Product/Package Type of 18
Leading Companies in China
Table 2.6 Major Bumping/WLCSP Lines in China 19
Table 2.7 Combined Total Sales and Percentage Export for 20 Seven Korean Packaging Material Suppliers
Table 2.8 Package Type Relation to End-Market Application 21 Table 3.1 Flip Chip Organic Build-up Substrate Features 23 Table 3.2 Global Organic Substrate Volume Market 24
Demand Forecast
Table 3.3 Global Laminate Substrate Revenue Market 24 Demand Forecast
Table 3.4 Average Wire Bond Substrate Price Ranges 25 Table 3.5 Average Build-Up Substrate Price Ranges 25 Table 3.6 Laminate Substrate Suppliers and Plant Locations 26 Table 3.7 Worldwide Substrate Market Share Estimates 27 Table 3.8 Global Flex Circuit/Tape Substrate Market and 27
Forecast for TBGAs
Table 3.9 Global Flex Circuit/Tape Market and Forecast for Flex CSPs 27 Table 3.10 Total IC Package Flex Circuit/Tape Substrate Forecast 28 Table 3.11 Selected Flex Circuit/Tape Substrate Suppliers and 28
Table 4.1 Worldwide Leadframe Sales 29
Table 4.2 IC and CSP Leadframe Unit Shipments 30 Table 4.3 China-based Leadframe Alloy Suppliers 31
Table 4.10 Global Leadframe Forecast 36
Table 4.11 Global Leadframe Forecast by Type 37
Table 4.12 Sampling of Reported Leadframe Capacity Utilization 38 Table 4.13 Leadframe Suppliers with Existing Manufacturing Capacity 38
in Selected Asian Countries
Table 4.14 Leadframe Manufacturing Facilities in China 39 Table 4.15 Domestic Leadframe Manufacturing Facilities in China 40 Table 4.16 2008 Worldwide Leadframe Market Share 41 Table 4.17 Aggregate Share (% Revenue) of Top Leadframe Suppliers 41 Table 4.18 Estimate Top Ten Worldwide Leadframe Supplier 41
Rankings for 2009
Table 4.19 Estimated Worldwide Stamped IC Leadframe 42 Supplier Rankings
Table 4.20 Estimated Worldwide Etched IC Leadframe 42 Supplier Rankings
Table 4.21 Estimated 2008 Regional Leadframe Supplier 42 Rankings By Revenue
Table 5.1 Relative Percent Cost Savings (at $900 per trz) 45 Table 5.2 Sample Count of Copper Wire Production Sites 45 Table 5.3 Ultra Fine Pitch Bonding Wire Roadmap 46
Table 5.4 Global Bonding Wire Markets 47
Table 5.5 Global Gold Bonding Wire Markets 48
Table 5.6 Global Copper Bonding Wire Markets 48
Table 5.7 Global Aluminum Bonding Wire Markets 48
Table 5.8 Regional Bonding Wire Markets 49
Table 5.9 Aggregate Bonding Wire Price Ranges 49
Table 5.10 Global Bonding Wire Forecast 50
Table 5.11 Aggregated Capacity and Average Capacity Utilization 50 of Seven Wire Suppliers
Table 5.12 Gold Wire Suppliers and Plant Locations 51 Table 5.13 China Headquartered Wire Suppliers 51 Table 5.14 Estimated Worldwide Gold Bonding Wire 52
Market Shares in Volume
Table 6.1 Global Mold Compound Markets 55
Table 6.2 Estimated Global Green Mold Compound 55 Market Revenue Share
GLOB AL SEMICONDUCTOR PACKAGING MATERIALS OUTLOOK
List of Figures and Tables continued
List of Tables
Table 7.1 Global Flip Chip Underfill Market Forecast 60 Table 7.2 Global BGA/CSP Underfill Material Market Forecast 60 Table 7.3 Underfill Material Suppliers and Plant Locations 61
Table 8.1 Global Liquid Encapsulant Market 62
Table 8.2 Regional Liquid Encapsulant Markets 63
Table 8.3 Global Liquid Encapsulant Forecast 63
Table 8.4 Liquid Encapsulant Suppliers and Plant Locations 64 Table 9.1 Minimum Wafer Thickness for Thinned Wafer Applications 66
Table 9.2 Global Paste Die Attach Market 67
Table 9.3 Global Die Attach Film Market 67
(Includes Lead-on-Chip and Stacked Die Package Applications)
Table 9.4 Regional Paste Die Attach Markets 67
Table 9.5 Regional Die Attach Film Markets 68
Table 9.6 Total Regional Die Attach Markets 68
Table 9.7 Global Die Attach Forecast 69
Table 9.8 Die Attach Material Suppliers and Plant Locations 69
Table 10.1 Global Solder Ball Market Forecast 70 Table 10.2 Solder Ball Suppliers and Plant Locations 71
Table 11.1 Wafer Level Package Trends 72
Table 11.2 Global WLP Dielectric Material Market Forecast 73 Table 11.3 Wafer Level Package Dielectric Suppliers and 74
Plant Locations
Table 12.1 Global Thermal Interface Material Market Forecast 77 Table 12.2 Thermal Interface Material Suppliers and Plant Locations 78
About the Authors Daniel P. Tracy, Ph.D.,
senior director Industry Research & Statistics, SEMI
Dr. Dan P. Tracy is responsible for developing and executing a global strategy for SEMI industry research and statistics products and services and information products. Tracy is responsible for preparing market reports and presenting on trends impacting the electronic materials and equip-ment markets globally. In addition, Tracy is also responsible for managing market statistics partnerships globally. Prior to joining SEMI in 2000, Tracy was a research associate with Rose Associates, where he focused on packaging materials market research. Prior to this, Tracy served in the Package Technology Group at National Semiconductor. Tracy has a Ph.D. in Materials Engineering from Rensselaer Polytechnic Institute, a masters of science in Materials Science & Engineering from Rochester Institute of Technology and a bachelors of science in Chemistry from the State University of New York (SUNY) College of Environmental Science and Forestry. Tracy has authored numerous market research studies and articles in industry trade publications. Tracy can be reached at dtracy@semi.org.
E. Jan Vardaman,
president and founder, TechSearch International, Inc.
E. Jan Vardaman is the President and Founder of TechSearch International, Inc., which has been providing market research and consulting services in semiconductor packaging for 20 years. Prior to founding TechSearch, Vardaman worked on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the first pre-competitve electronics industry research consortium in the United States. Vardaman is a columnist with Circuits Assembly Magazine, is co-author of Nikkan Kogyo’s How to Make IC Packages (in Japanese), and the author of numerous publica-tions on emerging trends in semiconductor packaging and assembly. Vardaman served on the NSF-sponsored World Technology Evaluation Center (WTEC) study team involved in investigating electronics manufacturing in Asia and on the U.S. mission to study manufacturing in China. Vardaman is a member of IEEE’s CPMT society, IMAPS, SMTA, SEMI, and the Fabless Semiconductor Association. Vardaman was elected to serve two terms on the IEEE CPMT Board of Governors. Vardaman received her M.A. in Economics