Revision History... 3
1 Introduction ... 4
1.1 SEMITOP® key-features ... 4
1.2 Customer advantages and benefits ... 4
1.3 SEMITOP® with Press-Fit terminals for solder free assembly to the PCB ... 5
2 SEMITOP® Technical details ... 6
2.1 Mechanical construction ... 6
2.1.1 Tolerance system ... 6
2.2 Product portfolio ... 8
2.3 Chip technologies ... 11
2.4 SEMITOP® type designation system ... 12
3 Chip technologies and optimized operation frequency ... 13
3.1 IGBT technology characteristics ... 14
3.1.1 600V and 650V IGBTs ... 14
3.1.2 1200V IGBTs ... 15
3.2 MOSFETs technology characteristic ... 17
3.2.1 Si MOSFETs ... 17
3.2.2 SiC MOSFETs ... 17
3.3 Inverse and Free-wheeling diodes ... 18
3.3.1 SEMIKRON CAL diodes ... 18
3.3.2 Fast switching diodes ... 18
3.4 Chip operating areas... 19
3.4.1 IGBT Safe Operating Area (SOA) for turn-on and single pulse operation ... 19
3.4.2 IGBT Reverse Bias Safe operating area (RBSOA) for periodic turn-off ... 20
3.4.3 IGBT Short Circuit Safe operating area (SCSOA) for non periodic turn-off of short circuits ... 21
3.4.4 MOSFET Safe Operating Area (SOA) for single pulse operation ... 21
3.4.5 Surge current characteristic of CAL diodes... 22
4 SEMITOP® technology ... 23
4.1 Baseplate-less basic technology ... 24
4.2 Thermal material data ... 26
4.3 Definition and measurement of Rth ... 27
4.3.1 Test setup ... 28
4.3.2 Principle of Rth measurement ... 28
4.3.3 Transient thermal impedance Zth ... 28
4.4 Specification of the integrated temperature sensor ... 30
4.4.1 Electrical characteristic (NTC) ... 30 4.4.2 Electrical characteristic (PTC) ... 31 4.4.3 Electrical isolation ... 32 5 Assembly instructions ... 33 5.1 Heatsink specification ... 33 5.2 Mounting surface ... 33 5.3 Assembling steps ... 35
5.3.1 SEMITOP® with soldered terminals ... 35
5.3.2 SEMITOP® with Press-Fit pins ... 36
Technical Explanation
SEMITOP®
Revision: Issue date: 05 2017-08-28Prepared by: Roberto Agostini
Approved by: Werner Obermaier
Keyword: SEMITOP, technical explanation, one screw mounting, no baseplate, pins for soldering, press-fit pins, 12mm height, flexibility, low inductance design, thermal paste, assembly, torque, washer, screw, heatsink, datasheet, laser marking, packaging, label, data matrix, RoHS, ESD, reliability
5.3.3 Mounting process outline ... 37
5.4 Thermal grease application ... 37
5.4.1 Standard thermal grease specification ... 37
5.4.2 Pre-applied thermal paste specification ... 38
5.5 Assembling on heatsink ... 39
5.6 Matching SEMITOP® and the PCB ... 39
5.6.1 SEMITOP® with soldered terminals ... 39
5.6.1.1Soldering on PCB ... 40
5.6.2 Connecting the PCB via press-fit pins ... 42
5.6.2.1Press-in process ... 43
5.6.2.2Press-out process ... 44
5.6.2.3 Reworking of the assembly “module and PCB” ... 44
5.6.3 PCB starter kit ... 44
5.6.3.1Demo PCB board for GD topology, SEMITOP®4 soldered terminals ... 44
5.6.3.2Demo PCB board for DGDL topology, SEMITOP®4 soldered terminals ... 45
5.7 ESD protection ... 45
6 Technologies ... 46
6.1 Principle of Press-Fit technology ... 46
6.2 Pin current capability ... 46
6.2.1 Soldered terminals current capability ... 46
6.2.2 Press-fit pins current capability ... 47
6.3 Tin whisker formation ... 48
6.4 Thermal interface materials ... 48
7 Restriction of hazardous substances in electrical and electronic equipment (RoHS) ... 50
8 Laser marking ... 51
9 Packaging specification... 51
9.1 Packing box ... 51
9.2 Marking of packing boxes ... 52
9.3 Storage and shelf life conditions ... 53
10 Reliability ... 54
10.1Qualification test and special test ... 54
10.2Lifetime calculation ... 56
11 Support ... 58
11.1Customer specific power modules ... 58
11.2Add-on services ... 59
11.3SEMISEL simulation software ... 60
12 Caption of figures ... 61
13 Caption of tables ... 62
14 Caption of equations ... 62
15 Symbols and Terms ... 63
16 References ... 64
Revision History
SEMIKRON reserves the right to make changes without further notice herein
Date Revision n° Description Pages
14.10.2015 03 - Update of contents; - Introduction of the new template. 65 31.07.2017 04 - General review;
- Update of Mounting specifications for SEMITOP® (Table 21). 65
1 Introduction
SEMITOP® was introduced in the market in the late 90’s with a few configurations, mainly single phase
inverters, bridge rectifiers and thyristors. SEMITOP® is now a complete module family with four different
housing sizes in order to fulfill the new application goals where performances, reliability, integration and costs are a must.
1.1 SEMITOP® key-features
The most flexible module family: same electrical configuration can fit different housings according to the increasing current rating for a complete product line covering a continuous current up to 300A, 55kW output power
PCB interface flexibility: SEMITOP® can be connected up the PCB via soldered terminals or press-fit
pins. Two alternative interface solutions to meet customers’ process needs
Excellent thermal management due to DBC ceramic without baseplate: this allows low operating temperatures and ensures high product lifetime
Only one mounting screw for a fast and reliable assembly to the heatsink 12mm height module
High insulation degree: 2.5kV/AC/1min, 3kV/AC/1s at 50Hz
Dedicated to your application: many different topologies are today available for standard and customized solutions thus creating the most comprehensive configuration portfolio: CIBs, sixpacks, input bridge rectifiers, AC switches, PFC topologies (buck, boost, double boost, interleaved solutions), single arm of three-level inverter (NPC and TNPC types) and many custom solutions for different final applications
Drives, UPS, solar, welding are the main SEMITOP® target markets for a power range up to 55kW
Compact size for extremely reduced stray inductance patterns
Integration of the latest chip technologies possible: fast IGBT technologies, fast switching diodes, MOSFET for high voltage, Silicon Carbide (later named SiC) Diodes and MOSFETs.
1.2 Customer advantages and benefits
SEMITOP® is a module without baseplate, made by direct soldering of chips and power terminals on a
ceramic substrate. The ceramic substrate is packaged with a plastic housing and the whole assembly is then fixed to the heatsink by a single mounting screw. Faster assembly process is therefore achieved compared to two lateral mounting screws.
The single central mounting screw provides an even pressure distribution which guarantees low thermal resistance resulting in low junction temperature and high reliability.
The product is today offered with two optional PCB interface connections: solder terminals or press-fit technology. Customers can therefore choose the right terminals to interface in order to optimize their production process and achieve fast time to market. Press-fit technology is the alternative solution to solder mounting and easy switch from soldered to solder free assembly to the PCB is possible thanks to the 100% pinout compatibility.
Pins on the edges make PCB routing simple allowing for more internal space to fit the most complex topologies inside a very compact space. This extremely flexible architecture with a low inductance design approach, coupled with the latest Si and SiC chip technologies, make SEMITOP® the suitable platform to
offer also customer specific solutions to achieve the new challenging requirements in different applications.
Multiple paralleling on the same PCB is possible thanks to the 12mm height compatibility thus reducing the development time of the whole assembly and improving the time to market.
1.3 SEMITOP® with Press-Fit terminals for solder free assembly to the PCB
Latest market trends, especially in the UPS and solar application in the low-medium power range, highlighted the need for power modules with a more simple assembly process to the PCB.
The new SEMITOP® Press-Fit version offers the following benefits:
No solder equipment needed Reduced production time
Assembly of module and driver in one step at room temperature Possibility for fast disassembly and re-use of power module or PCB
SEMITOP® Press-Fit is a 100% compatible platform with SEMITOP® soldered version with the following
characteristics:
still 12mm height module
same electrical and thermal performances of the soldered version
same pinout of the existing SEMITOP® configurations; no need to change the PCB routing
same consolidated production process assembly
still one mounting screw module that reduces the assembly time respect to the competitors that offer two mounting clips
more homogeneous pressure distribution for high thermal performances
same consolidated and proved mounting procedure to the heatsink of the existing SEMITOP®
The SEMITOP® Press-Fit is available inside SEMITOP®2,3,4 housings; target markets are UPS, solar,
motor drives and welding.
Figure 1: SEMITOP® Press-Fit family (left) and one single step PCB assembly concept (right)
All three housings have been tested according to the standard SEMIKRON qualification program with positive results. The platform is therefore released for mass production stage.
More details about the Press-Fit pin technology can be found in the next sections and in the dedicated mounting instruction documentation available in the web.
SEMITOP®4
SEMITOP®3
2 SEMITOP® Technical details
SEMITOP® comes into the market in four different mechanical sizes and three different product lines:
IGBT, DIODE & THYRISTOR and MOSFET (for low and high voltages). Both terminals for soldering and press-fit technology are available for any configuration.
The whole SEMITOP® family is based on the same design concept and it is produced in the same
production lines.
The different mechanical sizes can be mixed in the same application since the SEMITOP® platform is a
fully compatible 12mm height platform.
2.1 Mechanical construction
SEMITOP® construction is quite simple. The chips are soldered to the ceramic substrate, and they are
connected to the terminals by bonding wires. After pin soldering, assembly of DBC and housing is realized and then completely filled with Silicone-Gel.
Figure 2: SEMITOP® mechanical construction
2.1.1 Tolerance system
The SEMITOP® family has been designed according to tolerances defined by ISO 2768-m. The value of
tolerance depends on the value of the nominal dimension. For a defined "working grade", the greater is the nominal dimension, the greater is the corresponding tolerance.
Following the values of tolerance from ISO 2768 m, according to the different dimensional ranges, SEMITOP® tolerances are:
DBC substrate Chips
Wire bonds
Soldered terminals Housing
Table 1: SEMITOP® tolerances according to the different dimensional ranges
From 0.5 to 3 mm ±0.1
From 3 to 6 mm ±0.1
From 6 to 30 mm ±0.2
From 30 to 120 mm ±0.3
Dimensions for all SEMITOP® in the datasheets are according to the above mentioned tolerance system: Figure 3: SEMITOP®4 dimension example
2.2 Product portfolio
Both SEMITOP® soldered version and Press-Fit version feature same housing sizes and same module
height for a complete compatibility during mounting to the PCB. The following table shows the overall dimensions of SEMITOP® family:
Table 2: SEMITOP® overall housing size dimensions
Housing type Picture mm (LxWxH) Dimension in
SEMITOP®1 31 x 24 x 12
Solder Press-Fit
SEMITOP®2 40.5 x 28 x 12
SEMITOP®3 55 x 31 x 12
SEMITOP®4 60 x 55 x 12
SEMITOP® is a flexible architecture where high performing chip technologies can be placed in a very
compact space. High application performances are therefore ensured thanks to the low inductance approach design that reduces the switching pattern stray inductance for the best chip commutation behavior.
There are a lot of available configuration for a very comprehensive portfolio: 3-phase inverter up to 200A/600V-650V, 100A/1200V
CIB configurations up to 100A/600V and 50A/1200V
Single phase of three-level inverter (NPC) up to 150A/650V and 75A/1200V T-type three-level inverter (TNPC) up to 150A/1200V-100A/650V
Mosfet configuration up to 300A
3-phase bridge rectifier up to 100A DC output current Many other configurations are possible
The following pictures show the SEMITOP® positioning inside SEMIKRON portfolio (figure 4) and example
of SEMITOP flexibility (figure 5):
Figure 4: SEMITOP® positioning inside SEMIKRON portfolio
The low inductance design approach and the compact size, make SEMITOP® the right platform to develop
configuration based on the latest chip technologies to achieve the new challenging performance requirements:
Latest Si chip technologies
IGBT and Diodes for fast switching High voltage MOSFETS (600V and 650V)
Figure 6: SEMITOP® available solutions with fast switching technologies
Latest SiC chip technologies availability
650V and 1200V SiC Schottky Barrier Diodes (SiC SBD) 650V and 1200V SiC MOSFETS
Full SiC with or without Antiparallel SiC SBD Hybrid solution
Figure 7: SiC chip combinations and SEMITOP® SiC available configuration
Full SiC Half Bridge Full SiC SBD Bridge Rectifier
SEMITOP®2 SEMITOP®2
SK45MAHT12SCp SK45MLET12SCp
SEMITOP®3 SEMITOP®3
2.3 Chip technologies
SEMITOP® is a flexible platform where the latest chip technologies can be integrated to offer the best in
class performances for the new high performing configurations. Besides the standard Si chip technologies like IGBTs, diodes, thyristors and low voltage MOSFETs, it is possible to integrate also high voltage MOSFET and the newest SiC technology for Diodes and MOSFETs.
The wide chip offer allows an high degree of customization level, leading to the following matrix technology SEMITOP® availability:
Table 3: Device technology matrix
Chip type Material (from 40V up to 200V) Low voltage 600V 650V 1200V
IGBT Si √ √ √
MOSFET Si √ √ √
SiC √ √
Diode Si √ √ √
SiC √ √
Rectifier diodes and thyristors are available in Si technology, 1600V breakdown voltage rating and they are mainly used for rectification purposes.
Based on the different inner construction technologies, different IGBT technologies are today available. These technologies are identified via dedicated names inside SEMIKRON:
Table 4: IGBT technology matrix, from latest to oldest ones
Chip Technology 600V 650V 1200V Trench5 F5 type 07F5 Trench5 H5 type 07H5 Trench5 S5 type 07S5 Trench5 L5 type 07L5 Trench4 Fast 12F4 Trench4 12T4 Trench3 Fast 07F3 Trench3 066 07E3 126 Fast NPT 065 125
2.4 SEMITOP® type designation system Table 5: SEMITOP® designation system
SK
50
GD
06
6
E
T
p
(1) (2) (3) (4) (5) (6) (7) (8)
(1) SK = SEMIKRON product
(2) Current size [A] = approx. nominal chip current (3) Circuit configuration description
(4) Voltage grade
Thyristor/diode: VRRM [V]/100
IGBT: VCE[V]/100
MOSFET: VDS[V]/10
(5) Optional: chip generation
E3 = Trench3 technology 650V F3 = Fast Trench3 technology 650V T4 = Trench4 technology
F4 = Fast Trench4 technology L5 = Trench5 Low Saturation Voltage (6)/(7) Optional: extras e.g.
T : Temperature sensor E : Open Emitter I : Current sensor F : Fast diode UF : UltraFast diode D1 : Rapid switching diode
SC : Silicon Carbide technology inside (8) p = Press-fit version
3 Chip technologies and optimized operation frequency
Maximum allowable current, applied voltage and power dissipation define the maximum ratings for a device. These absolute maximum ratings have not to be exceeded if long life and reliability are to be attained. Ratings depend on used material, structure, design, mount and type of process. Therefore the close correlation between electrical properties and different ratings defines the electrical operating bounds of different devices, according to the following picture:
Figure 8: Frequency range application for different modules
The general trend is the higher I-V ratings the slower the possible switching frequency, hence increased junction temperature.
High frequency power applications is dominated by MOSFETs or trench-gate IGBTs, high-power low-frequency switching applications are dominated by thyristor.
The IGBT combines both the voltage controlled properties of MOSFETs and the main features of bipolar transistors.
The IGBT is suitable for numerous applications in power electronics, especially in pulse-width modulated servo and three-phases drives; it can also be used for UPS applications and other power applications requiring high switching repetition rates.
The rapid development of power electronics technology is mainly driven by the new increasing requirements for energy saving leading to the use of renewable energy solutions or alternatives to fossil fuel systems. The main tasks for the next chip technologies development are mainly switching frequency increase, losses reduction, higher junction temperature range. The development directions will be mainly aimed at the research of new semiconductor materials (hence the introduction of SiC devices and maybe Gallium Nitride (GaN) devices in the future) and improvement of chip technologies like higher junction temperatures, chip size shrinking, improvement of inner structure (hence the introduction of different chip technologies with focused switching energy-voltage drop trade-off).
Thanks to the already mentioned key-benefits, SEMITOP® is the leading platform to test first and then
integrate the latest chip technologies; that’s why different chip technologies are today available inside SEMITOP® which combinations can allow customers to build up the most performing application.
3.1 IGBT technology characteristics 3.1.1 600V and 650V IGBTs
Different 600V/650V reverse voltage IGBT chip technologies can be integrated inside SEMITOP® modules.
In the following a comparison in terms of main IGBT parameters:
Table 6: Comparison between available Si 600V/650V IGBT technologies
Parameter/Series 065 066 07E3 07F3 07L5 07H5 Si Technology NPT ultrafast 600V Trench3 600V Trench3 650V Trench3 Fast 650V Trench5 Low VCE,sat Trench5 High Speed IC,nom [A] 30 30 30 30 30 30
Relative chip size at
rated current 100 60 60 60 52 40
Max. operating Tj [°C] 125 150 150 150 150 150
VCE,sat @ 25°C and IC,nom
[V] 2.10 1.50 1.50 1.95 1.05 1.65
Typ. Eon @ 25°c and
IC,nom [mJ] 0.45 0.48 0.48 0.66 0.33 0.20
Typ. Eoff @ 25°C and
IC,nom [mJ] 0.65 0.77 0.77 0.44 1.35 0.10
Positive Temperature
Coeff. VCE,sat Yes Yes Yes Yes ** Yes
Gate charge [nC] 140 167 167 165 168 70
SC capability Yes Yes Yes Yes No No
*Boundary conditions : VCC=400V, RG=10
Source : available internet datasheets
** Constant Temperature Coefficient for IC=ICnom , Negative Temperature Coefficient for IC<ICnom
The comparison highlights the technological trend: size shrinking with increase of current density and higher operating junction temperature (from 125°C to 150°C).
The following picture shows the latest technological positioning of the different IGBT technologies:
EOFF-VCE,sat trade-off curve for the different technologies shows how the latest fast IGBT technologies are
pushing for switching losses and conduction losses reduction at the same time in order to improve application performances: efficiency, filtering effort reduction, system volume reduction.
Trenchstop5 technology represent one further step ahead respect to the Fast Trench3 with evident switching losses benefits. Improving the device performances in terms of losses reduction translates in a snappier behaviour during switching off.
At the time of publication, TrenchStop5 IGBT technology is available in the market in four different technologies:
L5 type (SK naming: L5): this brand new family features the lowest conduction losses. Suitable for central switches in NPC or for horizontal switches in TNPC;
S5 type (SK naming:S5): It is a trade-off between conduction and switching performances. It provides very soft voltage rise during hard commutation at turn-off with low RG values and high di/dt;
H5 type (SK naming:H5): it is a complement to the High Speed3 IGBT family. It provides snappy voltage rise during hard commutation at turn-off with low RG values and very high di/dt.
F5 type (SK naming: F5): this is the higher performance solution in terms of switching losses. It provides very snappy voltage rise during hard commutation at turn-off with low RG values and
extremely high di/dt. Very low inductance commutation paths are required;
It is therefore possible to define the optimized frequency range of operation and the main target markets for the mentioned IGBT types according to the mentioned characteristics:
Table 7: Comparison between available 650V IGBT technologies
Technology 066/07E3 07F3 07H5 07L5
Main target markets
UPS Solar Power supply Motor drives UPS Solar Power supply Welding UPS Solar SMPS Welding UPS Solar Welding
SC capability YES YES NO NO
Frequency range Up to 20kHZ Up to 100kHz 10-100kHz high
speed
Low VCE,sat up to
20kHz The right technology choice depends on the customer boundary conditions and application requirements. At the time of publication, 065 and 066 technologies are in use. The new mentioned technologies are available inside SEMITOP® and can be considered for new designs. The old 065 is going to be replaced by
the new performing fast technologies and therefore it has not been inserted in the above table.
3.1.2 1200V IGBTs
Different 1200V reverse voltage IGBTs chip technologies can be integrated inside SEMITOP® modules. In
the following a comparison in terms of main IGBT parameters:
Table 8: Comparison between available 1200V IGBT technologies
Parameter/Series 125 126 12T4 12F4
Si Technology NPT ultrafast Trench3 Trench4 Trench4 Fast
IC,nom [A] 50 50 50 50
Relative chip size at rated current 100 70% 62% 62%
Max. operating Tj [°C] 125 125 150 150
VCE,sat @ 25°C and IC,nom 3.20 1.70 1.85 2.05
Typ. Eon @ 25°c and IC,nom 5.70 3.00 5.70 2.52
Typ. Eoff @ 25°C and IC,nom 2.20 4.00 2.80 1.70
Pos. temp coeff VCE,sat Yes Yes Yes Yes
Gate charge [nC] 600 470 375 367
SC capability Yes Yes Yes Yes
trench gate structure brought big advantages as regards switching and conduction performances. The following table shows the 1200V trench gate structure technological positioning:
Figure 10: 1200V IGBT Trench technology positioning
According to the improvement of the last years, it is possible to define an optimized frequency range operation:
Table 9: Comparison between available 1200V IGBT technologies
Technology 126 12T4 12F4
Main target markets
UPS Solar Motor drives UPS Solar Motor drives UPS Solar Welding
SC capability YES YES YES
Frequency range Up to 20kHz Up to 20kHz Above 30kHz
The right technology choice depends on the customer boundary conditions and application requirements. At the time of publication, all the technologies are in use. The new 12F4 technology is available inside SEMITOP® and can be considered for new designs. The old 125 is going to be replaced by the new
3.2 MOSFETs technology characteristic 3.2.1 Si MOSFETs
Both low voltage types and high voltage types can be integrated inside SEMITOP® platform. At the time
of publication, Superjunction MOSFET technology can be offered for application where 600V and 650V MOSFET are required.
The present MOSFET portfolio offer is therefore like follows:
Table 10: MOSFET portfolio
Reverse blocking voltage [V] 40 60 80 100 600
rds,on [m], chip level, 25°C 1.1 1.7 2.5 2.7 99
Technology Optimos3 Optimos3 Optimos3 Optimos3 Super junction –
CP series Recently Infineon developed the super junction MOSFET C7 series , 650V rated.
The qualified CP series and the new C7 series can be considered for new designs; main target markets are boost converters in solar applications and welding configurations.
3.2.2 SiC MOSFETs
There are applications that ask for very stringent requirements like extremely reduced switching energies or high switching frequency operation. This is mainly due to the need to have high efficiency conversion or to reduce the volume at system level via filter, cooling, fans and other equipment reduction.
SiC MOSFET is the right technology to fulfil these stringent requirements thanks to some main benefits: Switching losses near to zero
Very low temperature dependence of the switching losses
State of the art SiC MOSFET feature mainly configurations with 1200V voltage class: this new technology is today offered inside SEMITOP® intwo different electrical configurations:
Table 11: SiC MOSFET portfolio
Configuration Housing Module name Rating
SEMITOP3 Press-Fit SK45MAHT12SCp -1200V/45m SiC Planar MOSFET -1200V/50A SiC SBD SEMITOP3 Press-Fit SK45MLET12SCp 1200V/45m SiC Planar MOSFET
SEMITOP2 Press-Fit SK45MH120TSCp 1200V/45m SiC Planar MOSFET SK40MH120TSCp 1200V/40m SiC Trench MOSFET SEMITOP2 Press-Fit SK20KDD120SCp 1200V/10A SiC SBD
For further details about SiC MOSFETs please refer to:
“Silicon Carbide presentation”, 03-03-2016, Semikron presentation:
http://www.skd.semikron.com/cps/rde/xchg/intranet_eng/hs.xsl/products_ps_sic.htm Module datasheets available in the web
3.3 Inverse and Free-wheeling diodes 3.3.1 SEMIKRON CAL diodes
The free-wheeling diodes used inside SEMITOP® are mainly SEMIKRON CAL (Controlled Axial Lifetime)
diodes, or HD CAL (High Density CAL) diodes. These fast, “super soft” planar diodes are characterised by the optimal axial profile of the charge carrier life-time, which was achieved in an implantation process using helium ions and basic carrier life-time setting.
The main advantages are:
Low peak reverse current and thus a lower inrush load current
“Soft” decrease of the reverse current throughout the entire operating temperature range Robust performance when switching high di/dt
Paralleling capability thanks to the negligible negative temperature coefficient and the small forward voltage VF spread
The new “CAL4” diode series has been designed specifically for the new 650V IGBT series and the 1200V IGBT4 series. This new CAL diode series is able to ensure safe operation up to 175°C.
SEMIKRON CAL diodes are able to operate up to 20kHz switching frequency depending on the application boundary conditions.
3.3.2 Fast switching diodes
There are applications where there is need to push the frequency higher or to improve recovery performances. In this case hyper-fast high voltage silicon diodes or SiC diodes are needed.
Hyper-fast Silicon diodes: based on the ultrathin wafer technology, the RAPID1 family released by
Infineon can be a valid option inside SEMITOP® for switching frequencies from 20kHz up to 40kHz
(depending on the application operating conditions). Main diode advantages are:
Very low conduction losses
Low peak reverse recovery current Low reverse recovery time
RAPID1 is mainly designed for optimized forward voltage drop for the lowest conduction losses and today available only in 650V voltage class.
Target markets are UPS, solar inverters and welding; they are especially integrated inside PFC topologies or inside the three-level inverters (neutral clamp diode position) and normally coupled with the 650V Fast Trench3 or 650V High Speed Trench5 IGBT technologies.
SiC diodes: they are Schottky Barrier Diodes (SBD), therefore only one type of charge carrier is
responsible for current transmission. No excess charge could appear as storage charge when the diode turns-off; it means that reverse recovery current or “tail current” is negligible.
These diodes feature therefore minimal switching losses owing to extremely reduced IGBTs’ Eon
parameters and they are optimized for very high switching frequencies. The devices are rated for junction temperature up to 175°C with a very high thermal conductivity, resulting in lower thermal resistance performances. Chip sizes are very small, leading to small power modules.
State of the art offer both 650V and 1200V voltage class diodes. Main target markets and application are listed in the following table:
Table 12: Main SiC markets and tasks
Market Energy solar Renewable HF power supplies Motor drives UPS
Tasks Increase fsw Reduce passive filter components Increase efficiency Naturally high switching frequency Reduce power losses Reduce cooling efforts
Reduce size and weight Increase fsw Reduce passive filter components Increase efficiency SiC diodes can be coupled as antiparallel diodes to the IGBT, so to build up so called “Hybrid” solutions or to the SiC MOSFET to build up “Full-SiC” solutions.
For further details about SiC MOSFETs please refer to:
“Silicon Carbide presentation”, 03-03-2016, Semikron presentation:
http://www.skd.semikron.com/cps/rde/xchg/intranet_eng/hs.xsl/products_ps_sic.htm Module datasheets available in the web
3.4 Chip operating areas
3.4.1 IGBT Safe Operating Area (SOA) for turn-on and single pulse operation
Safe operating area is defined as the voltage and current conditions over which the chip can operate without self-damage during switching-on. This curve is not present in datasheet but can be provided on demand.
SOA curve is a graph that exhibits dependence of collector current from collector-emitter voltage for single pulse duration and junction temperature of the device. The safe operating area is the area under the considered curve. The SOA curve is limited by the following parameters:
Maximum collector current (horizontal limit) Maximum collector-emitter voltage (vertical limit)
Figure 11: IGBT Safe Operating Area (SOA) diagram
3.4.2 IGBT Reverse Bias Safe operating area (RBSOA) for periodic turn-off
Reverse Bias Safe operating area is the SOA curve when the device is during turn-off state. This curve is also not present in datasheet but it can be provided on demand.
Maximum VCES has not to be exceeded during turn-off. Due to the internal stray inductance,
collector-emitter voltage to terminals is less than the collector-collector-emitter voltage at chip level. This is the reason the curve is cut in the upper right corner respect to the curve at chip level.
In the following an example of RBSOA curve for module SK50GD066ETp:
Figure 12: IGBT Reverse Bias Safe Operating Area (RBSOA) diagram
IC module IC chip Tj ≤ 150°C VGE = -7/+15 V IC,nom = 50A Ts = 25°C tp ≤ 1 ms RG=16
3.4.3 IGBT Short Circuit Safe operating area (SCSOA) for non periodic turn-off of short circuits
This is the SOA curve at short circuit condition. The diagram shows the limit for safe control of a short circuit. The curve is not inside the datasheets but it can be provided on demand.
The picture shows a generic SCSOA curve for module SK50GD066ETp.
Figure 13: IGBT Short Circuit Safe Operating Area (SCSOA) diagram
When turning off a short circuit, the high short-circuit current induces a voltage at the parasitic inductances in the commutation circuit; this voltage must not cause VCES to be exceeded. In order to limit
the energy dissipation of the IGBT chips, short-circuit turn-off is subject to the following conditions: the short circuit has to be detected and turned off within max 10s (6s for 600V/650V Trench IGBT)
the time between two short circuits has to be at least 1second
the IGBT must not be subjected to more than 1000 short circuits during its total operation time the maximum chip temperature before a short circuit occurs is limited to 150°C
the maximum voltage VCC decreases
the prevailing –dic/dt maximum ratings must be controlled by the driver parameters
if necessary, non-permissible increase in gate-emitter voltage during short-circuit turn-off will have
to be prevented by clamping
3.4.4 MOSFET Safe Operating Area (SOA) for single pulse operation
The MOSFET has to achieve almost rectangular characteristic iD=f(v) between VDD and ID during hard
switching. The diagram indicates to what extent this may be realised during different operating states without risk of destruction.
All the limitations mentioned for the IGBT curve can be applied to the MOSFET too. The curve is not inside the datasheet, but it can be provided on demand.
Figure 14: MOSFET Safe Operating Area (SOA) diagram
3.4.5 Surge current characteristic of CAL diodes
When the CAL diode operates as rectifier diode in a “IV-Q” application, it is necessary to know the ratio of the permissible overload on-state current IF(OV) to the surge on-state current IFSM as a function of the load
period t and the ratio of VR/VRRM. VR denotes the reverse voltage applied between the sinusoidal half
waves; VRRM is the peak reverse voltage.
4 SEMITOP® technology
SEMITOP® modules are made by direct soldering of the chips (IGBT, Mosfet, Diodes, Thyristors, SiC
diodes and MOSFETs) and the power terminals on a ceramic substrate, typically Aluminium Oxide (Al2O3)
or Aluminum Nitride (AlN) covered by a thin copper layer.
The ceramic substrate is directly placed on the heatsink using only a thermal conductive material (typically Thermal Grease). Such a silicon material should fill all air gaps at the interface between the module and the heat sink.
The housing is the basic part of SKiiP® technology in SEMITOP® modules: it has to guarantee that the
ceramic substrate is evenly set on the heatsink in order to perform an homogenous heat exchange between module and the heatsink.
The SEMITOP® plastic housing has to evenly pressure the substrate surface through the only one
required screw for the mounting.
Figure 16: SEMITOP® structure and concept of SKiiP technology
The pressure concept brings the following advantages:
Distributed pressure from the ceramic substrate (also called DBC) to heatsink without baseplate No stress on bonding connections
No rigid large area connections between materials with different CTE (coefficient of thermal expansion)
Different materials are contacted by a pressure system Any mechanical stress is absorbed by the structure itself
4.1 Baseplate-less basic technology
SEMITOP® is a baseplate-free power module where dice are placed on a DBC substrate. This DBC
substrate is made of a top side copper layer in direct contact with the chip, a ceramic layer that ensures insulation and a back side copper layer that goes in contact with the heatsink through a thermal grease layer.
Modules with baseplate technology feature the system DBC substrate + chips soldered to a copper baseplate. The whole assembly is then in contact with the heatsink through a thermal grease layer. This technological difference brings to different thermal resistance paths as the following picture shows:
Figure 17: Thermal resistance paths for a baseplate and a baseplate-less module
𝑅𝑡ℎ,𝑗−𝑠= 𝑅𝑡ℎ,𝑗−𝑐+ 𝑅𝑡ℎ,𝑐−𝑠
By using a baseplate free module technology, there is a direct thermal path between chip junction and heatsink (Rth,j-s). A module with baseplate considers two thermal paths: junction-case (Rth,j-c) and
case-sink (Rth,c-s).
Therefore maximum allowable DC current capability performances for a SEMITOP® module are always
referred to the heatsink temperature.
Attention has to be put when comparing SEMITOP® against module with baseplate in order to avoid
misleading evaluations.
As example, a 50A/3phase inverter application has been simulated comparing SEMITOP® against some
Table 13: IGBT performance comparison Module height [mm] Module technology IC [A] at Tj,max and TS=25°C IC [A] at Tj,max and TS=70°C IC [A] at Tj,max and TC=25°C Rth,j-s [K/W] Typical VCE,sat [V] at IC,nom and Tj=150°C SEMITOP* 12 baseplate No 60 50(1) 1,11 1,65 Competitor A* 12 baseplate No 70(2) 1,46 1,70 Competitor B* 12 baseplate No 45(3) 1,25 1,75
*Source: datasheet available in the web
(1): current capability refers to the heatsink
(2): current capability is referred to the case temperature in the datasheet (3): current capability is referred to heatsink but at 80°C
In order to make the right performances comparison, it is needed to calculate the current capability at the same reference point. By referring all the calculations to the same heatsink reference point, the IGBT performances are as per below table:
Table 14: IGBT performance comparison for the same reference point Module height
[mm] IC [A] at Tj,max and TS=25°C
IC [A] at Tj,max and
TS=70°C Rth,j-s [K/W]
SEMITOP* 12 60 50 1,11*
Competitor A* 12 50 40 1,46*
Competitor B* 12 54 44 1,25*
*Source: datasheet available in the web
SEMITOP® exhibits the best thermal and electrical performances for the same reference point with the
lowest Rth,j-s value. The thermal resistance affects the maximum junction temperature and therefore the
maximum output power.
The picture shows the maximum output power vs switching frequency at the same switching conditions:
SEMITOP® allows a 5-20% higher output power over a wide frequency range. 4.2 Thermal material data
For thermal simulation purposes it is necessary to know the thermal material parameters as well as the typical thicknesses of the different layers in the package.
The sketch in Fig. 19 and the Table 15 show the different layers of the package:
Figure 19: SEMITOP® package sketch (cross section view)
Table 15: Typical material data for SEMITOP® package
Layer Material Layer thickness [mm] conductivity Heat
[W/(mK)] Thermal expansion coefficient (CTE) [10-6 K] IGBT chip (“066”) Si 0.070 148 4.1 IGBT chip (“07F3”) Si 0.070 148 4.1 IGBT chip (“126”) Si 0.120 148 4.1 IGBT chip (“12T4”) Si 0.115 148 4.1 IGBT chip (“12F4”) Si 0.115 148 4.1 Diode chip Si 0.240 148 4.1
Rapid diode chip Si 0.050 148 4.1
Shottky diode SiC 0.235 370 4.0
MOSFET Si 0.175 148 4.1
MOSFET (“060”) Si 0.175 148 4.1
MOSFET (“120”) SiC 0.330 370 4.0
Chip solder SnAg alloy 0.115 70 15-30
DBC copper Cu 0.30* 394 17.5
DBC ceramic Al2O3 0.63* 24 8.3
DBC copper Cu 0.30* 394 17.5
Thermal paste Customer specific
Heatsink Customer specific
*Valid for SEMITOP®1,2,3.
The above table shows that a limited number of materials is used inside a SEMTOP® package and how
these materials feature similar CTE values.
The below picture compares SEMITOP® materials and related CTEs with the ones used inside baseplate
(modules or discrete solutions). The length of the bars indicate the CTE values; huge differences in length are an indication of considerable stress. Some main advantages become therefore evident:
reduced thermo-mechanical stress. Big differences in the CTEs lead to mechanical stress causing ageing of connections when they are exposed to temperature changes;
reduced risk of delamination effects and field failures; higher assembly reliability;
better thermal cycling performances
Figure 20: CTE comparison for different power modules
4.3 Definition and measurement of Rth
The maximum junction temperature Tj under static and dynamic load conditions is very important for the
power system layout, because it is a key factor for the lifetime of a power system.
The SEMITOP® pressure contact technology thermally connects the DBC substrate to the heatsink; the
case temperature Tc cannot be measured directly by a hole through the heatsink that allows the access to
the module base. Therefore only the thermal resistance junction to heatsink Rth,j-s can be measured.
The thermal resistance Rth,j-s describes the distribution of temperatures in a system as the reaction to an
impressed power P according to the following equation:
Equation 1: Rth,j-s as function of the temperature parameters and impressed power
𝑅
𝑡ℎ,𝑗−𝑠=
𝑇
𝑗− 𝑇
𝑠𝑃
Tj= junction temperature [°C] Ts= heatsink temperature [°C] P = impressed power [W]4.3.1 Test setup
The following picture shows the measure system for thermal resistance:
Figure 21: System setup for Rth measurement
The reference point TS is shifted to a position of 2mm underneath the module inside the heatsink. The
distance of 2mm ensures that parasitic effects resulting from heatsink parameters (size, thermal conductivity etc.) are minimised and the disturbance induced by the thermocouple itself is negligible. At position of hotspot, the heatsink will be drilled towards the bottom of the module to 2mm below the module DBC base (hole diameter of Ø 2.5mm). A thermocouple can be introduced into this hole measuring the reference point Ts.
This method is independent from the DBC layout and results in constant thermal resistance values for the same chip sizes and packaging technology.
4.3.2 Principle of Rth measurement
For modules without a baseplate it is not possible to measure the thermal resistance Rth,j-c and Rth,c-s
separately as the baseplate does not exist. The thermal resistance Rth,j-s is evaluated from the virtual
junction temperature Tj.
The following physical coherency is used: when operating with a small measurement current, bipolar semiconductor devices show a linear dependence of the voltage drop from the virtual junction temperature.
The module is operated at a constant load current until thermal equilibrium is reached after 60 seconds. After reaching thermal equilibrium, the load current is switched off and a small current of 100mA is applied to the module.
4.3.3 Transient thermal impedance Zth
Transient thermal impedance relates the junction temperature rise to a fixed dissipated power.
According to EQ.1, by applying to the chip a step of fixed power value to dissipate and maintaining the heatsink temperature to a fixed value, by measuring the junction temperature variation in the time, it is possible to measure the thermal resistance rise during time until it reaches the steady state value Rth,j-s.
For a given multilayer structure such as silicon chip, DBC and heatsink, thermal behavior can be modeled by using an electrical model (so called Cauer network):
Figure 22: Multilayer thermal structure and thermal equivalent Cauer network
This network describes the real physical model of thermally relevant layers and it is described via two parameters: the thermal resistance and the thermal capacitance:
Equation 2: Equation for thermal resistance and capacitance
𝑅
𝑡ℎ,𝑖=
𝑑𝜆∙𝐴 [k/W]
(d = material thickness, = heat conductivity, A = heat flow area)
𝐶
𝑡ℎ,𝑖= 𝑠 ∙ 𝑉
[J/K]
(s = heat storage characteristic, V= volume )
Based on measurements, a mathematical thermally equivalent model of the Cauer network can be derived (EQ.3) and it is described by the Foster network model (Fig. 23)
Equation 3: Zth general equation for the Foster network
𝑍
𝑡ℎ,𝑗−𝑠= ∑ 𝑅
𝑡ℎ,𝑖⋅ (1 − 𝑒
−𝜏𝑡 𝑖)
𝑛 𝑖=1 n = number of RCs networkFigure 23: Foster network
In the following picture, an example of transient thermal profile obtained by using the EQ.3 for the IGBT and diode inside SK50GD066ETp is given:
Figure 24: Example of thermal impedance profile
Thermal impedance profile for SEMITOP® modules can be provided on demand.
4.4 Specification of the integrated temperature sensor
SEMITOP® power modules are equipped with NTC (Negative Temperature Coefficient) or PTC (Positive
Temperature Coefficient) sensors. To get the detailed information about type of temperature sensor, it is needed to refer to the module datasheet.
The temperature sensor is a temperature dependent resistor which reflects the actual heatsink temperature.
4.4.1 Electrical characteristic (NTC)
The standard “KG3B” temperature sensor exhibits a negative temperature coefficient characteristic with a nominal resistance value at 25°C of 5 kΩ±5%.
The temperature-dependent resistance of the NTC sensor is described by the following equation:
Equation 4: NTC general equation
𝑅
2= 𝑅
1⋅ 𝑒
[𝐵∙(1 𝑇2−
1 𝑇1)]
R2 : resistance at absolute temperature T2 [K]
R1 : resistance at absolute temperature T1 [K]
The typical NTC characteristic is shown in the figure:
Figure 25: Typical NTC sensor characteristic
4.4.2 Electrical characteristic (PTC)
The standard “SKCS2 Temp 100B” temperature sensor with positive temperature coefficient characteristic exhibits a nominal resistance value at 25°C of 1kΩ±3%.
The temperature-dependent resistance of the PTC sensor is described by the following equation:
Equation 5: PTC general equation
𝑅(𝑇) = 1000 ∙ [1 + 𝐴 ∙ (𝑇 − 25) + 𝐵 ∙ (𝑇 − 25)
2]
A : 7.635∙10-3 [°C-1]
B : 1.731∙10-5 [°C-2]
The typical PTC characteristic is shown in the figure:
To realize a trip level by additional protection network, the recommended value for the trip temperature is about 115°C (air cooling), based on a heatsink with a standard thermal lateral spread.
4.4.3 Electrical isolation
Inside the SEMITOP® the temperature sensor is mounted close to the IGBT – and diode dice onto the
same substrate. The minimum distance between the copper conductors is ≥ 0.71 mm.
Figure 27: Position of temperature sensor on DBC substrate
Since the SEMITOP® module is filled with silicone gel for isolation purposes, the requirements for the
specified isolation voltage (AC/2.5kV/1 min, AC/3kV/1s at 50Hz) are met and 100% tested.
During short circuit failure and therewith electrical overstress, the bond wires could melt off and so produce an arc with high energy plasma. In this case the direction of plasma expansion is not predictable; the temperature sensor might be touched by plasma and exposed to a high voltage level. The safety grade “Safe electrical isolation” according to EN 50178 can be achieved by different additional means, described there in detail.
5 Assembly instructions
In order to achieve the best SEMITOP® performances, the following specifications have to be fulfilled. 5.1 Heatsink specification
To obtain the maximum thermal conductivity, the underside of the module must be free of grease and particles.
The heat sink must fulfil the following mechanical specifications:
Flatness of heat sink area must be ≤50µm per 100mm (DIN EN ISO 1101) Roughness “Rz” ≤6,3µm (DIN EN ISO 4287)
No steps
Machined without overlaps
Surface of heat sink should be free of grease, e.g. by cleaning the heat sink in a fat-dissolving solvent. A good indication is given by the DIN 53364, surface tension ≥ 32N/m. Tap holes must be free of turnings. The supplier of the heat sinks should choose adequate packaging to avoid contamination and mechanical damage during transport.
Figure 29: Heatsink specification
5.2 Mounting surface
The mounting surface of SEMITOP® module must be free from grease and particles. Fingerprints on the
bottom side do not affect the thermal behavior.
Due to the manufacturing process, the bottom side of the SEMITOP may exhibit scratches, holes or small marks. Discoloration on the bottom side do not affect the thermal behavior.
Maximum allowed scratch characteristics that do not affect the thermal behavior are like the following:
It has to be noted that oxidation observed at time of manufacturing can be very different from what observed at customer’s inspection since it can be increased by environmental conditions during transportation, exposure to humidity and/or pollution and stocking of modules as customer’s warehouse. The following table describes the possible changes of copper appearance and will provide the instruments to consider a possible cosmetic issue as acceptable by incoming inspection from customer side.
The acceptance criteria is based on internal measurements of module behavior (Rth,j-s) and functionality
(including static, dynamic and reliability parameters) which proved that cosmetic issues do not affect module performances. The test results are available on request.
Table 16: Cosmetic issue acceptance matrix
Cosmetic issue description Picture
Possible presence of scratches: SKI quality inspection check if there are scratches within the specified dimensions (depth < 300m, width < 600 m, roughness < 10 m).
Roughness is intended as maximum height of the scratch tip.
Any number of scratches is allowed; each scratch must be within the copper.
Only the modules within the mentioned specified limits are shipped
Oxidized copper by flux used during soldering process, without any flux residues
Oxidized copper by heat during pin soldering process
Oxidation in small discolored spots. There is no limit to the number of the discolored spots
Copper discoloration without external contamination at the end of production process
Dark copper discoloration on all the surface
Piece showed rework by polishing of copper surface, which is allowed from SK working instructions (accepted from all customers)
5.3 Assembling steps
5.3.1 SEMITOP® with soldered terminals
SEMITOP® module can be assembled by either starting soldering the modules to the PCB and then fix the
subsystem PCB+SEMITOP® to heat sink (figure 31, left), or fixing SEMITOP® to the heat sink and then
solder to the PCB (figure 31, right)
To avoid any damage to the SEMITOP®, it is important to respect important operative conditions during
the main assembling steps such as the application of thermal grease, the soldering process and the assembly to the heat sink.
Figure 32: Assembly steps for SEMITOP® module with soldered terminals
5.3.2 SEMITOP® with Press-Fit pins
The PCB has to be fixed to the module through the press-in tool, heatsink surface must be prepared and recommended thickness of thermal grease must be stenciled onto the heatsink. Afterwards the whole system (module+PCB) can be fixed onto the heatsink.
Figure 33: Assembling “module+PCB” to the heatsink
Module+PCB Mounting screw
Thermal grease Heatsink
5.3.3 Mounting process outline
The following table compares the two SEMITOP® mounting process Table 17: Mounting process outline
5.4 Thermal grease application
To avoid air gaps at the interface between the module and the heatsink a thermal grease must be applied. The function of the grease is to flow according to the shape of the interface, allowing a metal-to-metal contact where it is possible, and filling the remaining gaps.
This metal-to-metal contact can be ensured by using a standard thermal grease or by pre-applied thermal paste.
5.4.1 Standard thermal grease specification
Recommended thermal grease material is Wacker-Chemie P12. SEMIKRON recommends a hard rubber roller or a screen print for an even distribution of the grease.
Table 18 shows the recommended average thickness of the applied grease layer:
Table 18: Recommended thermal grease thickness for SEMITOP® modules
Module types General Specification Maximum allowed thickness Minimum allowed thickness
SEMITOP® 1,2,3,4 40m ± 25% 50m 30m
The above thermal grease layer conditions apply to both SEMITOP® Soldered and Press-fit versions using Wacker P12 thermal paste type.
If there is a margin in the thermal dissipation in the specific application, and under customer approval, this thickness can be further moderated. Further evaluations have shown that even layers with thicknesses in the range of 50m - 80m do not cause any functional problem if an even distribution of the layer is respected
SEMIKRON has qualified the SEMITOP® power modules under the above mentioned conditions. It is
customer’s responsibility to qualify his own paste printing process as deviations from the recommended process may impact reliability or technical performance of the modules.
Thickness of thermal paste can be checked by the use of a gauge from ELCOMETER (Elcometer Instruments GmbH, Ulmer Strasse 68, 73431 Aalen, Tel. +49-7361-528060: Sechseck-Kamm 5-150m) shown below:
Figure 34: Measuring gauge by ELCOMETER
5.4.2 Pre-applied thermal paste specification
SEMITOP® is today offered with pre-applied thermal paste to simplify the module assembly process. The
thermal paste is applied by SEMIKRON prior to delivery to the customer, thus eliminating this critical process step from the customer’s manufacturing process. In this way assembly is more efficient, reproducible and controllable.
Main advantages are:
Optimum thickness of thermal paste layer leading to lower thermal resistance
High degree of process reliability using an automated and monitored screen-printing process
Figure 35: SEMITOP® with pre-applied thermal paste
SEMIKRON offers SEMITOP® power module with Wacker P12 (silicon based) pre-applied thermal paste
which thickness of layers is shown in the below picture for each module size. These thicknesses are obtained via a dedicated stencil process with a special pattern designed on this purpose:
Table 19: Pre-applied thermal grease thickness with the use of a special pattern
Module Pre-applied Wacker P12 thickness
SEMITOP®2 22 - 36 m
SEMITOP®3 40 - 54 m
SEMITOP®4 25 - 37 m
Table 20: Pre-applied thermal paste storage conditions
tstg Storage time Max. 18months
Tstg Storage temperature -25°C … +60°C
RTstg Storage humidity 10% … 95%
5.5 Assembling on heatsink
Once the SEMITOP® is placed onto the heatsink , SEMIKRON recommends to tighten the screw with the
corresponding mounting torque:
Table 21: Mounting specifications for SEMITOP®
Module Screw Saw tooth washer
(optional)
Flat washer Mounting torque
SEMITOP®1 DIN 912-M-4x16 DIN 6798 Form A DIN 125 1,5 Nm +0/-10%
SEMITOP®2
SEMITOP®2 Press-Fit DIN 912-M-4x16 DIN 6798 Form A DIN 125 2,0 Nm +0/-10%
SEMITOP®3
SEMITOP®3 Press-Fit DIN 912-M-4x16 DIN 6798 Form A DIN 125 2,5 Nm +0/-10%
SEMITOP®4
SEMITOP®4 Press-Fit DIN 912-M-4x16 DIN 6798 Form A DIN 7349 2,6 Nm +/-5%
SEMIKRON recommends:
a torque wrench with automatic control. Electric power screwdriver is recommended over a pneumatic tool. The specified screw parameters are better adjustable and especially the final torque will be reached more smoothly. A limitation to the mounting torque screw velocity is recommended to allow the thermal paste to flow and distribute equally. If tightened with higher velocity the ceramic may develop cracks due to the inability of the paste to flow as fast as necessary and therefore causing an uneven surface. The maximum screw velocity should not exceed 250rpm if recommended Wacker P12 paste is used. A soft level out (no torque overshoot) will reduce the stress even further and is preferable
the above recommended screws and washers
tighten the screws only once. After the mounting do not re-tighten the screws to the nominal mounting torque value. Due to relaxation of the housing and flow of thermal paste, the loosening torque is lower than the mounting torque. However, the construction of the housing, the washers and the adhesion of the thermal paste still ensure sufficient thermal coupling of the module to the heat sink
Do not exceed the mounting torque because a further increase of the maximum mounting torque will not improve the thermal contact but could only damage the module
5.6 Matching SEMITOP® and the PCB 5.6.1 SEMITOP® with soldered terminals
Use plastic anchor pins in each corner on the top of the SEMITOP® for mechanical connection between
PCB and SEMITOP®. To avoid mechanical stress to the soldering pins, the PCB has to be additionally
Suggested hole diameter for the soldering pins and the mounting pins in the PCB is 2mm.
It does not exist a limit to the number of SEMITOP® modules that could be assembled on the same PCB;
many running applications (see figure 36) consist of many SEMITOP® modules on the same PCB and the
customers never had any complaint.
Figure 36: Example of running application with multiple SEMITOP® modules on the same PCB
5.6.1.1 Soldering on PCB
SEMITOP® modules can be soldered to the PCB using the most common soldering process:
Hand iron
Wave soldering process Selective soldering equipment
Independent on the soldering process used to solder SEMITOP® modules to the PCB, SEMIKRON
recommends a thorough evaluation of the solder joints to ensure an optimal connection between SEMITOP® and the PCB.
Figure 37 shows a profile of a good soldered joint. Notice that the solder forms a concave meniscus between pin and pad. This is an example of a properly formed meniscus and it is a result of good wetting during the soldering process.
Figure 37: Good soldered joint profile
In both Figure 37 and Figure 38 it can also be seen that the soldering covers a good deal of the surface area of the pin and of the pad. This is also evidence of good wetting.
It has to be noted that the soldering joint has a smooth surface with a silver color. This is the result of good immobilization of the joint during cooling as well as good cleaning of the board prior to soldering. All soldering connections should exhibit similar characteristics regardless whether they are soldered by hand iron or wave soldering process.
Figure 38: Detail of solder joint
The time required to create a robust connection depend on several parameters:
PCB thickness: when increasing the PCB thickness, the heat dissipation capability of the PCB itself will be the higher, and thus it will require a longer soldering time
Copper wire area: pins require large copper wire to minimize resistive power losses during the current flowing. Since copper has a good heat transmission coefficient, the size of these copper wires directly affects the soldering time necessary to heat the PCB pad.
Hand iron power: power, tip size and working temperature of the hand iron affect the soldering time. These parameters have to be adjusted in order to keep the maximum temperature within the specified limit.
Lead free solder alloys type: Sn content is the key leading component that affects the soldering time
and temperature. Normally used lead free alloys are Sn96.5Ag3Cu0,5 or Sn99Cu0,7.
SEMIKRON recommends that the soldering joints should be thoroughly checked to ensure a high quality soldering joint. If necessary, different parameters should be adjusted in order to optimize the process.
A) Hand Soldering
SEMIKRON recommends to not exceed the maximum temperature of 260°C for a soldering time of 10seconds especially when several terminations must be soldered.(CEI-EN 60068-2-20).
B) Wave Soldering Profile
SEMIKRON recommends:
do not exceed the maximum wave soldering profile of figure 39;
the maximum preheating temperature has to be kept under or equal to the maximum storage temperature (125°C);
do not exceed the maximum preheating time of 100seconds;
during the soldering phase, do not exceed the maximum soldering time of 10 seconds at the maximum temperature of 245°C±5°C.
SEMITOP® modules could be soldered by a deep soldering process; the important is to avoid to exceed
the maximum soldering conditions stated in the previous items.
5.6.2 Connecting the PCB via press-fit pins
The following requirements as regards the Plated Through Hole (PTH) of the PCB need to be fulfilled according to international standard IEC 60352-5 in order to ensure the proper functioning. SEMIKRON performed all the qualification tests following these requirements. The qualification tests were done using a standard FR4 PCB with an immersion tin (I-Sn) surface finish.
The following table shows the specification of the PTH:
Table 22: Specification of PTH for the press-in process
Min. Typ. Max.
Recommended size of drill 1.6mm
Drilled hole diameter 1.575mm 1.6mm 1.625mm
Copper thickness in via 25m
Tin plating in via 0.5m
Final hole diameter 1.39mm 1.45mm 1.54mm
Cu width of the Annular ring 100m
Thickness of PCB 1.6mm
In case of soldering of Press-Fit pins directly to the PCB, the following table shows the PTH specification:
Table 23: Specification of PTH for soldering of Press-Fit pins to the PCB
Min. Typ. Max.
Drilled hole diameter 2.10mm 2.15mm 2.25mm
Copper thickness in via 25m
Tin plating in via 10m
Final hole diameter 2.00mm
Cu width of the Annular ring 100m
Thickness of PCB 0.8mm 1.6mm
The recommended hole diameter for the mounting post to fix the SEMITOP® Press-Fit to the PCB should
be in accordance with the following table:
Table 24: Specification of PCB hole diameter for the mounting post
Module type Diameter [mm]
SEMITOP4® Press-Fit 3.6
SEMITOP3® Press-Fit 2
SEMITOP2® Press-Fit 2
Particular attention must be paid for those components that need to be placed close to module pins like resistors, capacitors or diodes. A minimum distance of 4mm is required between the edge of these components and the middle of PTH; this ensures enough space for the pressing tool.
Figure 40: Distance between components and center of PTH
As the definition itself of press-fit module says, it is needed to press-in the module into the PCB for a perfect match. The available presses suitable for this process can be categorized as manual, force assisted manual, semiautomatic and fully automatic. For further details about the press-type characteristics, please refer to the SEMITOP® Press-Fit mounting instructions.
SEMIKRON qualified the press-fit technology and process by using an electric press by KISTLER.
5.6.2.1 Press-in process
The press-fit technology works well when the right electrical contact between pin and PCB is ensured. The press-fit pins therefore have to be pressed in correct depth into the holes of the PCB. To ensure a proper press-fit contact, the center of the press-fit pin head has to be at least 0.5mm below the top surface and at least 0.5mm above the bottom surface of the PCB (refer to the following picture).
Figure 41: Press-in depth in PCB
The following parameters are based on SEMIKRON press-in tool in use: Press-in force per terminal: 95±10N
Press-in speed: 5-10mm/s
In case the press-machine is equipped with the possibility to record the force-stoke values during the press-in process, some relevant values should be considered. Details about the typical vs stroke profile
Center of press-fit pin head
min. 1.6mm m in . 0 .5 mm m in . 0 .5 mm
