Set-Top Box, Residential Gateway







Full text


Set-Top Box,




Introduction and market overview

Set-top box evolves into the residential gateway (RG)

– Enabling digital video and home networking

Set-top box variations

– Digital VCR

– Net TV

Digital image processing in set-top boxes

Xilinx fit including block diagrams


DVT Theme

Set-top Box, Residential Gateway


Introduction &


Convergence Is Happening!

Invisible computing embedded within everyday devices

– Increasing intelligence of everyday appliances

Digital revolution

– Infrastructure: Circuit-switched to IP-based networks

– Analog TV to Digital TV

Internet is ubiquitous

– Being deployed within commercial channels

• Business-to-Business commerce, secure transaction processing,


Deregulation of global infrastructure


Digital Set-Top Box (STB)

Consumer device that acts as a receiver / tuner for TV

signals or service access

– Controls access to premium channels & provides other features such as pay per view

– There are separate STBs for cable & satellite systems

– Receives digital broadcast channels and converts signals (decode) to display on analog or the standard TV format

– Provide Internet access

Future set-top boxes - Residential Gateways (RGs)

– Provide home networking for information appliances

– Internet access to PCs, PC peripherals, consumer devices


Market Overview

Different types

– Support different broadband access technologies

• Cable, xDSL, Satellite, Terrestrial

– Combinations of access technologies in one box will exist

Provides improved quality

– Support for HDTV

– Allows broadcasters flexibility in terms of bandwidth vs. quality

Total market for set-top boxes is estimated to be greater

than $16.9B



• More Channels

– Increased choices

• More specialized channels

• Immediate feedback to broadcasters

– New services

• Improved Pay-as-you View

• Online shopping

• Interactive TV

• Hard-drive storage

• Instant replay

• Near Video-on-Demand

– Maximum use of available


• Improved Quality

– Support for HDTV

– No “ghosting” or other

interference effects

– Allows broadcasters flexibility in

terms of bandwidth vs quality

• Possible Internet Gateway

– Some set-top boxes allow

Internet access

– Simpler to use than PC based


Set-Top Box Evolves

into the Residential

Gateway (RG)


What is Home Networking?

Distribution of audio, video and data (convergence)

between information appliances

– Provide communication, information, multimedia & automation services anywhere and anytime around the home

• Bring the Internet to the hands of the consumer

• Interconnect people in data, voice and video

The interconnection and interoperability of

– Home appliances

– Entertainment devices

– PC hardware

– Telecommunication devices


Home Networking - Four Aspects

Distribution of information (audio, video, data) around the home and

the Internet between information appliances


What is Digital Video


Capture, process, and display of video in digital formats

– Seamless exchange of digital content

Motivations to migrate to digital video

– Connectivity

• Content utility and distribution

– Superior quality

• Digital TV and digital displays

– Form factor

• Flat panel, handheld, portable, longer life


Set-top Box / Residential Gateway

DSL Cable Satellite Wireless Home RF Bluetooth

IEEE 1394 USB / USB2.0

Home PNA Power Lines

HiperLAN2 Ethernet 802.11a,b POTS 900 MHz Cordless Phones

Integrating Broadband Access, Home Networking and Digital Video Functions into One Device

• Set-top Box • PC


Set-top Box / Residential Gateway

Key Ingredient For Home Networking

and Digital Video

Single device connects information appliances, PCs, and

PC peripherals to the Internet (modems)

– Enables communication & data transfer among networked devices in the home & across the Internet

– Bridges

• Broadband access technologies

– Satellite, ISDN, xDSL, cable modems

• Home networking technologies

– No new wires: phonelines, powerlines

– New wires: IEEE-1394, USB2.0, Optic Fiber

– Wireless: Bluetooth, HomeRF, Wireless LANs

RG Market - US$8.9 billion (by 2003)


Source: Cahners In-S tat Group

Worldwide Home Network &

Residential Gateway Forecast


Drivers for RG Deployment

Service providers expanding into integrated services

– Voice, cable & wireless industries are moving to expand their market opportunity beyond their traditional service model

– Providing multiple services over one broadband connection

– RG provides the ability to enable multiple services

– Providing non-native services through the access network


– Massive influence on business & consumers

– IP bits will one day flow around the house in applications such as entertainment, home automation, security

• RG will be the device controlling the flow of the bits between the home


Drivers for RG Deployment

New market opportunity for hardware equipment

& silicon vendors

Smart home construction

Incorporating structured wiring into the homes makes

them smarter homes

• Requires an RG that manages the network & controls the access to devices for the external network

Low cost PCs


Drivers for RG Deployment

Widespread deployment of home networking

Always-on broadband connection

– Necessary for security & home automation services

– Transforms the Internet into a viable broadcast advertising medium

Digital Video

– Interactive TV or intermingling of Internet & TV broadcasting will result in new entertainment & advertising models

– Digital TV roll out will result in the demand for new specialized broadcasts & increase in channel capacity


Hurdles to RG Deployment

Unclear ownership/economic model

– Standards

– Cost

Current services are reliable & cheap

– Service providers must compete against their legacy services and brands

– POTS, cable & satellite service is reliable & cheap

Support issues

– Service providers need to enable remote support & diagnosis


Hurdles to RG Deployment

Immature technology

Different home networking technologies are in

different stages of maturity

• Phoneline networking is most widespread

Lot of work needs to be done at the physical

connection layer & above

• Microsoft, Sun & others continue to create separate software & APIs to simplify connectivity

VoDSL & Voice over cable are still immature

compared to the reliable switched voice


Residential Gateway


Unified platform

– Provides communications, information & entertainment

– Access point between the home & outside world

Internet to Home Network interface device

– Bridges the different broadband local loop WAN & in-home LAN technologies

– Bridge between home networking technologies

– Brings bi-directional communications channel to every networked device in the home


Residential Gateway


Serves as an access platform for service providers

– Remote deployment of Internet services to the home

– Control, query & network administration functions

– Integrated firewall & security features the RG

• Facilitates authorized to the home by other third-party service providers

such as home health care provider

Provides efficient delivery of new services to the home

– Streaming video, multimedia messaging, home management & security


The Must Have’s in a


Broadband access

Security & privacy firewall

– Supports secure e-commerce transactions, remote home control & access from authorized service providers

QoS supporting a multiple of intelligent devices

– Different OEMs will make devices that compete for bandwidth

Upgrade platform

Application server for distributed computing

Multi-layer network bridging


The Evolution

Set-top box - today

– Deliver signals to a single device like cable TV or PC

– Limited in its placement

– Some advanced models provide hard-disk drive storage and web browsing (interactive) capabilities

Evolves into a RG

– Designed to distribute a broadband signal to multiple devices throughout the home

– Expand on the capabilities of advanced set-top boxes

– Flexibility of locating wherever convenient

– Provide other services such as automated meter reading and home automation


Set-top Box

Hard Disk Drive NTSC PAL Encoder I/O Control, Glue Logic, Memory Controller , System Controller, Microcontroller QAM Decoder and



OFDM Decoder and FEC


On Screen Display & Graphics Generator HDD Interface Clock Generator & DLLs MPEG Decoder Conditional Access Smart Card In ter fa ce 10/100 Base-TX Ethernet MAC MII 10/100 Base-TX Transceiver Audio-Video DACs To T.V.

USB Dev ice

Controller Transceiver USB


Set-Top Box: Residential Gateway

Hard Disk Drive NTSC PAL Encoder I/O Control Satellite QPSK Decoder and FEC QAM Decoder and



OFDM Decoder and FEC


DSL Driver/ Receiver, Transceiver and FEC


On Screen Display & Graphics Generator HDD Interface Clock Generator & DLLs MPEG Decoder & CPU Glue Logic Memory Glue Logic Conditional Access Smart Card In ter fa ce 10/100 Base-TX Ethernet MAC MII 10/100 Base-TX Transceiver HomePNA Analog Front End (AFE) USB Transceiver UTP RJ-45 USB Dev ice Controller IEEE 1394/FireWire RS-232 Audio-Video DACs To T.V. Bluetooth

Module HCI Bridge


Broadband Access


ADSL - Asymmetrical Digital Subscriber Line

– Comes in several forms

• G.Lite ADSL & G.dmt ADSL

– Always on & phone line is not tied up

– Downstream speeds up to 8Mbps & upstream rates up to 1.5Mbps


– Internet access on the same cable as regular cable TV

– Offered by cable companies

– Subscriber requires a cable modem

– Potential speeds up to 10Mbps


Broadband Access


ISDN - Integrated Digital Services Network

– High-speed, fully digital telephone service

– Can operate at speeds up to 144Kbps

• 5 or more times faster than today's analog modems

– Widely available


– Direct broadcast satellites that transmit TV programs can also provide Internet access

– Satellite dish can deliver download speed of up to 350Kbps


Home Networking Technologies

Choosing the Right Path

No New Wires WirelessHomePNA (Phonelines)HomePlug (Powerlines)HomePNA (Phonelines)HomePlug (Powerlines) New WiringEthernetIEEE-1394Optical FiberUSB/USB 2.0EthernetIEEE-1394Optical FiberUSB/USB 2.0IEEE 802.11BluetoothHomeRFHiperLAN2IEEE 802.11BluetoothHomeRFHiperLAN2



Software system

Connects information appliances to exchange both

control information and streaming multimedia content

– Compares to the presentation layer of the OSI (Open Systems Interconnect) seven layer network model

Used to isolate application programs from the details of

the underlying hardware and network components



Residential Gateway - Tying the

Different Information Appliances

Residential Gateway Sound Systems Kitchen Pad

Security Camera Media Server Thin Clients VoIP Phones PDAs Notebook PCs Gaming Devices MP3/Internet Audio Players Camcorder


RG Evolution: An

Incremental Change


Phase 1 Residential


These gateways are not IP based devices & have low


– High-speed access to the house


– Digital set-top box RGs

– Utility-centric RGs or service gateways

• Enable automated meter reading (AMR), energy optimization,

management & monitoring

– PCs

– Gaming consoles

– Digital modems / broadband access devices


Phase 2 Residential


Devices that bridge one WAN pipe to one LAN


Configurations are digital modems connected to a PC or

stand alone devices with the intelligence to handle all of

these functions without the aid of a PC

Conduct majority of routing functions & IP address mgmt

Broadband access termination devices with integrated

LAN hubbing routing functionality

Targeted by service providers & equipment OEMs for

wide scale deployment as RGs in the next 2-3 years


Phase 3 Residential


• These devices will be based on products available today • Will terminate several LAN & WAN types

– Multiple types of WAN connections (wireless, DSL, cable)

– Multiple LAN connections (Ethernet, RF, HPNA, IEEE-1394)

• Features

– Modular in design

– Deliver telephony (voice) and video services

– Easier to set up

– Remote management is possible

– Expensive

– Will be owned by the consumer

• Service providers do not inherently share CPE equipment


Third Generation RGs

Internal Gateway Bus ADSL Cable Wireless Ethernet HPNA RF IEEE-1394

Conceptual 3rd Generation RG Supporting Multiple WAN & LAN Interface


The “Perfect” RG

Terminates all external nodes Enables multiple services

to create surplus value for both consumers & service provider(s) Provision for

future home services

Seamlessly integrates with all existing home systems

& electronic devices

Flexibility to allow different means of distribution & installation

The Residential



RG - Classification Model

Source: Parks Associates

Service Specific Gateway Terminates a specific external

network & enables a specific service

(e.g.: Network NIU Device)

Thin-Server Gateway Terminates multiple or any external networks & enables

one or more services (e.g.: Ericsson’s e-Box) Convergence Gateway

Terminates a specific broadband network & enables multiple services & applications

(e.g.: Advanced Set-Top Box)

Whole-House Gateway Terminates all external networks & enables all services

to the home

(e.g.: RG Group’s Concept)

Single Network Multiple Networks

Access Network Si mp le C omp le x R G Func tiona lit y


Preferred Provider for

Bundled Services

Preferred Providers of Packaged Services

0 10 20 30 40

Electric Utility Company Local Telephone Company Don't Know Cable TV Company Long Distance Company Satellite TV Company Separate Provider for Each Service

Service Provider



Set-Top Box


Digital VCRs



Digital Video


* Source: Cahners In-stat (Feb 2000)

Digital Video Recording


– Based upon streaming hard-drive technology

– Simultaneous record & playback of independent video streams

– 10 Million units by 2003 - 50% CAGR*

– Multiple design wins

• DVD - Digital Versatile Disk

– Based upon recordable digital video disk technology

– Positioned to replace VCR

– The highest acceptance rate of any consumer product ever

– Competing formats: -R, RAM, RW, +RW

– Industry giants are divided in their support for each format




– Product that uses local storage to enable the user controlled storage and playback of live digital video streams on a real-time basis

– Functionality includes the ability to simultaneously record & playback separate video streams or different portions of the same stream in real time

Application - Television broadcast control

Other names

– Personal video recorders (PVRs), digital VCR, DVR-enabled set-top boxes



Fast growth is being predicted for DVR-enabled


13 million shipments in the US in 2004

U.S. installed base totaling 32.1 million units

Functionality can be incorporated directly inside

the TV set or included in set-top boxes

Built-in modem the DVR-enabled device

Dials a service provider


DVR’s Capabilities

Using a hard drive instead of a tape gives DVR

the following capabilities

Real-time recording

Storing in digital video (high) quality

Instant access

Proactive and quick TV management


Market Forecast / Analysis

Current State

– Hot category, growing vendor support


– WW unit CAGR of 91% (2000-04)

– 19M WW units in ’04.


– Single functionality, vendor support, component cost declines




TV-centric information appliances that provide Internet


– Use the TV as their primary display

– Standalone products that are set on top of the TV (“set-top”)

– TVs with Internet connectivity built in at the time of manufacture

– Examples: set-top boxes, integrated TVs, enhanced traditional cable boxes, direct satellite devices


– Communications module (modem), core processor, OS, display driver, usage-specific applications such as Web browser, email client



Offerings provided

– Basic

• Limited interactive electronic programming guides or customized

information tickers

– Advanced

• Full graphical Web browsing, video email

Bluetooth functionality will be integrated to 8% of NetTV

shipments by 2004 in the US


0 2 4 6 8 10 12 14 16 18 20 1998 1999 2000 2001 2002 2003 2004 Worldwide Units (M)

Growth Accelerators &


• Accelerators

– Infrastructure upgrade: back

end to clients

– Consumer interest in the

Internet and new services

– Intense competition and drive

for new revenue

• Inhibitors

– Consumer interest in interactive


– Costs


Digital Image

Processing in

Set-top Boxes


Dots Amazing!

The captured digital images are comprised of


“Pixel” stands for Picture Element

Images are made

from captured

2D pixel maps

– X pixels wide

– Y pixels tall

These dimensions

define the resolution

of the image captured

e.g. 1024 X 768

These Colored Dots are Called




Zooming In

• Each pixel is comprised of three sub-pixel elements: one each for

Red, Green, and Blue, each respectively represented by separate binary (digital) values


RGB Combine to Make Colors

The sub-pixel RGB intensity of each pixel controls its color

This mixing is decidedly not intuitive

– Note that maximum red, medium green, and medium to high blue make pink! White = Max Red Max Green Max Blue Pink = Max Red Medium Green Med./High Blue Medium Gray = Medium Red Medium Green Medium Blue Black = No Red No Green No Blue


Image Processing Functions

Pixel processing

– Color space conversion

– Scaling

– Color/Gamma correction

– Brightness

– More colors through dithering

Frame buffer processing

– Contrast enhancement

– Shadow enhancement

– Sharpness enhancement

– Chroma key compositing


Basic Image Processing

Color Space Conversion

To speed many processing tasks an alternate color space is

often preferable to RGB

– Many video and imaging standards use a luminance and color difference color space such as YCrCb or LUV

To support real-time image processing, high performance

conversion is necessary between the source and target


– RGB2YCrCb: Converts RGB to Luma - Croma Red - Chroma Blue

– YCrCb2RGB: Converts YCrCB to RGB

– RGB2LUV: Converts RGB to Luma - U color diff. - V color diff.


Basic Image Processing


Fractionally enlarges the incoming data stream as


Basic Image Processing

Color/Gamma Correction

Adjusts RGB intensities through correction tables

Required to account for technology specific RGB


Basic Image Processing



Basic Image Processing

More Colors Through Dithering

• Smooths out color transitions (banding) in bit-depth limited displays • Generates patterns of pixels which the eye blends together into


Advanced Image Processing

Contrast Enhancement

Adjusts RGB intensities to control the degree of


Advanced Image Processing

Shadow Enhancement

Selectively adjusts RGB intensities in order to


Advanced Image Processing

Sharpness Enhancement

Adjusts RGB intensities to sharpen the transition


Advanced Image Processing

Chroma Keyed Compositing

Composites 2 images together, replacing a specific RGB

value in one image (chroma) with the data pixel from the



Advanced Image Processing

Graphic Overlay


Xilinx Solutions for

Set-Top Boxes and



Xilinx Envisioned Gateway


– Single “small” box

– Enable high-speed, two-way Internet, voice & video communication

• Distribution of broadband services within the house/small office

• Seamless connection & simultaneous operational capabilities

– Multiple digital phone (VoDSL) lines

• Separate standard existing telephone line & separate data line

– Allow secure access from any Internet-accessible remote location via any standard Web browser

– Firewall security protection

– Extremely affordable price points

– Minimize truck rolls

• Management software for remote provisioning, service management,



Multiple broadband access & multiple home networking


– Too many standards and too many specs

• No clear direction

• Each standard brings its own set of pros & cons

• Future revisions are in the works

– Solutions are just coming to market

– Leading players are showing indecisiveness towards different varying technologies

• Building independent solutions

• Participation in multiple consortiums

• Different wireless standards for same frequency band


Implications of this Chaos...

Brings about an environment that guarantees

unanticipated problems

– Bugs

– Incompatibilities

– The Great Unknown about what is going to be, changes

Translates to a steep learning curve

– Virtually mandates a “Ready, Fire, Aim” development model

• Plan products for the longest life cycles

• Get a product to market “now”


Introducing the


High Performance System Features Software and Cores

Smallest Die Size Lowest Possible


Low Cost Plastic Packages Streamlined Testing


Spartan FPGAs

A Natural Fit for Digital Convergence

Xilinx Solutions Allow Customers To Thrive in Chaos

– FPGAs traditionally offer fast time-to-market

• First to market, increases market share and revenue advantage

– Xilinx Online offers reconfigurability in the field

• Allows shipped product to support revisions to the spec

• Enables unique opportunities to add value

• Increases lifecycle revenue yield & hence time-in-market

– Enables rapid product proliferation

• New designs can be quickly turned into derivatives

– Superior lifecycle component logistics

– Proven FPGA technology, software, test benches


Spartan-IIE Features - Value

for Digital Video

Spartan-IIE Silicon Features Value for Digital Video Applications

FPGA Fabric and Routing, Up to

300,000 System Gates Performance in excess of 20 billion MACs/second

Delay Locked Loops (DLLs) Clock multiplication and division, clock mirror, Improve I/O Perf.

SelectIO - HSTL-I, -III, -IV High-speed SRAM interface

SelectIO - SSTL3-I, -II; SSTL2-I, -II High-speed DRAM interface

SelectIO - GTL, PCI, AGP Chip-to-Backplane, Chip-to-Chip interfaces

Differential Signaling - LVDS, Bus LVDS, LVPECL

Bandwidth management (saving the number of pins), reduced power consumption, reduced EMI, high noise immunity

SRL-16 16-bit Shift Register ideal for capturing high-speed or

burst-mode data and to store data in DSP applications

Distributed RAM DSP Coefficients, Small FIFOs

Block RAM Video Line Buffers, Cache Tag Memory, Scratch-pad Memory,


Spartan-IIE Core Support

• On-chip memory & storage

– Distributed, BlockRAM, FIFOs

• Bus products

– PCI (64- & 32-bit, 33/66MHz), Arbiter, CAN bus interface

• DSP Functions (FIR filter) • Error correction

– Reed-Solomon, Viterbi

• Encryption (DES & triple


• Microprocessor

– ARC 32-bit configurable RISC,

8-bit 8051 microcontroller

• Memory controllers (10+)


• Communications


Ethernet (MAC)

• Telecom

– CDMA matched filter, HDLC,

DVB satellite, ADPCM speech codec

• Video & image processing

– JPEG codec, DCT/IDCT, color

space converter


System Block

Diagrams for Set-top

Boxes and




Set-top Box

Hard Disk Drive

NTSC PAL Encoder

I/O Control, Glue Logic, Memory

Controller , System Controller, Microcontroller QAM Decoder and



OFDM Decoder and FEC


On Screen Display & Graphics Generator HDD Interface Clock Generator & DLLs MPEG Decoder Conditional Access Smart Card In ter fa ce 10/100 Base-TX Ethernet MAC MII 10/100 Base-TX Transceiver Audio-Video DACs To T.V.

USB Dev ice

Controller Transceiver USB


Hard Disk Drive I/O Control Satellite QPSK Decoder and FEC

QAM Decoder and FEC


OFDM Decoder and FEC


DSL Driver/ Receiver, Transceiver and FEC


On Screen Display & Graphics Generator HDD Interface Clock Generator & DLLs MPEG Decoder & CPU Glue Logic Memory Glue Logic Conditional Access Smart Card In ter fa ce 10/100 Base-TX Ethernet MAC MII 10/100 Base-TX Transceiver HomePNA Analog Front End (AFE) USB Transceiver UTP RJ-45 USB Dev ice Controller IEEE 1394/FireWire RS-232 Audio-Video DACs To T.V.

Digital VCR

Digital Memory Mixed Signal uP or uC Programmable IP Block

NTSC PAL Encoder


DRAM I/O Control Satellite QPSK Decoder and FEC Cable SDRAM Controller

Digital Video & Digital Audio QAM Decoder and FEC 32-bit System Processor Audio/ Video Buffer Clock Generator & DLLs Descrambler Cache/Bus Controller General Purpose I/Os MPEG Decoder & CPU Cache I2C IEEE 1284 Parallel Port Audio-Video DACs DRAM SDRAM Controller Peripheral Bus Glue Logic RS232 Serial

UART Smartcard Interface

Set-Top Decoder Box


CPU MPEG Video Decoder DRAM DRAM NTSC/PAL Encoder Decoder Bus Demod Memory Controller MPEG Audio Decoder Audio DAC UART Transport Demux Decrypt Descrambler Tuner Module DRAM PC Back Channel UART Parallel DRAM Graphics DRAM 1394 PHY Home Network Hard Drive Controller Satellite Cable Terrestrial Phone PCMCIA Card Reader NTSC/PAL Decoder CVBS, Y/C TV Hard Drive 1394 MAC Error Correction QPSK & FEC QAM & FEC OFDM & FEC DSL & FEC

Set Top Box


Cable Modem Residential/Gateway

Decry ption Conditional Access Flash Cable MAC/SAR 8-/16-/32- bit Microcontroller FEC Memory 4 v oice channels or 1 v ideo & 1 v oice channel Tuner SAW Analog IF/AGC ADC QAM

Demodulator DecoderFEC


Modulator EncoderFEC

10/100 Base-TX Ethernet MAC Pow er Supply MII SDRAM Controller 10/100 Base-TX Transceiver

HomePNA Analog Front End (AFE)


Transceiver UTP


IP Telephony USB Dev ice

Controller DMA Interrupt Controller & Central Arbiter Encry ption DMA Clock Generator & DLLs In ter fa ce Flash Controller SDRAM SRAM IP Security Module (DES & Triple-DES)


Interface SDRAM Controller



Set-Top Box: Residential Gateway

Hard Disk Drive I/O Control Satellite QPSK Decoder and FEC QAM Decoder and



OFDM Decoder and FEC


DSL Driver/ Receiver, Transceiver and FEC


On Screen Display & Graphics Generator HDD Interface Clock Generator & DLLs MPEG Decoder & CPU Glue Logic Memory Glue Logic Conditional Access Smart Card In ter fa ce 10/100 Base-TX Ethernet MAC MII 10/100 Base-TX Transceiver HomePNA Analog Front End (AFE) USB Transceiver UTP RJ-45 USB Dev ice Controller IEEE 1394/FireWire RS-232 Audio-Video DACs To T.V. Bluetooth

Module HCI Bridge

Digital Memory Mixed Signal uP or uC Programmable IP Block

NTSC PAL Encoder


Spartan-IIE Solutions (IP) for

Digital Video Processing

• Digital Signal Processing

– DCT/IDCT (MPEG Decoding)

– Color Space Converters

– FIR Filter – Error Correction • I/O Control – HCI Bridge – PCI – USB 1.1/2.0 Controller – IrDA Interface – IEEE-1394 – IEEE-1355 • System Logic • Clock Distribution • Memory interface

– SRAM, SDRAM Interface

– FLASH Memory Adapter

– HDD interface

• Encryption/conditional access • Home networking


Analog Video A/D Converter Digital Image Processing uC Optional Digital Decode Technology Specific Display Driver RGB Video Video Decoder Optional Frame Buffer RAM Digital RGB A nal og RG B

Generic Video System Diagram

Digital Memory Mixed Signal uP or uC Programmable IP Block PHY


Programmable Logic Utility

Where FPGAs Add Value

Digital Memory Mixed Signal uP or uC Programmable IP Block

Analog Video A/D Converter Digital RGB Video Video Decoder Optional Frame Buffer Memory Digital RGB A nal og RG B Image Processing uC Optional Digital Decode Technology Specific Display Driver PHY


Display System Design Challenge

Clock Mgmt Decode & Decrypt Analog Video A/D Converter Digital Optional Digital Decode RGB Video Video Decoder Digital RGB A nal og RG B Buffers / Memories SDRAM SRAM

User Designed I/O

U ser D es ign ed I/O U ser D es ign ed I/O Sub-System Controllers FLASH Di sp la y D riv er Hard Disk Image Processing I/O Controllers Sub-System I/O System Control LV D S BL V D S PC I PC IX AG P Et c. PHY

FPGA Display System Utility


Clock Mgmt

Decode & Decrypt

FPGAs Accelerate Time-to-Market

Analog Video A/D Converter Digital Optional Digital Decode RGB Video Video Decoder Digital RGB A nal og RG B Buffers / Memories SDRAM SRAM

User Designed I/O

U ser D es ign ed I/O U ser D es ign ed I/O Sub-System Controllers FLASH Di sp la y D riv er Hard Disk Image Processing I/O Controllers Sub-System I/O SDRAM

Controller ControllerSRAM ControllerFLASH ControllerEIDE


2D FIR Filter RGB2YCrCb

JPEG System ControluC RGB2YUV 2D FFT YCrCb2RGB YUV2RGB Syst em I/ O Syst em I/ O

Block RAM Distributed RAM

DLL LV D S BL V D S LVDS / BLVDS PC I PC IX AG P Et c. System I/O System I/O



FPGA Display System Utility





Xilinx Solutions in Gateways

Multiple responsibilities within the gateway

Enabling broadband local loop in digital modems

• xDSL, cable, satellite


• Enabling different technologies to co-exist

Access points

Enabling the information appliance network

• Within information appliances


Enabling Digital



256 Tap FIR Filter = 256 multiply and accumulate (MAC) operations per data sample Conventional DSP


(Von Neumann architecture, or extensions thereof) Data Out Reg Data In Loop Algorithm 256 times MAC unit

Performance Limitation of

Conventional Programmable DSP

• Fixed inflexible architecture

– Typically 1-4 MAC units

– Fixed data width

• Serial processing limits data


– Time-shared MAC unit

– High clock frequency creates

difficult system-challenge

• Multiple DSPs required to

meet bandwidth needs

– Power and board space are




Data Out

C1 C2 C255


Reg0 Reg1 Reg2 Reg255

Data In

All 256 MAC operations in 1 clock cycle


256 Tap FIR Filter = 256 multiply and accumulate (MAC) operations per data sample

Performance Advantage of


• Flexible architecture

– Distributed DSP resources

(LUT, registers, multipliers, & memory)

• Parallel processing

maximizes data throughput

– Support any level of parallelism

– Optimal performance/cost


• FPGAs also support serial




(F ree T ran si st or s)


DSP Processors: Sequential Processing


5 nsec 500 nsec

Processor requires a

>10 GHz Clock

for equivalent performance

200 MHz Clock X + • • • FP G A: P ar al le l P ro cess in g X + X+ Multiply Accumulates

Trading “Area” for



DSP Processors DSP Processors










FPGAs Offer the Best Solution

First use of multiple MAC units


Designer must choose

between flexibility

and performance

2 micron 0.25 micron Custom ICs Custom ICs

• •


DSP Processors DSP Processors













• •

1996 1989 2001

FPGAs Offer the Best


2 micron 0.25 micron

Custom ICs

Custom ICs


Xilinx - Provides The Ultimate

Digital Signal Processing


• Spartan-IIE FPGA fabric/architecture

– Specialized features for DSP functions

– Advanced, deep sub-micron process

– Migration to higher density, DSP-friendly FPGAs - Virtex-II

– More gates = more parallel processing = higher performance

– Segmented routing & LUT based architecture is superior for DSP

• Extensive DSP and related IP Portfolio

– Parameterized IP cores with Smart-IP automatically yields optimal


– Core generators

– DSP Focused Tools

• Visual dataflow (System Generator for Simulink)

• HLL (C/C++, Matlab M-code)

– Reference designs


Flexibility of DSP Processors Performance of Custom ICs

Spartan-IIE DSP Solutions Offer the Best of Both Worlds with Low Cost!

Spartan-IIE DSP Advantages

Off-the-shelf devices

Faster time-to-market

Rapid adoption of


Real-time prototyping

Parallel processing

Support high data rates

Optimal bit widths

No real-time software


Spartan-IIE - The DSP


• Performance

– In excess pf 20 billion MACs per second

– Tremendous parallel processing capability

• Distributed DSP resources, segmented routing and flexible architecture allow optimized implementation of algorithms

• No instruction flow overhead

– High-memory bandwidth

• Distributed RAM to store DSP coefficients and FIR filters

• True dual-port BlockRAM

– Optimized data buffering and storage

– Applications like FFT for next generation HDTV, video line buffers

– DLL for multi-rate clocks

– High I/O bandwidth and flexible interfaces

• Supports 19 high-speed signal & memory interface standards – LVDS, LVTTL, SSTL, HSTL, GTL+, PECL …



• Error Correction

– Reed-Solomon

– Viterbi Encoder/Decoder

• FIR Filter Generator

– Polyphase decimator

– Polyphase interpolator

– Half-band filters

– Hilbert transform

• FFTs

• Direct Digital Synthesizer

– Includes quadrature output

• Voice Coding

• Enhanced Direct Digital


• Turbo Convolutional


• 3GPP Interleaver/De-interleaver

• Digital Down Converter

• PN Sequence Generator

– Gold code support

• Correlators


System Generator for


Bridges gap between FPGA

and DSP design flows

– Used with Simulink®/MATLAB®

from The MathWorks

Automatically generates

HDL/optimized algorithms

– Shortens learning curve

– HW redesign eliminated

– Optimal implementation


DSP Design Flow

FPGA Design Flow



Industry first System Generator for Simulink


bridges gap between FPGA and conventional

DSP design flows

Unique constraint-driven Filter Generator allows

optimization between performance and cost

Power estimator tool (Xpower

) for power-sensitive DSP


11 optimized DSP algorithms/cores that cut development

time by weeks

DSP features added to ChipScope ILA tool dramatically


Video/Image Processing IP


– Inverse Discrete Cosine Transform (IDCT)

– 1-D Discrete Cosine Transform

– 2-D DCT/IDCT Forward & Inverse Discrete Cosine Transform


– FastJPEG Color Decoder

– Fast JPEG B/W Decoder

logiCVC - Compact Video


Color Space Converter





The MPEG Algorithm

The MPEG Encoder is composed of a number of discrete

algorithmic sections:

Temporal Processing

– Seeking out and removing temporal redundancy

• Involves storing several successive images and performing motion

estimation, compensation and simple algorithmic processing to derive a pixel-by-pixel difference signal

Spatial Processing

– Uses DCT to remove the high frequencies not discernable by the human eye

Statistical or Variable Length Encoding (VLC) to remove


DCT/IDCT Concept

What is DCT?

– Discrete Cosine Transform

– Returns the discrete cosine transform of ‘video/audio input’

– Can be referred to as the even part of the Fourier series

– Converts an image or audio block into it’s equivalent frequency coefficients

What is IDCT?

– IDCT - Inverse DCT

– The IDCT function is the inverse of the DCT function

– The IDCT reconstructs a sequence from its discrete cosine transform (DCT) coefficients



Courtesy: The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith

Original Image

Restored Image

(Notice Lesser Image Quality)

The image is broken into 8x8 groups, each containing 64 pixels. Three of these 8x8 groups are enlarged in this figure, showing the values of the individual pixels, a

single byte value between 0 and 255.

DCT DCT Frequency Coefficients Compared to Magnitude Thresholds, Resulting in Compressed Data Stream IDCT IDCT

DCT/IDCT Concept


Divide picture into 16 by 16 blocks. (macroblocks) Each macroblock is 16 pixels by 16 lines. (4 blocks)

Each block is 8 pixels by 8 lines.


8 X 8 Block Frequency


Detailed steps in dissecting a typical digital still image prior to being DCT transformed


DCT/IDCT Compression

Compression allows increased throughput

through transmission medium

Video & audio compression makes multimedia

systems very efficient

• Increases CPU bandwidth

• Higher video frame rates

• Better audio quality

• Enables multimedia interactivity

DCT/IDCT are widely used in video & audio



LogiCore Features

Combined DCT/IDCT core

Continuous one symbol per cycle processing


Internal precision

14 bit cosine coefficients

15 bit transpose memory

Optimized for specific Xilinx architecture

Fully compliant with the JPEG standard



DCT/IDCT Core Overview

• 2D transform decomposed

into 2 1D - operations (Stage 1 and Stage 2)

• Intermediate results stored in

Transpose Memory

• Forward DCT - 8-bit unsigned

input,11-bit signed output

• Inverse DCT - 11-bit signed

input,8-bit unsigned output

• Continuous streaming - one

sample per cycle processing capability DctIDct CLK Pixel Input Interface InProg CLR RSTn Stage 1 Stage 2 Transpose Memory IDCT Input Interface DCT Output Interface Pixel Output Interface Half-Duplex Operation


1 3 180 0 50 100 150 200 266MHz 32-bi t uP 266M Hz 32-bit uP w ith Multime di a Ex te nsions Sparta n-I IE Re la ti ve P er fo rm an c e

Top End Set-Top Box


• Spartan-IIE FPGAs provide low cost, high performance MPEG


– DCT/IDCT AllianceCORE IP from Xentec


Implementation of DCT/IDCT

Target Device Spartan-IIE

xc2s200E-7 Virtex-Excv200e-8 Spartan IIxc2s150-6

Speed 75 MHz (est.) 80 MHz 71.4 MHz SDTV (27 MHz) Time Multiplexed Channels 3 3 2 HDTV (75 MHz) Time Multiplexed Channels 1 1 N/A Size (Slices) 1759 1759 1728


Other Spartan-IIE

Solutions for

Digital Video



High Performance Soft CPU

Clock Rate (MHz) Dhry ston e MIPS 50 125 50 Nearest Competitor

One MicroBlaze is Half the Size

and Twice the Performance

of the nearest competitor as measured with

Dhrystone MIPS benchmarks

70 MicroBlaze MicroBlaze Was 50 D-MIPS Now 70 D-MIPS


System Diagram





Machine Status Reg

Program Counter Da ta Bu s Co n tr o lle r Register File 32 x 32bit r0 r1 r31 On-Chip Instruction Memory 0-256KB On-Chip Data Memory 0-256KB Instruction Buffer In st ru ct io n B u s C o n tr o lle r Control Unit Add / Subtract Shift / Logical Multiply CoreConnect OPB I/F Off-Chip Memory 0-4GB Off-Chip Memory 0-4GB UART Timer / Counters Interrupt Controller General Purpose I/O Watchdog Timer CoreConnect OPB I/F


Configuration Flow

For each

Microprocessor System System Analysis:System checks

Parameter consistency Interconnection inference Resource analysis Performance analysis Assign device Ids Compute configuration ROM data FPGA Implementation Tools HDL simulation/synthesis Mapping Placement Routing Bitstream generation Code Generation Design implementation Simulation model Software Select: Processor Peripherals Buses

System & App SW

Customize: HW IP parameters SW IP parameters System parameters GUI: Navigator view Topology view Selection customizer Shopping Cart: Performance estimates Power requirements Resource counts System & App SW


TM UART Local OPB Bus Local OPB Bus Mic roB laze Mic roB laze Mic roB laze CoreConnect Technology tm Arbiter GPIO Interrupt Controller SRAM Controller SRAM

in Spartan-IIE




– Twice the performance at half the logic area vs. competition


• 100+ D-MIPS next year


– Architect a processor system using the right device with as many processors as needed


– MicroBlaze & PowerPC use the CoreConnect™OPB


Universal System Interface

SCSI PCI-X I2C µWire SPI PCMCIA Compact PCI Wireless LANs Ethernet Cardbus CAN Bus Pick your I/F

USB 2.0



QPSK Decoder and FEC QAM Decoder and FEC OFDM Decoder and FEC xDSL !

Spartan-IIE FPGA Allows Interface To Multiple

Front Ends

Front End (Broadband

Access) Interface

• Not cost effective to support multiple receivers

– Cable, terrestrial, satellite and xDSL

– Requires multiple set-top box designs

Interface required to support multiple ASSPs

Choice of ASSP influenced by broadcaster features


Clock Generation and


Spartan-IIE DLL circuits provide full clock management


Clock generation

– Synthesizing many clocks from a single reference crystal or clock

Clock buffering and distribution

– Providing multiple copies of a single clock

– SDRAM clocks

Spread spectrum clocks for EMI reduction


Spartan-IIE Memory


1998 1999 2000

200 MHz Memory Continuum - Transparent Bandwidth

DSP Coefficients Small FIFOs


Distributed RAM

Large FIFOs

Video Line Buffers Cache Tag Memory

4Kx1 2Kx2 1Kx4 512x8 256x16 Block RAM SDRAM SGRAM PB SRAM DDR SRAM ZBT SRAM QDR SRAM External Memory Interface Memory C orner Free Refer ence Desi gns Memory C orner Memory C orner Free Refer ence Desi gns Free Refer ence Desi gns


Spartan-II True Dual-Port Block RAM Port A Port B W R W R W R R

W Data Flow Spartan-II

A to B Yes

B to A Yes

A to A Yes

B to B Yes

Spartan-IIE Block RAM

True Dual-port Static RAM - 4K bits

– Independently configurable port data width

– 4K x 1; 2K x 2; 1K x 4; 512 x 8; 256 x 16

– Fast synchronous read and write


Spartan-IIE Memory


Spartan-IIE FPGAs

Unique and extensive features, flexible architecture,

low cost

Memory controller for interface to different types

of SRAM, DRAM & Flash memory

Xilinx provides FREE VHDL source code for


These Reference Designs are Available for Immediate Download at Memory Corner

Memory Controller

Reference Designs

• DRAM reference designs

– 64-bit DDR DRAM controller

– 16-bit DDR DRAM controller

– SDRAM controller

• SRAM reference designs

– ZBT SRAM controller

– QDR SRAM controller

• Flash controller

– NOR / NAND flash controller

• Embedded memory reference


– CAM for ATM applications

– CAM using shift registers

– CAM using Block SelectRAM

– Data-width conversion FIFO

– 170MHz FIFO for Virtex


Memory Corner

• Collaboration between Xilinx and major memory vendors to

provide comprehensive web-based memory solutions

• Free reference designs (VHDL/Verilog)

• SRAM, DRAM & embedded FPGA memory solutions

• Data sheets, app notes, tutorials, FAQs, design guidelines

Memory C orner Offe rs Free Refer ence Desi gns Memory C orner Offe rs Free Refer ence Desi gns


Data Encryption

Motivation for data encryption & cryptography

– Data privacy (Integrity & Secrecy)

– Authenticating the source of the information

Several methods of data encryption exist

– RSA (Rivest-Shamir-Adleman), Diffie-Hellman, RC4/RC5

– Secure Hashing Algorithm (SHA), Blowfish

– Elliptic Curves, ElGamal, LUC (Lucas Sequence)

– DES (Data Encryption Standard) & Triple-DES (TDES)


Xilinx Spartan-IIE + IP Cores today provide


Copy Protection Efforts


Copy Protection - FPGAs

Add Significant Value

Security Systems Standards and Certification Act (Draft)

– Calls for interactive digital devices to include security

technologies certified by the U.S. Secretary of Commerce

The bill becoming a law will prevent companies from

shipping products without appropriate security

– There is however no guidance on security schemes

– A hardware based security implementation is preferred

Lack of consensus between companies on the

encryption schemes and their implementation is leading

to chaos

Copy protection for digital video products is in it’s infancy


Note: Solution includes encry ption, decryption and key generation * 128-bit key implementation

** Key Generation offloaded to embeddedµC/ µP

Spartan-IIE Encryption


Spartan-IIE encryption solutions are NIST approved

The programmable nature of these solutions allows easy


Spartan-IIE Advantages Over

Hardware & Software Solutions

High Flexibility Low Performance High Performance Low Flexibility High Performance High Flexibility

Enhanced Security & Performance Hardware Hardware Solutions Solutions Software Software Solutions Solutions


FPGA Drives New STB


Spartan-IIE FPGA drives a new generation of set-top box

– Capability to store video on hard disk drives

– Provides capability to record and view video simultaneously (digital VCR)

Provides data buffer and disk control logic

– On-chip memory for FIFOs

Provides ability to support evolving disk drive


– Optimized for simultaneous disk read and write


Types of Storage for STBs

Mechanical hard-disk drive storage solutions

Solid-state flash memory storage

Required functions for a STB flash

file-management system include

Mapping the file structure of the RTOS to the physical

flash system

Increasing the endurance and lifecycle of the

flash memory





Related subjects :