EEM 486: Computer Architecture. Lecture 4. Performance

EEM 486

EEM 486: Computer Architecture

Lecture 4

Performance

Performance

• Purchasing perspective

– Given a collection of machines, which has the » Best performance ?

» Least cost ?

» Best performance / cost ? • Design perspective

– Faced with design options, which has the » Best performance improvement ? » Least cost ?

» Best performance / cost ? • Both require

– basis for comparison – metric for evaluation

Lec 4.3

Which airplane has the best performance?

Performance measure:

Speed (cruising speed, range, capacity)

Plane Boeing 747 Concorde Speed 610 mph 1350 mph DC to Paris 6.5 hours 3 hours Passengers 470 132 Throughput (p x mph) 286,700 178,200

Which is the fastest plane?

the one with the highest cruising speed OR the one with the highest throughput

• Time of Concorde vs. Boeing 747?

Concord is 1350 mph / 610 mph = 2.2 times faster

= 6.5 hours / 3 hours • Throughput of Concorde vs. Boeing 747 ?

Concord is 178,200 pmph / 286,700 pmph = 0.62 times faster

Boeing is 286,700 pmph / 178,200 pmph = 1.60 times faster

• Concord is 2.2 times (120%) faster in terms of flying time • Boeing is 1.6 times (60%) faster in terms of throughput

Lec 4.5

Computer Performance

Execution (or Response) Time: Time to complete a given task users want smaller response times

Throughput:Total amount of work done in a given time admins want higher throughput

Performance measure: TIME

Two notions of computer performance: 1. Execution time

2. Throughput

Q: If we upgrade a machine with a new processor what do we increase? Q: If we add a new machine to the lab what do we increase?

• Elapsed Time

– counts everything (disk and memory accesses, I/O , etc.) – a useful number, but often not good for comparison purposes • CPU time

– doesn't count I/O or time spent running other programs – can be broken up into system time, and user time • Our focus: user CPU time

– time spent executing the lines of code that are "in" our program

Lec 4.7

Definitions

Performance is in units of things-per-second bigger is better !!!

If we are primarily concerned with execution time

"

"

X X time execution e performanc = 1 X Y Y X time execution time execution e performanc e performanc n_{= =}

Q: machine A runs a program in 20 seconds machine B runs the same program in 25 seconds

Clock Cycles

• Clock “ticks” indicate when to start activities

• cycle time = time between ticks = seconds per cycle

• clock rate (frequency) = cycles per second (1 Hz = 1 cycle/sec) A 200 Mhz clock has a cycle time time 1 200 × 106 × 10 9 = 5 nanoseconds

Lec 4.9

Could assume that # of cycles = # of instructions

time 1 st i n st ru ct io n 2 n d i n st ru ct io n 3 rd i n st ru ct io n 4 th 5 th 6 th _...

How many cycles are required for a program?

This assumption is incorrect,

different instructions take different amounts of time •Multiplication takes more time than addition

• Floating point operations take longer than integer ones • Accessing memory takes more time than accessing registers

CPU Time

A given program will require

• some number of instructions (machine instructions) • some number of cycles

• some number of seconds

CPU Time = User CPU time for a program

CPU Time = CPU clock cycles for a program x Clock cycle time CPU clock cycles for a program

= ---Clock rate

Lec 4.11

Example

Our favorite program runs in 10 seconds on computer A, which has a 400 Mhz clock. We are trying to help a computer designer build a new

machine B, that will run this program in 6 seconds. The designer can use new (or perhaps more expensive) technology to substantially increase the clock rate, but has informed us that this increase will affect the rest of the CPU design, causing machine B to require 1.2 times as many clock cycles as machine A for the same program. What clock rate should we tell the designer to target?

CPI

CPI (clock cycles per instruction): average number of clock cycles per instr CPU clock cycles for a program = Instruction count x CPI

CPU Time = CPU clock cycles for a program x Clock cycle time = Instruction count x CPIx Clock cycle time

Instruction count x CPI =

Lec 4.13

CPI

∑

Given that n : number of instruction classes

CPI : average number of cycles per instr for instr class i

I : number of instructions of class ii

i

∑

Example

A compiler designer is trying to decide between two code sequences for a particular machine. Based on the hardware implementation, there are three different classes of instructions: Class A, Class B, and Class C, and they require one, two, and three cycles (respectively).

The first code sequence has 5 instrs: 2 of A, 1 of B, and 2 of C

The second sequence has 6 instrs: 4 of A, 1 of B, and 1 of C.

Which sequence will be faster? How much? What is the CPI for each sequence?

Lec 4.15

Aspects of CPU Performance

instr count CPI clock rate

Program

x

Compiler

x

x

Instr. Set

x

x

Organization

x

x

Technology

x

Seconds Instructions Cycles Seconds Seconds Instructions Cycles Seconds Program Program Instruction Cycle

= x x

= CPU time

Performance

• Performance is determined by execution time • Do any of the other variables equal performance?

– # of cycles to execute program? – # of instructions in program? – # of cycles per second?

– average # of cycles per instruction? – average # of instructions per second?

• Common pitfall: thinking one of the variables is indicative of performance when it really isn’t.

Lec 4.17

Suppose we have two implementations of the same instruction set architecture (ISA). For some program,

Machine A has a clock cycle time of 10 ns. and a CPI of 2.0 Machine B has a clock cycle time of 20 ns. and a CPI of 1.2 Which machine is faster for this program, and by how much? Q: If two machines have the same ISA which of our quantities (e.g., clock

rate, CPI, execution time, # of instructions) will always be identical?

CPI Example

A compiler designer is trying to decide between two code sequences for a particular machine. Based on the hardware implementation, there are three different classes of instructions: Class A, Class B, and Class C, and they require one, two, and three cycles (respectively).

The first code sequence has 5 instrs: 2 of A, 1 of B, and 2 of C

The second sequence has 6 instrs: 4 of A, 1 of B, and 1 of C.

Which sequence will be faster? How much? What is the CPI for each sequence?

Lec 4.19

• Performance best determined by running a real

application

– Use programs typical of expected workload – Or, typical of expected class of applications

e.g., compilers/editors, scientific applications, graphics, etc.

• Small benchmarks

– nice for architects and designers – easy to standardize

– can be abused

• SPEC (System Performance Evaluation Cooperative)

– companies have agreed on a set of real program and inputs – valuable indicator of performance (and compiler technology) – can still be abused

Benchmarks

Benchmark Games

• An embarrassed Intel Corp. acknowledged Friday that a bug in a software program known as a compiler had led the company to overstate the speed of its microprocessor chips on an industry benchmark by 10 percent. However, industry analysts said the coding error…was a sad commentary on a common industry practice of “cheating” on standardized performance tests…The error was pointed out to Intel two days ago by a competitor, Motorola …came in a test known as SPECint92…Intel acknowledged that it had “optimized” its compiler to improve its test scores. The company had also said that it did not like the practice but felt to compelled to make the optimizations because its competitors were doing the same thing…At the heart of Intel’s problem is the practice of “tuning” compiler programs to recognize certain computing problems in the test and then substituting special handwritten pieces of code…

Lec 4.21

SPEC ‘89

• Compiler “enhancements” and performance

0 100 200 300 400 500 600 700 800 tomcatv fpppp matrix300 eqntott li nasa7 doduc spice espresso gcc Benchmark Compiler Enhanced compiler S P E C p e rf o rm a n c e r a tio

SPEC95

• Eighteen application benchmarks (with inputs) reflecting a technical computing workload

• Eight integer

– go, m88ksim, gcc, compress, li, ijpeg, perl, vortex • Ten floating-point intensive

– tomcatv, swim, su2cor, hydro2d, mgrid, applu, turb3d, apsi, fppp, wave5

• Must run with standard compiler flags

– eliminate special undocumented incantations that may not even generate working code for real programs

Lec 4.23

SPEC CPU2000

SPEC 2000

Does doubling the clock rate double the performance?

200 400 600 800 1000 1200 1400

Pentium III CINT2000

Pentium 4 CINT2000

Pentium III CFP2000

Lec 4.25

SPEC 2000

Can a machine with a slower clock rate have better

performance?

SPECINT2000 SPECFP2000 SPECINT2000 SPECFP2000 SPECINT2000 SPECFP2000

A lw ays on/m ax im um clock La ptop m ode/a daptive

clo ck

M inim um pow er/m in im um clock B en chm ark and powe r m ode

Pe ntiu m M @ 1.6/0.6 G H z Pe ntiu m 4 -M @ 2.4 /1.2 G H z Pe ntiu m III-M @ 1.2/0.8 G H z

Alternative Metrics

MIPS can vary inversely with performance !

Number of floating point operations in a program MFLOPS =

---Execution Time x 10 6

Lec 4.27

• Two different compilers are being tested for a 4 GHz. machine with three different classes of instructions: Class A, Class B, and Class C, which require one, two, and three cycles (respectively). Both compilers are used to produce code for a large piece of software. The first compiler's code uses 5 million Class A instructions, 1 million Class B instructions, and 1 million Class C instructions. The second compiler's code uses 10 million Class A instructions, 1 million Class B instructions, and 1 million Class C instructions. • Which sequence will be faster according to MIPS?

• Which sequence will be faster according to execution time?

MIPS example

Speedup due to enhancement E:

ExTime w/o E Performance w/ E

Speedup (E) = --- =

---ExTime w/ E Performance w/o E

Suppose that enhancement E accelerates a fraction F of the task by a factor S and the remainder of the task is unaffected then,

ExTime (with E) = ((1-F) + F/S) x ExTime (without E) 1

Lec 4.29

Example (RISC Processor)

Typical Mix

Op Freq Cycles CPI(i) % Time

ALU 50% 1 .5 23%

Load 20% 5 1.0 45%

Store 10% 3 .3 14%

Branch 20% 2 .4 18%

2.2

How much faster would the machine be if a better data cache reduced the average load time to 2 cycles? (S= 1/(0.55+ 0.45/2.5)) How does this compare with using branch prediction to shave a cycle off the branch time? (S= 1/(0.82+ 0.18/2))

What if two ALU instructions could be executed at once?

Summary

• Performance is specific to a particular program/s

• Best Metric: Time to execute the program

• For a given architecture performance increases come from: – increases in clock rate (without adverse CPI affects)

– improvements in processor organization that lower CPI

– compiler enhancements that lower CPI and/or instruction count

• Pitfall: expecting improvement in one aspect of a machine’s

CPI