• No results found

WE310F5-I/P Porting. Telit Technical Documentation. Reference Guide NT11915A Rev VV Rev.0

N/A
N/A
Protected

Academic year: 2021

Share "WE310F5-I/P Porting. Telit Technical Documentation. Reference Guide NT11915A Rev VV Rev.0"

Copied!
40
0
0

Loading.... (view fulltext now)

Full text

(1)

1VV0301698 2021-01 Rev.0

Telit Technical Documentation

WE310F5-I/P Porting

Reference Guide

80664NT11915A Rev. 6 – 2021-10-07

(2)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 2 of 40 2021-10-07

APPLICABILITY TABLE

PRODUCTS WE310F5-I

WE310F5-P

(3)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 3 of 40 2021-10-07

Contents

APPLICABILITY TABLE 2

CONTENTS 3

1. INTRODUCTION 5

Scope 5

Audience 5

Contact Information, Support 5

Symbol Convention 5

Related Documents 6

2. HARDWARE SPECIFICATION 7

Overview 7

Major Differences 7

Sample Design 7

Pin Mapping 9

2.4.1. GS2011M (apart from GPIO’s) and WE310F5 9

2.4.2. GS2101M, GS2100M and WE310F5 11

2.4.3. GS2200M and WE310F5 13

2.4.4. Power Pins 15

2.4.5. ADC Pins 15

2.4.6. Program, Run and Restore Pins 16

2.4.7. SDIO Pins 16

USB Interface 16

RF 17

Power Consumption 17

Wi-Fi Tx Power and Receiver Sensitivity 17

3. SOFTWARE SPECIFICATION 19

Non-Supported Features 24

GS2K Vs WE310F5 26

Supported AT Commands with Parameter 27

Non-supported AT Commands 30

WE310F5 Application Architecture 31

(4)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 4 of 40 2021-10-07

4. CERTIFICATIONS 33

5. PRODUCT AND SAFETY INFORMATION 34

Copyrights and Other Notices 34

5.1.1. Copyrights 34

5.1.2. Computer Software Copyrights 34

Usage and Disclosure Restrictions 35

5.2.1. License Agreements 35

5.2.2. Copyrighted Materials 35

5.2.3. High-Risk Materials 35

5.2.4. Trademarks 35

5.2.5. Third-Party Rights 36

5.2.6. Waiver of Liability 36

Safety Recommendations 36

6. GLOSSARY 38

7. DOCUMENT HISTORY 39

(5)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 5 of 40 2021-10-07

1. INTRODUCTION Scope

This document describes an overview about the WE310F5 module porting procedures.

Audience

This document is intended for Telit customers, especially system integrators, about to implement their applications using the Telit module.

Contact Information, Support

For general contact, technical support services, technical questions and report documentation errors contact Telit Technical Support at:

• TS-SRD@telit.com

Alternatively, use: http://www.telit.com/support

For detailed information about where you can buy the Telit modules or for recommendations on accessories and components visithttp://www.telit.com

We aim to make this guide as helpful as possible. Keep us informed of your comments and suggestions for improvements.

Telit appreciates feedback from the users of our information.

Symbol Convention

Table 1: Symbol Convention

Danger: This information MUST be followed, or catastrophic equipment failure or personal injury may occur.

Warning: Alerts the user on important steps about the module integration.

Note/Tip: Provides advice and suggestions that may be useful when integrating the module.

(6)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 6 of 40 2021-10-07

Electrostatic Discharge: Notifies the user to take proper grounding precautions before handling the product.

All dates are in ISO 8601 format, that is. YYYY-MM-DD.

Related Documents

Table 2: Related documents

Module Name Description

80664ST11034A WE310F5-I/P AT Command Reference Guide 1VV0301663 WE310F5-I/P EVB Hardware User Guide 1VV0301662 WE310F5-I/P Module Hardware User Guide

(7)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 7 of 40 2021-10-07

2. HARDWARE SPECIFICATION Overview

It is required to redesign the designs for WE310F5 as the size and pin count differ from GS2K modules. For the recommended footprints and dimensions, refer to the respective Module Hardware User Guides.

Major Differences

Table 3: Difference Between GS2K Modules and WE310F5 Module.

Item GS2011MIx GS2011MxxS GS2200MIx GS2101MIx WE310F5-P WE310F5-I

Dimensions

22.8mm x 32.5mm x 3.56mm

28.7mm x 19.4mm x 3.35mm

13.5mm x 17.85mm x 2.13mm

18mm x 25mm x 2.7mm

14.3mm x 13.1mm x 2.2mm

18mm x 15mm x 2.2mm

Number of pins 49 37 66 40 95

GPIO’s 27 24 19 16 27

Low-Power Yes Yes Yes

No (there is no

DC_DC_CNTL pin)

Yes

Flash 4MB 2MB 4MB 4MB 4MB

ADC 2-ch SAR

adc (12-bit)

1-ch SAR (12- bit)

1-ch SAR (12-bit) 2-ch SD adc (16-bit)

3-ch SD adc

(16-bit) 1-ch (12-bit)

Operating

Temperature -40 to 85°C -40 to 85°C -40 to 70°C -40 to 85°C -40 to 85°C Storage

Temperature

-55 to

+125°C -55 to +125°C -55 to

+125°C -55 to +125°C -55 to +125°C

Sample Design

This section provides sample designs for interfacing WE310F5 with host MCU over serial interfaces. AUX UART is must for flashing/debug. Both WiFi and BLE can be operated over each serial interface.

1. WE310F5 has one WAKEUP pin. Also, data on RXD0 pin can wake up the module.

2. WE310F5 needs 100K pull-up for ON* pin.

3. WE310F5 needs 1K pull-down for TX_AUX pin to enter program mode.

4. SDK customers need to bring SWD interface for debugging.

(8)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 8 of 40 2021-10-07

Following figure shows the interfacing of UART0 with Host MCU

Figure 1: UART Interface Design.

Following figure shows the interfacing of SPI with Host MCU

Figure 2: SPI Interface Design.

Following is the schematics for using USB interface with Host:

(9)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 9 of 40 2021-10-07

Figure 3: USB Interface with Host.

Following is the schematics for using SDIO interface with Host:

Figure 4: SDIO Interface with Host.

Pin Mapping

2.4.1. GS2011M (apart from GPIO’s) and WE310F5

Table 4: GS2011M and WE310F5 Module Pin Map.

GS2011MIx Pin# and Name

GS2011M xxS Pin#

WE310F5 Pin# and

Name Comments

1 GND 1,19,36

A3,A7,A9,A13,A17,B4,B6,B10,B12,B 14,B16,C19,D18,F8,F12,F18, G19, H6, H14, J19, K18, M18, N19, P6, P14, T8, T12, U1, V2, W19, Y2, Y4

2 JTAG_TCK

No JTAG

J4 SWD_CLK

WE310 supports only SWD

3 JTAG_TDO

4 JTAG_TDI

5 JTAG_TMS L4 SWD_DATA

(10)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 10 of 40 2021-10-07

GS2011MIx Pin# and Name

GS2011M xxS Pin#

WE310F5 Pin# and

Name Comments

6 JTAG_TRST_n

7 RTC_IO_1 9 L16 WAKEUP WE310 has only one Wake

pin

8 RTC_IO_0

9 VRTC 10 W1, AA3 VBATT_3V3

10 DC_DC_CNTRL/

RTC_IO_4 12

11 ADC_SAR_0 4 B18 ADC

12 ADC_SAR_1

13 RTC_IO_2 11

14 GPIO6/SPI1_DIN R16 DAC

15 GPIO7 /

SPI1_DOUT

16 VOUT_1V8

17 GND

18 GPIO5/SPI_CLK

19 GPIO4/

SPI1_CS_n_0

20 GPIO13/

SPI1_CS_n_1

21

GPIO21/

CLK_RTC

22

GPIO20/

CLK_HS_RC

23

GPIO19/

CLK_HS_XTAL

24 GPIO10/PWM0 22

25 GPIO9/I2C_CLK 23

26 GPIO8/I2C_DATA 24

27

GPIO36/

SDIO_DAT0/

SPI0_DOUT 8 Y8 SPI_MISO

28

GPIO35/

SDIO_CLK/

SPI0_CLK 7 AA7 SPI_CLK

29

GPIO33/

SDIO_DAT3/

SPI0_CS_n_0 6 Y6 SPI_CS

30

GPIO34/

SDIO_CMD/

SPI0_DIN 5 AA5 SPI_MOSI

31 VIN_3V3 35

32 GND

33 EN_1V8

EN_1V8 is only present in GS2011M

34 VDDIO 20

(11)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 11 of 40 2021-10-07

GS2011MIx Pin# and Name

GS2011M xxS Pin#

WE310F5 Pin# and

Name Comments

35

GPIO26/

UART1_CTS 25

36

GPIO27/

UART1_RTS 26

37

GPIO3/

UART1_RX 27

38

GPIO32/

SDIO_DAT2/

UART1_TX 28

39

GPIO1/

UART0_TX 29 AA15 TXD0

40

GPIO25/

UART0_RTS 32 AA17 RTS0

41

GPIO0/

UART0_RX 30 Y16 RXD0

42

GPIO24/

UART0_CTS 31 Y18 CTS0

43 GPIO31/PWM2 3

44 GPIO30/PWM1

45 GPIO29/I2C_CLK

46

GPIO37/

SDIO_DAT1_INT 2 D13 IO6/SPI_INT

47 EXT_RESET_n 33 N16 ON* Module Reset pin

48 GND

49 VPP 37

2.4.2. GS2101M, GS2100M and WE310F5

GS2100M Module pins 8, 9, 26, and 33 are No Connect (NC), but these are GND pins in GS2101M. GS2100M Module pin 25 is NC, but this pin is GPIO9/I2C_CLK.

Table 5: GS2101M, GS2100M and WE310F5 Module Pin Map.

GS2101MIx Pin# and Name

GS2101Mx Pin#

WE310F5 Pin# and

Name Comments

1 GND 1,8,9,14,

26,33,40

A3,A7,A9,A13,A17,B4,B6,B10,B12,B14,B1 6,C19,D18,F8,F12,F18, G19, H6, H14, J19, K18, M18, N19, P6, P14, T8, T12, U1, V2,

W19, Y2, Y4

2 JTAG_TCK 35

J4 SWD_CLK WE310 supports

only SWD

3 JTAG_TDO 36

4 JTAG_TDI 37

(12)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 12 of 40 2021-10-07

GS2101MIx Pin# and Name

GS2101Mx Pin#

WE310F5 Pin# and

Name Comments

5 JTAG_TMS 38

L4 SWD_DATA

6 JTAG_TRST_n 39

7 VRTC 10 W1, AA3 VBATT_3V3

8 ADC_SD_0P 2 B18 ADC

WE310F5 has single channel SAR ADC

9 ADC_SD_0N 3

10 ADC_SD_1P 4

11 ADC_SD_1N 5

12 ADC_SD_2P 6

13 ADC_SD_2N 7

14 EXT_RESET_n 11 N16 ON* Module Reset pin

15 RTC_IO_2 12 L16 WAKEUP

Only one RTC IO pin available in GS2101M/

GS2100M

16 VPP 13

17 VIN_3V3 15 W1, AA3 VBATT_3V3

18

19 GPIO10/PWM0

16 R16 DAC

20 GPIO9/I2C_CLK 17

21 GPIO8/I2C_DATA 18

22

GPIO33/

SDIO_DAT3/

SPI0_CS_n_0 20 Y6 SPI_CS

23

GPIO34/

SDIO_CMD/

SPI0_DIN 21 AA5 SPI_MOSI

24

GPIO35/

SDIO_CLK/

SPI0_CLK 22 AA7 SPI_CLK

25

GPIO36/

SDIO_DAT0/

SPI0_DOUT 23 Y8 SPI_MISO

26

GPIO37/

SDIO_DAT1_INT 24 D13 IO6/SPI_INT

27 NC 25

28

GPIO1/

UART0_TX

27 AA15 TXD0

29

GPIO25/

UART0_RTS

28 AA17 RTS0

(13)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 13 of 40 2021-10-07

GS2101MIx Pin# and Name

GS2101Mx Pin#

WE310F5 Pin# and

Name Comments

30

GPIO0/

UART0_RX

29 Y16 RXD0

31

GPIO24/

UART0_CTS 30 Y18 CTS0

32

GPIO37/

UART1_TX 19 Y10 TX_AUX

UART1 in GS2101M is alternate function

33

GPIO9 or GPIO37 /

UART1_RX 17 or 24 AA9 RX_AUX

UART1 in GS2101M is alternate function

34 GPIO31/PWM2 31

35 GPIO30/PWM1 32

36 GPIO28/I2C_DATA 34

2.4.3. GS2200M and WE310F5

Table 6: GS2200M and WE310F5 Module Pin Map.

GS2200MIx Pin# and Name

GS2200Mx Pin#

WE310F5 Pin# and

Name Comments

1 GND 1~6, 8, 43~66

A3,A7,A9,A13,A17,B4,B6,B10,B12,B14,B1 6,C19,D18,F8,F12,F18, G19, H6, H14, J19, K18, M18, N19, P6, P14, T8, T12, U1, V2,

W19, Y2, Y4

2 JTAG_TCK 11

J4 SWD_CLK

WE310 supports only SWD

3 JTAG_TDO 12

4 JTAG_TDI 10

5 JTAG_TMS 9

L4 SWD_DATA

6

7 VIN_3V3 40 W1, AA3 VBATT_3V3

8 VDDIO 7

9 VRTC 37 W1, AA3 VBATT_3V3

10 VREG 41

11 VPP 31

12 RTC_IO_2 36 L16 WAKEUP WE310 has only one

Wake pin 13 DC_DC_CNTRL/

RTC_IO_4 33

14 DC_DC_CNTRL_N/

RTC_IO_4 35

15 ADC_SAR_0 42 B18 ADC

16 ADC_SD_0P 39

17 ADC_SD_0N 38

18 GPIO10/PWM0 29 R16 DAC

(14)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 14 of 40 2021-10-07

GS2200MIx Pin# and Name

GS2200Mx Pin#

WE310F5 Pin# and

Name Comments

19 GPIO31/PWM2 15

20 GPIO30/PWM1 14

21 GPIO9/I2C_CLK 32

22 GPIO8/I2C_DATA 30

23

GPIO36/

SDIO_DAT0/

SPI0_DOUT 25 Y8 SPI_MISO

24

GPIO35/

SDIO_CLK/

SPI0_CLK 21 AA7 SPI_CLK

25

GPIO33/

SDIO_DAT3/

SPI0_CS_n_0 26 Y6 SPI_CS

26

GPIO34/

SDIO_CMD/

SPI0_DIN 27 AA5 SPI_MOSI

27

GPIO37/

SDIO_DAT1_INT 22 D13 IO6/SPI_INT

28

GPIO26/

UART1_CTS 20

29

GPIO27/

UART1_RTS 23

30

GPIO3/

UART1_RX 24 Y10 TX_AUX

31

GPIO32/

SDIO_DAT2/

UART1_TX 28 AA9 RX_AUX

32

GPIO1/

UART0_TX 19 AA15 TXD0

33 GPIO25/

UART0_RTS 18 AA17 RTS0

34

GPIO0/

UART0_RX 17 Y16 RXD0

35

GPIO24/

UART0_CTS 16 Y18 CTS0

36 EXT_RESET_n 34 N16 ON* Module Reset pin

37 GPIO28/I2C_DATA 13

38

DC_DC_CNTRL_N/

RTC_IO_4 35

(15)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 15 of 40 2021-10-07

2.4.4. Power Pins

Below table shows WE310F5 needs 3.3V DC regulated supply supporting 500mA peak current.

Table 7: Power Pins

We recommend adding an external EMI filter to improve the quality of the power supply especially when the module is embedded with other technologies, (i.e. Cellular). The pigreca filter composed by ferrite bead and 10pF capacitors (C2,C3) is used to provide an high impedance value for high frequency signals, while the 100uF and 22uFcapacitors (C1,C5 and C4) are used to bypass low frequencies from switching regulator circuit and to provide a supply tank for high current absorption.

Figure 5: Example EMI Filter.

2.4.5. ADC Pins

WE310F5 SAR ADC pin input range is 0V~3.3V.

Table 8: ADC Pins

ADC GS2011M GS2200M GS2101M / GS2100M WE310F5

ADC Pins

11 (ADC_SAR_0) 42(ADC_SAR_0) 2 (ADC_SD_0P) B18(SAR ADC) 12(ADC_SAR_1) 38 (ADC_SD_0N) 3 (ADC_SD_0N)

39 (ADC_SD_0P) 4 (ADC_SD_1P)

(16)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 16 of 40 2021-10-07

ADC GS2011M GS2200M GS2101M / GS2100M WE310F5

5 (ADC_SD_1N) 6 (ADC_SD_2P) 7 (ADC_SD_2N)

2.4.6. Program, Run and Restore Pins

The table below gives pin map for program, run and code restore modes. Note that there is no code (previous) restore pins in GS2101MIx, GS2200MIx and WE310F5.

Table 9: Program, Run and Restore Pin Map

Program/Run Mode Program Select/ Restore Alternate Previous Restore

GS2011MIx GPIO27 GPIO25 GPIO21

GS2011MxxS GPIO27 GPIO25 GPIO21

GS2200MIx GPIO27 GPIO25

GS2101M / GS2100M GPIO31 GPIO25

WE310F5 TX_AUX

2.4.7. SDIO Pins

The table below provides SDIO pin numbers for GS2K and WE310F5 module.

Table 10: SDIO Pins

GS2011MIx Pin#

GS2011MxxS Pin#

GS2200MIx Pin#

GS2101M / GS2100M Pin#

WE310F 5-x Pin#

GPIO35/SDIO_CLK 28 7 21 22 V13

GPIO34/SDIO_CMD 30 5 27 21 V11

GPIO36/SDIO_DAT0

27 8

25 23

D7 GPIO37/SDIO_DAT1

_INT 46 2

22 24

GPIO32/SDIO_DAT2 38 28 28 19

GPIO33/SDIO_DAT3

29 6 26 20

USB Interface

GS2K modules does not have USB interface, but WE310F5 has one USB Device interface supporting CDC with ACM (Abstract Control Model) as Virtual COM port. If used in host designs, maintain differential traces.

(17)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 17 of 40 2021-10-07

RF

WE310F5 has two variants. Refer to WE310F5 Module Hardware User Guide section 7:

Design Guidelines.

For WE310F5-P antenna pad, we recommend simple matching circuit with antenna having gain ≤2.3dBi @2.4GHz as shown below:

Figure 6: WE310F5 Antenna Circuit.

Power Consumption

Table 11: Power Consumption.

Power Consumption WE310F5 GS2011MIx

GS2011Mxx

S GS2200M GS2101M WLAN Continuous Transmit (1

Mbps)

265mA (18 dBm)

300mA (15dBm)

300mA (15dBm)

235mA (15dBm)

257 mA(15dB m) WLAN Continuous Receive (1

Mbps) 58mA 95mA 95mA 88mA 131 mA

IEEE 802.11 PS-Poll, DTIM=1 1,04mA 4mA 4mA 2.08mA 2.80 mA

IEEE 802.11 PS-Poll, DTIM=3 0,56mA 1,7mA 1,7mA 1.20mA 1.52 mA

IEEE 802.11 PS-Poll, DTIM=10 185µA 855µA 855µA 402µA 802μA

Standby, Deep sleep 3µA, 40µA 4-8µA, 460µA 4-8µA, 460µA 4-8µA, 475µA 615µA

Wi-Fi Tx Power and Receiver Sensitivity

Table 12: Wi-Fi Power and receiver Sensitivity.

Wi-Fi Radio Characteristics WE310F5 GS2011MIx GS2011MxxS GS2200M GS2101M TX mode :VIN_3V3=VDDIO=VRTC=3.3V T=25°C

Pout (11b, 1M) 18 dBm 16 dBm 15 dBm 14 dBm 16 dBm

Pout (11b, 11M) 18 dBm 13 dBm 11 dBm 12 dBm 13 dBm

Pout (11g, 6M) 18 dBm 15 dBm 14 dBm 13 dBm 14 dBm

Pout (11g, 54M) 16 dBm 11 dBm 8 dBm 7 dBm 12 dBm

Pout (11n, MCS0) 17 dBm 15 dBm 14 dBm 13 dBm 14 dBm

Pout (11n, MCS7) 15 dBm 6 dBm 3 dBm 6 dBm 5 dBm

RX mode :VIN_3V3=VDDIO=VRTC=3.3V T=25°C

RX (11b, 1M) -97 dBm -90 dBm -90 dBm -90 dBm -90 dBm

Rx (11g, 54M) -75 dBm -71 dBm -71 dBm -71 dBm -71 dBm

(18)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 18 of 40 2021-10-07

Rx (11n, MCS0) -92 dBm -86 dBm -86 dBm -86 dBm -86 dBm

Rx (11n, MCS7) -72 dBm -67 dBm -67 dBm -67 dBm -67 dBm

(19)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 19 of 40 2021-10-07

3. SOFTWARE SPECIFICATION

Table 13: Software Comparison.

Features GS2K WE310F5

Systems

Application CPU Cortex -M3 Cortex -M33

CPU Two CPU: APP and WLAN CPU Three CPU: APP, WLAN and BLE

SRAM for Customer Application 512 KB (Code + Data + Heap ) Note: Code segment size ~300KB ( includes platform + custom application)

512KB (Code + Data + Heap )

Note: 456 KB (Data + Heap) +56 KB for data segment.

Maximum Code segment (~1200 KB – include Custom Application ( ~700KB) Platform, RTOS and Network stack) can be memory mapped to 56KB.

Available RTC memory for Application

16KB 780 Bytes

Maximum Customer Application code size (Excluding Platform, RTOS and Network stack)

~ 100 KB ~700 KB

Application CPU Cortex -M3 Cortex -M33

Peripherals

Available Peripherals, I/O Drivers

2x SPI (master/slave),

2x UART, SDIO, GPIO, PWM, I2C, I2S

ADC (12bit, 16bit), JTAG

SPI (master/slave),

2x UART, SDIO Slave, GPIO, PWM, I2C, USB and two wire SWD interface for debugging using J-link.

Note : I2S* ( Not Implemented ) Embedded Platform Layer

RTOS Thread X Free RTOS

Platform Layer

Note: The APIs are different from each other.

GEPS M2MB

Serial Interface communication UART/SPI SDIO UART/SPI SDIO/USB

Hosted Software Architecture

Hosted Application AT command Support.

Customer can configure the required features using online SDK Builder tool.

https://wifi.telit.com/secure/login

AT command Support.

Firmware available in the download zone with all the features enabled.

www.telit.com/download-zone/

Dual Interface Support (command in one interface and Data in another)

Yes No

File System AT commands No Yes

Command Modes Legacy AT Command Legacy (GS2K compliant) and New Telit Style AT Command

BLE Support No Yes

(20)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 20 of 40 2021-10-07

Features GS2K WE310F5

Hostless Software Architecture

Host less Architecture Yes Yes

Host less application Source code for different applications (S2W, TLS, TLS LP, Video ADK) is available and can be downloaded using SDK builder tool.

https://wifi.telit.com/secure/login IDE : IAR workbench

Compiler : IAR

Debugger : IAR I-Jet Debugger RTOS : Thread-X

Network Stack : NetX Platform Layer : GEPS

Supported example applications:

TLS TLS-LP

Source is available as part of AppZone ADE ( Application development Environment).

https://www.telit.com/developer- zone/iot-app-zone/iot-app-zone- developer-resources/

IDE : AppZone ADE based on Eclipse Compiler : GCC

Debugger : Segger J-Link Debugger ( IDE Based )

RTOS : Free RTOS Network Stack : LWIp Platform Layer : M2MB

Supported example applications:

azure gpio hello_world json_xml ncm ping s2w sntp tcp_udp uart Serial Input/output

AT command Interface support UART, SPI and SDIO UART, SPI/SDIO/USB Serial Interfaces Supported Supports both single and dual

interfaces (one for commands and another for data)

UART: Supports up to 921600 baud Single interface (SPI (Byte-Stuffing and Command-Response) Supports Command-response protocol up to 10MHz

Supports Byte stuffing protocol up to 2MHz

SDIO:

Dual interface:

UART (command)+UART (data) UART (command)+SPI (data) UART (command)+SDIO (data)

Supports single interface only Two UART:

UART0: S2W Application – 921K UART1 (AUX-UART): Programming Mode - 1.5Mbps

Run Mode – 115K SPI: Up to 50MHz SDIO: Up to 50MHz USB: CDC class device

SPI1 Yes Yes (SDIO with1 data line can be used.

Where I2C, 3 GPIO should be compromised)

SDIO 4 data lines Yes Yes (I2C, I2S, SPI0 and 3 GPIO should

be compromised) SPI

Header 8 Bytes 12 Bytes

(21)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 21 of 40 2021-10-07

Features GS2K WE310F5

Start of Frame 0xA5 ( 1 Byte ) 4 Bytes ( 0xA5, 0xA5, 0xA5, 0xA5) Header Tx Sequence Send 4 Bytes of header wait for 3.2

usec send remaining 4 bytes

Send 64Bytes which include both header and Data and wait for ~2msec for RESPONSE

CheckSum A single checksum byte is used, computed as the 1’s

complement of the 8-bit long (modulo-256) sum of all the bytes of the HI HEADER (not

including the Start delimiter). Note that each byte is independently added to the sum, as an

integer between 0 and 255, without regard for its significance within its own data field

Not Check Sum : Reserved for future use

Host to Telit 0x01 - WRITE_REQUEST from MCU side

0x02 - READ_REQUEST from MCU side

0x03 - DATA from MCU side

WRITE REQUEST 0x01 READ REQUEST 0x02 WRITE DATA 0x03

Telit to Host 0x11 - WRITE_RESPONSE_OK to MCU side

0x12 - READ_RESPONSE_OK to MCU side

0x13 - WRITE_RESPONSE_NOK to MCU side

0x14 - READ_RESPONSE_NOK to MCU side

0x15 - DATA to MCU side

WRITE_RESPONSE OK 0x0B READ RESPONSE OK 0x0C WRITE_RESPONSE NOK 0x0D READ RESPONSE NOK 0x0E READ DATA 0x0F

Maximum Data length of one Transaction

2032:

8bytes header + 2032 bytes of Data

1524

12bytes of header + 1524 bytes of data Data Exchange from Host to

Telit Tx

STEP 1: Send Write Req Send 4 bytes of header Wait for GPIO37 Low Send next 4 bytes of header STEP2:

Wait for GPIO37 High Read the response from Telit If WRITE_OK goto STEP3 If WRITE_NOK goto STEP1 STEP3:

Based Length field in the response, Prepare the Data Header and send to GS Module.

No need Wait for GPIO37 to go low.

Send the actual data

STEP 1:

Each Packet should be multiple of blocks.

Block is 64 bytes

Wait of HOST_WAEKUP (Equivalent to GPIO37) to Low. If it is High first, perform the READ operation.

If data to be send is less than are equal 54bytes.

Send 64 Byte of Block Includes 12byte Header 54 bytes of data. No need to wait for Response from Telit, Goto STEP1

If data to be send is greater than 54bytes.

Send 1st block as 64 Byte, Includes 12byte Header 54 of byte. Goto STEP2 STEP2:

Wait for WRITE_OK/ WRITE_NOK response.

If WRITE_NOK Goto STEP1 If WRITE_OK Goto STEP3

(22)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 22 of 40 2021-10-07

Features GS2K WE310F5

STEP3:

Send 2nd block as maximum as 1536. ( Includes 12bytes of Header and 1524 bytes of Data).

Ex: For1400 bytes of data 1st block is inlclude 12+54 bytes, 2nd block 1408 = 12+1346(1400-54)+ 50 ( Dummy data)

No need to wait of any ACK for Telit, goto STEP1

Data Exchange from Telit to Host

STEP1:

Check for GPIO37 to become HIGH Sends of READ_REQUEST to GS node ( GS2K will Pull the GPIO32 low)

STEP2:

Wait for GPIO37 to be HIGH Read READ_RESPONSE_OK / READ_RESPONSE_NOK If READ_RESPONSE_NOK goto STEP1

If READ_RESPONSE_OK goto STEP3 STEP3:

parse the data length in the header and Read the data.

STEP1:

Wait for GPIO37 to be HIGH Sends of READ_REQUEST to Telit Module

STEP2:

Response will be of BlockSize (64Bytes), This response contains 12byte of header and 54Bytes Data (If any)

If READ_RESPONSE_OK, goto STEP3 If READ_RESPONSE_NOK goto STEP1 STEP3:

Parse the length and wait for Data for a maximum of 2msec.

WLAN

Phy Modes 802.11 b/g/n 802.11 b/g/n

Wi-Fi Band Single Band(2.4GHz) Single Band(2.4GHz)

Wi-Fi/BLE Wi-Fi Combo Module (Wi-Fi + BLE 5)

No of Layer 2 Station supported 16 10

Wi-Fi Direct ( P2P) Yes No

Networking

Network protocols

IPv4 ARP ICMP UDP TCP DHCP Client DNS Client DHCP Server DNS Server HTTP(S) Client HTTP(S) Server TLS 1.0/1.2 client TLS 1.0 Server mDNS/DNS-SD SNTP Client

IPv4 - supported ARP - supported ICMP - supported UDP -supported TCP - supported DHCP Client - supported DNS Client - supported DHCP Server - supported DNS Server - supported HTTP(S) Client - supported HTTP(S) Server - supported TLS 1.1/1.2 client - supported TLS 1.1/1.2 Server - supported mDNS/DNS-SD -supported SNTP Client – supported

(23)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 23 of 40 2021-10-07

Features GS2K WE310F5

CoAP Client IGMP (Multicast) DTLS Client

MQTT Client (secured) WebSockets Client (secured) NAT

RTP RTSP

IGMP (Multicast) – supported DTLS Client - supported

MQTT Client (secured) - supported IPv6 – Yes ( In RoadMap)

IPv4/v6 simultaneous operation – Yes ( In RoadMap )

CoAP Client – Yes ( In RoadMap) WebSockets Client (secured) supported NAT - Not supported

RTP - Not supported RTSP - Not supported Max number of open Sockets

(UDP&TCP)

16 16

Max number of SSL sockets 4 4

Note: This limitation is as per system memory Security

L2 level Security WEP-64 Open/Shared WEP-128 Open/Shared WPA-Personal (TKIP)

WPA2-Personal (AES, AES+TKIP) WPA-Enterprise (TKIP)

WPA2-Enterprise (AES, AES+TKIP)

WEP-64 Open/Shared WEP-128 Open/Shared WPA-Personal (TKIP)

WPA2-Personal (AES, AES+TKIP) WPA-Enterprise (TKIP) * (Future Release)

WPA2-Enterprise (AES, AES+TKIP) * (Future Release)

WPA3-Personal

EAP Types EAP-FAST-MSCHAP, EAP-FAST-

GTC, EAP-TLS-MSCHAP, EAP- TTLS-MSCHAP, EAP-PEAP V0- MSCHAP, EAP-PEAP V1-GTC, EAP- TTLS-PAP

EAP-TLS-MSCHAP, EAP-TTLS-MSCHAP EAP-TTLS-MSCHAP*, EAP-PEAP V0

SSL TLS-1.0

TLS-1.1 TLS-1.2

TLS-1.1 TLS-1.2

Cert size 1k, 2k and 4k 1k, 2k and 4k

SSL Configuration Subject Alternative Names is supported

Subject Alternative Names Not supported

Secure File System No Yes

Secure boot No Yes (In RoadMap)

Cloud

HTTP/S Yes Yes

MQTT/S Yes Yes

WebSocket Yes No

Telit Specific Feature

Provisioning Methods Verified Provisioning using

Concurrent Mode Wi-Fi provisioning

Verified Provisioning using Concurrent Mode.

BLE enabled Wi-Fi provisioning

(24)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 24 of 40 2021-10-07

Features GS2K WE310F5

Firmware upgrade Methods OTAFU Push OTAFU Pull

OTHFU (Over the Host Firmware Upgrade)

OTAFU Push OTAFU Pull

XFP over serial interface (available in feature)

GS Link Yes No

Cloud Ready

Cloud: AWS Yes Yes (In Roadmap)

Note: MQTT AT commands can be used to communicate AWS cloud.

Cloud: Azure No Yes, Supported version 1.6.0

Home kit Yes No

File System

Number of File Systems

2 (static filesystem for webpages &

dynamic for configuration and custom data storage)

1 ( used for webpages, configuration, and custom data storage)

Note: Web Pages cannot be updated as part of the OTAFU

Size 512 KB 512 KB

Secure File system support No Yes

Miscellaneous

Module Flash Programming Interfaces

UART 0 UART 1

Cross-Origin Resource Sharing (Access Control Allow Origin Policy).

Yes No

Development Environment IAR licensed based development environment

Eclipse based development

environment called ADE with free GCC compiler.

Non-Supported Features

Table 14: Non-supported Features

Features GS2011M GS2101M GS2200M WE310F5

S2W AT Commands Energy

Measurement Unit (With 16bit ADC)

No Yes No No

Home kit Support Yes Yes Yes No

WAC provisioning Yes Yes Yes No

Wi-Fi Direct ( P2P) Yes Yes Yes No

Dual Interface Support

Yes Yes Yes No

(25)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 25 of 40 2021-10-07

Features GS2011M GS2101M GS2200M WE310F5

External Flash Support

Yes Yes Yes No

I2C, ADC (12 bit), PWM, GPIO

Yes Yes Yes No ( But Feasible)

Network Protocol CoAP (Constrained Application Protocol)

Yes Yes Yes No (But Feasible)

RTP Yes No Yes No (But Feasible)

RTSP Yes No Yes No (But Feasible)

Embedded Platform (GEPS in GS2K & m2mb) EMU ( Energy

Measurement Unit)

No Yes No No ( Not Feasible)

External Flash Drivers

( Up to 16MB Flash )

Yes Yes Yes No ( But Feasible )

3 Firmware Model : Golden Firmware

Yes Yes Yes No

I/O Drivers UART1 – Up to 912600

Yes Yes Yes No (Up to 115k):

Only for debug.

Host can receive AT commands, but debug prints can’t be disabled.

Sigma delta ADC ( 16 bit)

No Yes (3 Ch) Yes ( 1Ch) No (Hardware

DOESN’T Support)

SAR ADC (12 bit) Yes Yes Yes No (Hardware will

Support)

I2S Yes Yes Yes No (Hardware will

Support) OTP Writes by

Application

Yes Yes Yes No (Hardware will

Support)

PWM Yes Yes Yes No (Hardware will

Support) ADK Application

Temperature Light Sensor Application (Host Less Model)

Yes Yes Yes No

Temperature Light Sensor Application (Low Power)

Yes No Yes No

Video ADK (720p &

1080p)

Yes No Yes No

Smart Plug ADK No Yes No No

Apple Home Kit ADK Yes Yes Yes No

(26)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 26 of 40 2021-10-07

GS2K Vs WE310F5

Table 15: GS2K Vs WE310F5

Application GS2011M GS2101M GS2200M WE310F5

ADK

Serial To Wi-Fi Yes Yes Yes Yes

Network Protocol

CoAP ( Constrained Application Protocol)

Yes Yes Yes No (But

Feasible) DTLS ( Datagram Transport Layer

Security)

Yes Yes Yes No ( But

Feasible)

RTP Yes No Yes No (But

Feasible)

RTSP Yes No Yes No (But

Feasible) Embedded Platform Features:- GEPS in GS2K and m2mb in WE310F5

EMU ( Energy Measurement Unit) No Yes No No ( But

Feasible with 12-bit ADC) External Flash Drivers

( Up to 16MB Flash )

Yes Yes Yes No (But

Feasible) 3 Firmware Model : Golden

Firmware

Yes Yes Yes No

I/O Drivers

UART0 – Up to 912600 Yes Yes Yes Yes

(Up to 3Mbps)

UART1 – Up to 912600 Yes Yes Yes No ( Up to 115k)

:Only for debug.

Host can give AT commands on this interface.

However, response comes along with the debug message.

SPI0 Yes Yes Yes Yes

SPI1 Yes Yes Yes Yes (SDIO with1

data line can be used. Where I2C, 3 GPIO should be compromised)

SDIO 4 data lines Yes Yes Yes Yes (I2C,I2S,SPI0

and 3 GPIO should be compromised )

Sigma delta ADC ( 16bit) No Yes (3 Ch) Yes ( 1Ch) No ( No

Hardware Supports)

SAR ADC ( 12 bit) Yes Yes Yes No ( Hardware

Supports)

I2S Yes Yes Yes No (Hardware

Supports )

OTP Writes by Application Yes Yes Yes No (Hardware

Supports)

PWM Yes Yes Yes No (Hardware

Supports)

(27)

WE310F5-I/P Porting Reference Guide

1VV0301733 Rev. 6 Page 27 of 40 2021-10-07

Table 16: Challenges with Single Interface S2W Application.

Interface Challenges in Migrating to WE310F5 UART Easy to migrate. No challenges foreseen

SPI Customer Host side Application require modification to support SPI application protocol

SDIO Easy to migrate. SDIO Lines are Multiplexed with I2C, I2S and SPI0. For 4 Data line SDIO interface should compromise on SPI0, I2C and I2S Interfaces

Note/Tip:

In AT+WST command, maximum scan time parameter is not compatible and not supported.

AT+MCSTSET, enable multicast reception is not supported.

AT+LOGLVL, debug log level command is not supported, instead AT+YLOGSL is supported that displays the debug logs in debug port(UART1).

The limitation in concurrent mode: The station interface of WE310F5 is connecting to another AP and because of this the AP interface also switches the channel to the same as that of the STA interface. The AP and STA interfaces must be on the same channel and multiple channels like in GS2K is not supported.

In WE310F5 there is no option to switch ON/OFF the radio once the module is connected. Hence, WRXACTIVE and WRXPS cannot be set to 0 together and hence not supported.

Supported AT Commands with Parameter

Table 17: Supported AT Commands with Parameter.

Commands GS2K WE310F5 Parameters

GS2K WE310F5

AT+WM Supported Supported

but change in supported parameter’s

1)Wireless mode 2)Beacon interval in AP mode

3)Broadcast SSID in AP mode

4)No of stations allowed in AP 5)DTIM in AP mode 6)Inactivity timeout in AP

7)Rate adaptation- device type

1) Supported 2) Supported 3) Supported 4) Not supported 5) Supported 6) Supported 7) Not supported 8) Not supported

References

Related documents

To add a new internal point click on “Modify “ menu and select “Internal points / Create internal point” option “and then click inside the piece contour where you want to add

The AW-XM458 supports a SDIO device interface that conforms to the industry SDIO Full-Speed card specification and allows a host controller using the SDIO bus protocol to

(2010) who reported highly significant (P<0.001) mean squares among 25 genotypes for days to flowering, plant height at flowering, number of pods per plant, pod weight

Simply put, the solution is to provide a standards-based (i.e.: ODBC, JDBC, OLE DB or ADO.NET) interface to your Internet data to complement the existing database, processes

Pin Name Pin Number I/O Supply Domain Direction Initial State (Power up, Active Reset) Description 1,2,3,4 Non SDIO,SPI HighZ HighZ.. The SPI interface is supported only in

However, if users want to use other interface such as UART or SPI, this module also makes it easy to connect those pins... We have updated this module to

Application software on the PC could use Bit Bang Mode to download configuration data to the FPGA which would define it’s hardware function, then after the FPGA device is

The TTL-232R cables are a family of USB to TTL serial UART converter cables incorporating FTDI’s FT232RQ USB to Serial UART interface IC device which handles all the USB signalling