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Investigating the Potential of Custom Instruction Set Extensions for SHA-3 Candidates on a 16-bit Microcontroller Architecture

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Figure

Table 1. Comparison of throughput numbers [cycles/byte] of published microcontroller implementations
Table 2. Improvement of long message hashing speed by using instruction set extensions for all SHA-3 candidates, and overheadof instruction set extensions on the core area of the PIC24 microcontroller.
Table 3. Change in the number of memory accesses during the processing of one message block for all SHA-3 candidates.
Table 5. Memory resource breakdown of the standard implementation of the BLAKE algorithm on the PIC24 architecture, and thechanges due to Instruction Set Extensions.
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