Booth's Algorithm - Multiplication & Division

(1)

More complicated than addition

• Accomplished via shifting and addition

More time and more area

Let's look at 3 versions based on grade school algorithm

01010010 (multiplicand)

x 01101101 (multiplier)

Negative numbers: convert and multiply

(2)

ECE 369 - Fundamentals of Computer Architecture 1

01010010(multiplicand)

×

01101101 (multiplier)

00000000

01010010

×

1 0101001

0 00000000

0 ×

0 0010100

10 01010010

00 ×

1 0110011

010 01010010

000 ×

1 1000010

1010

00000000

0000

×

0 0100001

01010

01010010

00000

×

1 0111001

101010

01010010

000000

×

1 1000101

1101010

00000000

0000000

×

0 00100010

11101010

01010010 (multiplicand)

×

01101101 (multiplier)

00000000

01010010

×

1 00101001 0 (add & shr)

00000000

0 ×

0 00010100 10 (add & shr)

01010010

00 ×

1 00110011 010 (add & shr)

01010010

000 ×

1 01000010 1010

(add & shr)

00000000

0000

×

0 00100001 01010

(add & shr)

01010010

00000

×

1 00111001 101010

(add & shr)

01010010

000000

×

1 01000101 1101010

(add & shr)

00000000

0000000

×

0 00100010 11101010

(add & shr)

Multiplication

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64-bit ALU Control test Multiplier Shift right Product Write Multiplicand Shift left 64 bits 64 bits 32 bits Done 1. Test Multiplier0

1a. Add multiplicand to product and place the result in Product register

2. Shift the Multiplicand register left 1 bit

3. Shift the Multiplier register right 1 bit

32nd repetition? Start Multiplier0 = 0 Multiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions

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ECE 369 :: Fundamentals of Computer Architecture 4

Second version

Multiplier Shift right Write 32 bits 64 bits 32 bits Shift right Multiplicand 32-bit ALU

Product Control test

Done 1. Test Multiplier0

1a. Add multiplicand to the left half of

the product and place the result in

the left half of the Product register

2. Shift the Product register right 1 bit

3. Shift the Multiplier register right 1 bit

32nd repetition? Start Multiplier0 = 0 Multiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions

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Control test Write 32 bits 64 bits Shift right Product Multiplicand 32-bit ALU Done 1. Test Product0

1a. Add multiplicand to the left half of the product and place the result in the left half of the Product register

2. Shift the Product register right 1 bit

32nd repetition? Start Product0 = 0 Product0 = 1 No: < 32 repetitions Yes: 32 repetitions

(6)

Multiplication example: 0010 x 0110

Iteration Multiplicand Original Algorithm

Step Product 0 0010 Initial values 0000 0110 1 0010 1: 0 -> No operation 0000 0110 2: Shift right 0000 0011 2 0010 1a: 1 -> Product = Product + Multiplicand 0010 0011 2: Shift right 0001 0001 3 0010 1a: 1 -> Product = Product + Multiplicand 0011 0001 2: Shift right 0001 1000 4 0010 1: 0 -> No operation 0001 1000 2: Shift right 0000 1100

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Signed Multiplication

The easiest way to deal with signed numbers is to first convert the

multiplier and multiplicand to positive numbers and then remember the

original sign.

It turns out that the last algorithm will work with signed numbers

provided that when we do the shifting steps we extend the sign of the

product.

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ECE 369 - Fundamentals of Computer Architecture

3

Speeding up multiplication (Booth’s Algorithm)

The way we have done multiplication so far consisted of repeatedly

scanning the multiplier, adding the mutiplicand (or zeros) and shifting

the result accumulated.

Observation:

if we could reduce the number of times we have to add the multiplicand

that would make the all process faster.

Let say we want to do:

b x a where a=7

ten

=0111

two

With the algorithm used so far we successively:

add b, add b, add b, and add 0

If we “recode” the number 7

ten

as (8-1)

ten

= (1000 – 0001)

two

= 100-1

all we need to do is:

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Booth’s Algorithm

Observation: If besides addition we also use subtraction, we

can reduce the number of consecutives additions and therefore

we can make the multiplication faster.

This requires to “recode” the multiplier in such a way that the number

of consecutive 1s in the multiplier (indeed the number of consecutive

additions we should have done) are reduced.

The key to Booth’s algorithm is to scan the multiplier and classify group

of bits into the beginning, the middle and the end of a run of 1s

1 1 1 1

0

0 Beginning of Run

End of Run

Middle of Run

A string of 0s

already avoids arithmetic,

so we can leave them alone

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ECE 369 - Fundamentals of Computer Architecture

5

Using Booth’s encoding for multiplication

If the initial content of A is a

n-1

…a

0

then i-th multiply step, the

low-order bit of register A is a

i

and step (i) in the multiplication

algorithm becomes:

1. If a

i

=0 and a

i-1

=0, then add 0 to P

2. If a

i

=0 and a

i-1

=1, then add B to P

3. If a

i

=1 and a

i-1

=0, then subtract B from P

4. If a

i

=1 and a

i-1

=1, then add 0 to P

(For the first step when i=0, then add 0 to P)

Current bit

Bit to the right

Type

1

0 Beg. Run

1

1 Middle Run

1

1 End Run

0

0 Middle Run

Action

Subtract the multiplicand

Add the multiplicand

No arithmetic operation

No arithmetic multiplicand

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Booth’s algorithm

Start

Test multiplier[i:i-1]

01 Add multiplicand to

the left half of the

product and place

the result in the left

half of the product

register

Subtract multiplicand

from the left half of

the product and place

the result in the left

half of the product

register

10 Shift the product register right by 1

Done

< 32 rep

= 32 rep

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Booth's algorithm example

Iteration Multiplicand Booth's Algorithm

Step Product 0 0010 Initial values 0000 1101 0 1 0010 10 -> Product = Product - Multiplicand 1110 1101 0 Shift right 1111 0110 1 2 0010 01 -> Product = Product + Multiplicand 0001 0110 1 Shift right 0000 1011 0 3 0010 10 -> Product = Product - Multiplicand 1110 1011 0 Shift right 1111 0101 1 4 0010 11 -> No operation 1111 0101 1 Shift right 1111 1010 1

(13)

Even more complicated

Can be accomplished via shifting and addition/subtraction

More time and more area

We will look at 3 versions based on grade school algorithm

0011 | 0010 0010 (Dividend)

Negative numbers: Even more difficult

There are better techniques, we won’t look at them

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ECE 369 - Fundamentals of Computer Architecture 7

Division

1001 (Quotient)

Divisor 1000 1001010 (Dividend)

-1000

10

101 1010

-1000

10 (Remainder)

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Division: First Algorithm

Done Test Remainder

2a. Shift the Quotient register to the left, setting the new rightmost bit to 1

3. Shift the Divisor register right 1 bit

33rd repetition? Start

Remainder < 0

No: < 33 repetitions

Yes: 33 repetitions

2b. Restore the original value by adding the Divisor register to the Remainder

register and place the sum in the Remainder register. Also shift the Quotient register to the left, setting the

new least significant bit to 0 1. Subtract the Divisor register from the

Remainder register and place the result in the Remainder register

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Division - Implementation

64-bit ALU Control test Quotient Shift left Remainder Write Divisor Shift right 64 bits 64 bits 32 bits Control test Quotient Shift left Write 32 bits 64 bits 32 bits Shift left Divisor 32-bit ALU Remainder

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Division

Done. Shift left half of Remainder right 1 bit

Test Remainder

3a. Shift the Remainder register to the left, setting the new rightmost bit to 1

32nd repetition? Start

Remainder < 0

No: < 32 repetitions

Yes: 32 repetitions

3b. Restore the original value by adding the Divisor register to the left half of the Remainder register and place the sum in the left half of the Remainder register.

Also shift the Remainder register to the left, setting the new rightmost bit to 0 2. Subtract the Divisor register from the

left half of the Remainder register and place the result in the left half of the

Remainder register

Remainder 0

1. Shift the Remainder register left 1 bit

– > Write 32 bits 64 bits Shift left Shift right Remainder 32-bit ALU Divisor Control test

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Restoring division example

Iteration Divisor Divide Algorithm

Step Product

0 0010 Initial values 0000 0111

Shift reminder left by 1 0000 1110

1 0010 2. Reminder = Reminder - Divisor 1110 1110 3b. (Reminder < 0); +Div; Shift left, R0 = 0 0001 1100

2 0010 2. Reminder = Reminder - Divisor 1111 1100 3b. (Reminder < 0); +Div; Shift left, R0 = 0 0011 1000

3 0010 2. Reminder = Reminder - Divisor 0001 1000 3a. (Reminder > 0); Shift left, R0 = 1 0011 0001

4 0010 2. Reminder = Reminder - Divisor 0001 0001 3a. (Reminder > 0); Shift left, R0 = 1 0010 0011 Done 0010 Shift left half of reminder right by 1 0001 0011

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How can we avoid adding the divisor back to the reminder?

• Note that this addition is performed whenever the reminder is negative!

So, what exactly are we doing when the reminder is negative?

• We have a certain reminder: R (R < 0) • We add the divisor back to it: R + D

• _{We shift the result left by 1: 2*(R + D) = 2*R + 2*D}

• We subtract the divisor again in the next step: 2*R + 2*D - D = 2*R + D

• Equivalent of left shifting the reminder R by 1 bit

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Non-restoring division example

Iteration Divisor Divide Algorithm

Step Product

0 0010 Initial values 0000 0111

Shift reminder left by 1 0000 1110

1 0010 Reminder = Reminder - Divisor 1110 1110 (Reminder < 0); Shift left, R0 = 0 1101 1100

2 0010 Reminder = Reminder + Divisor 1111 1100 (Reminder < 0); Shift left, R0 = 0 1111 1000

3 0010 Reminder = Reminder + Divisor 0001 1000 (Reminder > 0); Shift left, R0 = 1 0011 0001

4 0010 Reminder = Reminder - Divisor 0001 0001 (Reminder > 0); Shift left, R0 = 1 0010 0011 Done 0010 Shift left half of reminder right by 1 0001 0011

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We need a way to represent

• Numbers with fractions, e.g., 3.1416 • _{Very small numbers, e.g., 0.000000001} • _{Very large numbers, e.g., 3.15576 x 109}

Representation

• _{Sign, exponent, significand: (–1)sign x significand x 2exponent} • More bits for significand gives more accuracy

• More bits for exponent increases range

IEEE 754 floating point standard

• Single precision: 8 bit exponent, 23 bit significand • Double precision: 11 bit exponent, 52 bit significand

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IEEE 754 floating-point standard

Leading “1” bit of significand is implicit

Exponent is “biased” to make sorting easier

• All 0s is smallest exponent, all 1s is largest

• Bias of 127 for single precision and 1023 for double precision • _{Summary: (–1)sign x (1+significand) x 2(exponent – bias)}

Example

• _{Decimal: -.75 = -3/4 = -3/22} • _{Binary: -.11 = -1.1 x 2-1}

• Floating point: exponent = 126 = 01111110

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Operations are somewhat more complicated (see text)

In addition to overflow we can have “underflow”

Accuracy can be a big problem

• IEEE 754 keeps two extra bits, guard and round • Four rounding modes

• _{Positive divided by zero yields “infinity”} • Zero divide by zero yields “not a number” • Other complexities

Implementing the standard can be tricky

Not using the standard can be even worse

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Floating point add/subtract

To add/sub two numbers

• We first compare the two exponents

• _{Select the higher of the two as the exponent of result}

• Select the significand part of lower exponent number and shift it right by the amount equal to

the difference of two exponent

• Remember to keep two shifted out bit and a guard bit

• _{Add/sub the signifand as required according to operation and signs of operands} • Normalize significand of result adjusting exponent

• Round the result (add one to the least significant bit to be retained if the first bit being thrown

away is a 1

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To multiply two numbers

• Add the two exponent (remember access 127 notation) • _{Produce the result sign as exor of two signs}

• Multiply significand portions

• Results will be 1x.xxxxx… or 01.xxxx….

• _{In the first case shift result right and adjust exponent} • Round off the result

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Floating point divide

To divide two numbers

• Subtract divisor’s exponent from the dividend’s exponent (remember access 127 notation) • _{Produce the result sign as exor of two signs}

• Divide dividend’s significand by divisor’s significand portions • Results will be 1.xxxxx… or 0.1xxxx….

• _{In the second case shift result left and adjust exponent} • Round off the result

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Computer arithmetic is constrained by limited precision

Bit patterns have no inherent meaning but standards do exist

• Two’s complement and IEEE 754 floating point

Computer instructions determine “meaning” of the bit patterns

Performance and accuracy are important so there are many

complexities in real machines (i.e., algorithms and implementation)

We designed an ALU to carry out four function

Multiplication

• Unsigned, Signed, Signed using Booth’s encoding, and Carry save adders and their use