2256
Designing and the Performance Estimation of Wireless Communication Systems using LDPC codes using Sum Product algorithm
and Bit-flipping algorithm
Kritika Puri, Madhwendra N. Tripathi
ABSTRACT
Binary coded modulation is bandwidth- efficient and integrates channel coding and modulation into one single unit to improve the performance. It also maintains the same spectral efficiency as compared to un-coded modulation. Low-density parity-check (LDPC) codes are the most dominant error correcting block codes (ECCs). These codes approach the Shannon’s limit & having a low decoding complexity. In our research work we have taken LDPC codes as an Error Correcting Codes and we have studied the performance of LDPC codes with the BPSK system in AWGN (Additive White Gaussian Noise) atmosphere and analyzed various types of characteristics of this type of system.
LDPC code system contains two parts i.e. (i) Encoder part and (ii) Decoder part. LDPC code encoder encodes the provided data and sends this data through the channel or medium. The performance of LDPC encoder mostly depends on the Parity matrix manners. We have studied the performance distinctiveness according to these characteristics and find the performance variation in terms of SNR performance. The decoder utilizes the encoded data from the channel and then decodes it. A LDPC code decoding algorithm in MIMO system with the AWGN faded channel and BPSK modulation with ½ code rate is proposed in this work.
Finally a plot between the Bit error rate of the code and the Frame error rate (FER) is plotted w. r. t. input SNR and has been considered as an output performance parameter of proposed methodology. Both parameters are considered for different
number of frames and for different iterations.
The performance of the proposed method i.e.
Log domain sum product algorithm (SPA) is also compared with bit-flipping algorithm and Linear Programming algorithm. All simulation work has been implemented in MATLAB R2013a using its wireless communication toolbox and general MATLAB tool box.
Keywords: LDPC, sum-product algorithm; Bit Flipping; Linear Programming etc.
1.1 Introduction
A Communication system sends info from transmitter to receiver through a wired or wireless medium or a channel. The trustiness of the received information depends upon the varied parameters like channel medium, external noise and this noise produce interference to the signal and introduces errors into the transmitted information. Claude E.
Shannon has tested that the consistent transmission may well be achieved as long as the information rate is a smaller amount than the data rate. He shows that a series of codes of code rate but the data rate has the potential because the code length tends to infinity [9].
The Figure 1.1 shows a communication system.
Data from the input or information source is given to the Encoder for encoding, then it is modulated by using various standard modulation methods such as BPSK, QPSK etc and then it is sent through AWGN channel. The output is then given to demodulator block which demodulate the modulated input signal and finally after
demodulation it is decoded with the help of decoder.
Fig. 1.1 FEC encoded Communication System [5]
1.2 Linear Block Codes
Linear block coding is a subclass of block codes.
These block codes have such structure that provides a reduction in the encoding and decoding complexity compared to arbitrary block codes [5].
1.3 Error Detection Schemes
Error detection could be defined as a method by that errors are detected within
the information sequence. It will be achieved by numerous schemes like through parity bits or CRC ways. The various error detection schemes that are used in the communication system for error detection can be summarised as follows [9]:
1. Hamming distance Based Check method 2. Polarity method
3. Cyclic Redundancy Check (CRC) method 4. Parity method
5. Checksum method
1.4 Error Correction Schemes
As the name indicates, the error correction schemes detect as well as correct errors. Error detection and correction techniques help in transmitting the data to receiver without errors even in the presence of noise. Error detection means to detect errors if any received by the receiver and correction implies to correct the errors received by the receiver. The classification of error correction and detection can be classified as shown in figure 1.2
Fig. 1.2 Classification of different types of Error Correcting Codes [5]
1.5 Low Density Parity Check Codes (LDPC Codes)
Nowadays, LDPC codes are the best error correcting codes in the information coding field.
These codes are commonly known as LDPC codes & projected by Galleger at MIT in year 1962 [3]. On the name of its inventor, these codes are also called as Galleger codes. But during the past 40 years, these codes were not used very much. These codes are used in information coding theory. The main dealing of information coding theory is basically with encoding & decoding of information. The name of this code was derived from parity- check matrix concept. Recently the most common architecture that is in use is parallel architecture.
This is the reason these codes are appropriate for implementation of current scenario. The forward error correcting codes are dominated due to highly structured algebraic block and complex convolution codes. Now LDPC codes are used in for various applications such as Wi- max for microwave communications, CMMB i.e. china multimedia mobile broadcasting, Digital video broadcasting and for the Wi-Fi standard [4].
1.6 Representation of LDPC codes
There are two basic representations of LDPC codes. First is based on the matrices and second is based on graphs as shown below:
1.6.1 Matrix representation
In the example shown below matrix representation can be defined as the parity check matrix with the dimension of (8, 4) code i.e.
(n* m), where wrdenotes the number of one‟s in the row and wc denotes the number of ones in the columns. The conditions that are to be satisfied for LDPC matrix are wc<< n and wr
<<m. [4]
H =
0 1 0 1 1 0 0 1 1 1 1 0 0 1 0 0 0 0 1 0 0 1 1 1 1 0 0 1 10 1 1
Fig. 1.3 Parity Check Matrix [4]
2258 1.6.2 Graphical representation
An example of graphical representation with four c_nodes and eight v_nodes is shown below:
Fig. 1.4 Graphical Representation of LDPC codes [4]
1.7 LDPC Bit-Flipping Algorithm
LDPC bit-flipping algorithm includes a terribly less complexness when put next to the other algorithms employed in communication system. Also, it's a further property of achieving fascinating error correcting capabilities. Systems like terribly high speed communication systems like non-volatile storage, optical communication and free house optics needs in no time and low complexness error correcting schemes [1].
There are many variants of BF algorithms such as weighted BF (WBF), modified weighted BF (MWBF), and other variants have been proposed and bit-flipping (BF) algorithms have been investigated extensively for LDPC decoding.
The first BF algorithm was developed by Gallager [3].
Fig. 3.1 Methodology for Bit-flipping algorithm
1.8 Sum Product algorithm with Log domain The sum-product algorithmic program may be thought of as being almost like the bit-
flipping algorithmic
program as mentioned within the previous section, however with the distinction that messages representing each decision and that now probabilistic values are represented by LLR i. e. log-likelihood ratios, whereas with the bit- flipping decoding an initial hard decision was made on the signal from the channel, on the basis of what is actually received is a string of real values where the binary decision is decided by the received value, if a 0 is received then positive and if a 1 is received then negative, and the magnitude of the received value gives a measure of the confidence in that decision.
When using hard decision algorithm for decoding a short coming is that the information
Initialization of Input parameters
Creation of LDPC matrix with ½ code rate
Generation of random data and parity check matrix
Data mixed with AWGN and sent to transmitter
Decoding using Bit flipping algorithm
Compute parity checks. Stop decoding if all checks are zero Flip any digit for any failed check equations
Repeat until all parity checks are zero or maximum number of iterations are reached
Plot graph between BER/FER vs.
SNR
relating to the confidence of the signal, the soft information, is discarded. Soft decision decoders, makes use of the soft received information, in addition to the knowledge of the channel properties, to obtain probabilistic expressions for the transmitted signal [2].
1.9 Linear Programming
Linear programming is employed to seek out the polytope‟s (possibly fractional) optimum, and also the success is achieved once that optimum is that the transmitted codeword. The experiments that are performed on LDPC codes show that the performance of the LP decoder is a lot of much higher than the unvaried min- sum formula. Additionally thereto,
the LP decoder additionally has
the ML certificate property that states that whenever it outputs a codeword, it's certain to be
the ML codeword. None of the
quality unvaried ways performed up to now are illustrious to possess this fascinating property.
Fig. 1.5 Methodology for Log domain SPA 1.10 Experimental Results
All the simulation work has been implemented in MATLAB R2013a using wireless communication tool box and generalized MATLAB toolbox. A LDPC decoding algorithm in MIMO system with AWGN faded channel is proposed in this work. First, we have created a LDPC matrix with rate ½ i.e. number of rows is exactly half as compared to that of columns.
Then, random data is generated and a parity check vector is generated in accordance with LDPC matrix and random data.
After the generation of parity check vector a data is mixed with AWGN and has been sent to the transmitter. At transmitter end, decoding of the data is done using Log domain sum product algorithm and Bit-flipping algorithm. After that, a decoded data is compared with data mixed
Initialization of Input parameters
Creation of LDPC matrix with ½ code rate
Generation of random data and parity check matrix
Data mixed with AWGN and sent to transmitter
Decoding using Log domain SPA Message from bit to check nodes are initialized as LLR values Message from check to bit nodes are calculated as LLR values Message from bit to check nodes are calculated as LLR values Extrinsic LLR values are calculated
Decoder output bits are determined Syndrome of output is calculated Plot graph between BER/FER vs.
SNR
2260 with parity check vector, so as to calculate bit
error rate according to different input SNR values. The whole system is designed and implemented with different number of frames i.e. 5, 10, 15, 20 and 25 The iterative Sum- Product Algorithm (SPA), Bit-flipping and Linear Programming decoder is used for
decoding. It terminates when either a valid codeword is found or the maximum of 25 iterations is reached. These simulations have been carried out using MATLAB and the parameters used in the simulation are shown in Table 1.1 :
Table 1.1 List of Input parameters /model and there values / Type [9]
Input parameters / model Values / Type
Modulation BPSK
Channel AWGN
LDPC codes ½ code rate
Encoding L-U method
Decoding Sum product algorithm, Bit-flipping algorithm, Linear Programming Maximum number of iterations 25
Maximum number of frames 25
Maximum input SNR 6 Db
In this work, the H matrix taken is a sparse matrix of (1/2) code rate. Generally the H matrix is of the form (2048X4096), but for the practical implementation a small matrix (100X200) has been taken, the same can be repeated to implement for a bigger matrix of greater size [5].
The „H‟ matrix for implementation is given in sparse form as below:
Fig. 1.6 Mapping of non-zero elements of H- matrix
Next, BER and FER (frame error rate) has been calculated and plotted w. r. t. input SNR and considered as an output performance parameter of proposed methodology. Both parameters has been calculated and plotted for Log domain SPA, Bit-flipping and Linear programming method [8]. Figure 1.7 is the snapshot of plot BER vs. SNR for 5, 10, 15, 20, 25 frames. The values for BER are proportionally changing for other number of frames as shown in Figure 1.7 and Table 1.2.
(a)
(b)
(c) (d)
(e)
Fig. 1.7 BER vs. SNR for different number of frames
Table 1.2 List of various BER values at different SNR for linear programming, bit-flipping method and log domain SPA method with different number of frames
Number of frames Input SNR in dB BER from linear programming method [8]
BER from Bit flip method
BER from log
domain SPA
method
5 0 0.3340 1.5850 0.2600
1 0.3140 1.2450 0.0650
2 0.1980 1.3200 0.0500
3 0.0150 0.3900 0.0030
4 0.0110 0.0300 0
5 0.0050 0.0420 0
6 0.0003 0.0040 0
10 0 0.3540 3.4950 0.4350
1 0.3440 2.6600 0.2450
2 0.2180 1.8650 0.1250
3 0.0200 0.8250 0.0400
4 0.0135 0.2150 0
5 0.0070 0 0
6 0.0005 0 0
15 0 0.3840 4.7600 0.5000
1 0.3440 4.1500 0.3550
2 0.2080 2.3400 0.2080
3 0.0200 0.8000 0.0180
4 0.0145 0.1650 0.0150
5 0.0090 0.0095 0
6 0.0007 0.0018 0
20 0 0.4940 8.3860 0.5260
1 0.4520 8.2460 0.4620
2 0.1880 7.8740 0.0040
3 0.1840 1.0280 0.1756
4 0.0300 0.0380 0.0105
5 0.0900 0.0116 0
6 0.0002 0 0
25 0 0.4340 8.4450 1.0850
1 0.3540 6.4000 0.4650
2 0.2380 3.6600 0.1200
3 0.0350 0.6050 0.0100
4 0.0250 0.2600 0.0250
5 0.0112 0.0100 0.110
6 0.0009 0 0
Frame Error Rate is the ratio of data received with errors to total data received. It is used to determine the quality of signal connection or to test the performance of a mobile station‟s receiver. Figure 1.8 is the snapshot of plot FER vs. SNR for Log domain sum product algorithm, Bit-flipping and Linear Programming algorithm for 5, 10, 15, 20, 25 frames. As can be seen from
the graph, for 5 frames, at input SNR 0dB the FER is 0.4940 dB for Linear Programming, 0.3320 dB for Bit-Flipping and 0.0200 dB for Log-domain SPA decoder and decrease down to 0.0002 dB for Linear Programming, 0 dB for Bit-Flipping and 0 dB for Log-domain SPA decoder at SNR 6dB. The above values for FER
2262 are proportionally changing for other number of
frames as shown in Figure 1.8 and Table 1.3.
Fig. 1.8 FER vs. SNR for different number of frames
We have plotted 5 different plots for 5 types of iterations for constant parity matrix, girth and rate of decoding. In the following figures the
graph between BER and SNR has been plotted for 5, 10, 15, 20 and 25 iterations.
Fig 1.9 shows the graphs between BER and SNR for different number of frames and Table 1.4 summarises the values of BER for different SNR for different iterations for Linear Programming, Bit-flipping and Log domain SPA decoder:
Fig. 1.9 BER vs. SNR for different number of iterations
(a) (b)
(c) (d)
(e)
( a)
(b)
(c) (d)
(e)
Table 1.3 List of various FER values at different SNR for linear programming method, bit flipping method and log domain SPA method with different number of frames
Number of frames Input SNR in dB FER from linear programming method[8]
FER from Bit flip method
FER from log
domain SPA
method
5 0 0.4940 0.3320 0.0200
1 0.4520 0.2980 0.0120
2 0.1880 0.2600 0.0080
3 0.1840 0.0160 0
4 0.0300 0.0040 0
5 0.0900 0 0
6 0.0002 0 0
10 0 0.5940 0.3140 0.0260
1 0.5520 0.3290 0.0350
2 0.2880 0.2050 0.0080
3 0.2840 0.0810 0.0030
4 0.0400 0.0260 0.0010
5 0.0180 0.0030 0
6 0.0004 0 0
15 0 0.6940 0.3540 0.0387
1 0.6520 0.2980 0.0193
2 0.3880 0.1793 0.0080
3 0.3840 0.0700 0.0020
4 0.0600 0.0013 0
5 0.0280 0 0
6 0.0006 0 0
20 0 0.7940 0.3510 0.0580
1 0.7520 0.2735 0.0210
2 0.4880 0.1685 0.0050
3 0.4840 0.0545 0.0040
4 0.0500 0.0050 0.0005
5 0.0280 0.0045 0
6 0.0008 0 0
25 0 0.8940 0.3444 0.0448
1 0.8520 0.2820 0.0184
2 0.5880 0.1580 0.0080
3 0.5840 0.0544 0
4 0.0700 0.0212 0.0004
5 0.0380 0.0052 0
6 0.0010 0 0
2264 All Rights Reserved © 2015 IJARECE
Table 1.4 List of various BER values at different SNR for linear programming, bit-flipping method and log domain SPA method with different number of iterations
Number of
Iterations
Input SNR in dB BER from linear programming method [8]
BER from Bit flip method
BER from log
domain SPA
method
5 0 0.3340 0.3280 0.0430
1 0.3140 0.3030 0.0280
2 0.1980 0.1770 0.0070
3 0.0150 0.0150 0.35
4 0.0110 0 0
5 0.0050 0 0
6 0.0003 0 0
10 0 0.3540 0.3380 0.0400
1 0.3440 0.2960 0.0170
2 0.2180 0.1910 0.0070
3 0.0200 0.0840 0.0020
4 0.0135 0.0030 0
5 0.0070 0.0010 0
6 0.0005 0 0
15 0 0.3840 0.3230 0.0440
1 0.3440 0.3560 0.0140
2 0.2080 0.2990 0.0030
3 0.0200 0.2200 0
4 0.0145 0.0710 0
5 0.0090 0.0190 0
6 0.0007 0.0020 0
20 0 0.4200 0.3410 0.0400
1 0.3640 0.3320 0.0150
2 0.2380 0.2630 0.0100
3 0.0400 0.0690 0.0045
4 0.0300 0.0032 0
5 0.0150 0.0656 0
6 0.0008 0 0
25 0 0.4340 0.3540 0.0410
1 0.3540 0.2950 0.0130
2 0.2380 0.3260 0.0040
3 0.0350 0.1280 0.0020
4 0.0250 0.0050 0
5 0.0112 0 0.0010
6 0.0009 0 0
1.11 Conclusions and Future Scope
In this work a detailed analysis of LDPC codes is done using LDPC codes and three different types of decoding algorithms i. e. Log domain SPA, Bit-flipping and Linear Programming method has been studied. The performance of
Log domain sum product algorithm is compared with Bit-flipping algorithm and linear programming method [4]. Different graphs and tables in the last section gives the evidence of efficient working of Log domain method as compared to that of bit-flipping method and
linear programming method. The conclusion can be summarized as follows:
1. Performance of Log domain SPA decoder is better than the other two decoders i.e. Bit flipping decoder and Linear Programming decoder.
2. When the SNR values are low, the BER fall is found to be higher than when the SNR values are high.
3. Cyclic codes such as LDPC codes are easy to implement due to its parallel structure.
In future, the usage of different decoding algorithm provides a scope for future implementation of the scheme in 4G systems.
The same technology can also be implemented for different linear block codes. Sometimes, LDPC codes are used with other Block error correction codes for better performance such as RS-codes, Turbo codes etc and performance seem to improve. Also, different code rates can be used in future for better performance. Finally, we can try to improve the complexity by modifying the decoder architecture.
REFERENCES
[1]Gopalakrishnan Sundararajan, Chris Winstead and Emmanuel Boutillon “Noisy Gradient Descent Bit-Flip Decoding for LDPC
Codes” IEEE Transactions
on Communications, (Volume:62 , Issue: 10 ).
Pp. 3385 – 3400, ISSN: 0090-6778 Nov, 2014.
[2] Sarah J. Johnson and Steven R. Weller
“Low-density parity-check codes: Design and decoding” Published Online: 15 APR 2003, DOI: 10.1002/0471219282.eot381
[3] R.G. Gallager “Low density parity check codes”, IRE transactions on information theory, pp 21-28, Jan 1962.
[4] S. A. Sivasankari “Design and Implementation of Low Density Parity Check Codes” IOSR Journal of Engineering Vol. 04, Issue 09 (September. 2014), ||V2||
PP 21-25.
[5] A. Kumar “FPGA implementation of LDPC codes”, Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela.
[6] D. MacKay and R. Neal “Good codes based
on very sparse matrices” in Cryptography and Coding, 5th IMA Conf Springer 1995.
[7] D. MacKay “Good error correcting codes based on very sparse matrices” IEEE Trans.
Information Theory , pp. 399-431,March 1999.
[8] N. Kumari, M. R. Reddy “ A New Linear Programming Based Joint Receiver for LDPC Coded MIMO-OFDM Signals”, IJSETR, Vol.03, Issue.44 , pp 8865-8874, Dec 2014.
[9] S. R. Biswal “VLSI Implementation of LDPC Codes”, Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela, May 2013.