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Electronic Defect Characterization of Strained-Si/SiGe/Si Heterostructure

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Figure

Figure 1-4. Typical structures of strained-Si/relaxed SiGe bulk MOSFETs [9].
Figure 1-6.  Cross-sectional TEM image of a strained-Si/SiGe heterostructure [13]. Most of the dislocations are confined within the SiGe graded layer, while some misfit dislocations are generated at the interface of strained-Si and uniform SiGe layers
Figure 1-7. Critical thickness hc of a silicon layer grown on a fully-relaxed Si1-xGex layer as a function of the germanium content x [22]
Figure 1-9. EBIC micrographs of 100-nm-thick strained-Si/Si0.8Ge0.2/Si heterostructure: (a) 4 keV at 300 K; (b) 4 keV at 65 K; (c) 20 keV at 300 K; (d) 20 keV at 65 K [39]
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