A PV cell Fed Three Phase Switched capacitor based 17 Level Inverter Using
Multiple DC-Link
R.Sharanya , Ch.Shankar Rao & M.Suneel Kumar
1MTech scholar in Electrical and Electronics Engineering in CMR College of Engineering
And Technology 2,3Assoiate professor in Electrical and Electronics Engineering in CMR College of Engineering and
Technology
ABSTRACT
In this project, we are using multilevel inverter by using switching capacitor for PV grid. Now a day’s multilevel inverters have become more popular over the years in electric high-power application with the promise of less disturbances and the possibility to function at lower switching frequencies than ordinary two-level inverters. So by cascading multilevel inverter the output voltage will be increases. By using multilevel inverter, the cost will be less. It will be required less space. Modulation strategies, component comparison and solutions to the multilevel voltage source balancing problem will also be presented in this work. By using the multilevel inverter, we can reduce the total harmonic distraction compare to the other sources in PV grid for DC to AC converter. Switched-capacitor multilevel inverters (SCMLIs) are known as another alternative which do not need the charge balancing operations for eliminating the extra dc power supplies and as a result reducing the overall cost.The commutation of the switches provides the addition of the capacitor voltages, thus reaching high voltage at the output, while the power devices must withstand only reduced voltages. These multilevel inverters (MLI) have become an effective solution for increasing power and reducing harmonics.
Keywords
Inverter. Multilevel inverter, single phase and three phase fixed capacitor, cascaded H bridge multilevel inverter, pv cell
INTRODUCTION
Inverters:-Late advances in the power-taking care of abilities of static switch gadgets, for example, IGBTs with voltage rating up to 4.5 kV economically accessible, has influenced the utilization of the voltage to source inverters (VSI) doable for high-control applications. High power and high-voltage
change frameworks have turned out to be imperative issues for the power electronic industry dealing with the extensive air conditioning drive and electrical power applications at both the transmission and appropriation levels. Hence, another group of multilevel inverters has developed as the answer for working with higher voltage levels. Multilevel inverters incorporate a variety of energy semiconductors and capacitor voltage sources, the yield of which produce voltages with ventured waveforms. Capacitors, batteries, and sustainable power source voltage sources can be utilized as the various dc voltage sources. The recompense of the power switches total these numerous dc sources keeping in mind the end goal to accomplish high voltage at the yield; be that as it may, the evaluated voltage of the power semiconductor switches depends just upon the rating of the dc voltage sources to which they are associated.
Voltage Source Inverter
(VSI) Current Source Inverter(CSI)
Z Source Inverter (CSI)
Multilevel Inverter (CSI) Single phase
supply Three phase supply Half
Bridge BridgeFull
INVERTERS
Two Level Inverter
: -"H" topology has numerous repetitive blends of changes' situations to deliver a similar voltage levels. For instance, the level "zero" can be produced with switches in position S (1) and S (2), or S (3) and S (4), or S (5) and S (6), et cetera. Another normal for "H" converters is that they just create an odd number of levels, which guarantees the presence of the "0V" level at the heap .For instance, a 51-level inverter utilizing a "H" setup with transistor-clipped topology requires 52 transistors, however just 25 control supplies rather than the 50 required when utilizing a solitary leg. In this manner, the issue identified with expanding the quantity of levels and lessening the size and many-sided quality has been mostly explained, since control supplies have been diminished to half.S1
S2
Vs/2
Vs/2
Load 0
-+
+ -Vs
+
-A
Half Bridge Inverter
S3
S2
Load Vs
+
-S1
S4
B
IL
Full Bridge Inverter
In full bridge configuration, turning on S1 and S4 and
turning off S2 and S3 give a voltage of VS between
point A and B (VAB) in Fig. 1.3, while turning off S1
and S4 and turning on S2 and S3 give a voltage of -Vs.
Switching pattern of 3 level full bridge inverter
Conducing Switches Load Voltage VAB
S1,S4 +Vs
S1,S4 -Vs
S1,S4 orS1,S4 0
Shows the voltage levels and their comparing changing state condition to produce zero level in a full-bridge inverter, the mix can be S1 and S2 on while S3 and S4 off or the other way around. Note that S1 and S3 ought not be shut in the meantime, nor should S2 and S4. Somethingelse, a short out would exist over the dc source.
Vs VAO
2
Vs 2
t
the output wave form of half bridge
shows the output wave form of half bridge to get positive half cycle S1 is turned on and S2 is turned off
to give a load voltage, VAOof +V s/2.To complete one
cycle, S1 is turned off and S2 is turned on to give a
load voltage, VAO, of -V s/2.
Vs VAB
Vs
t
Output waveform of Full Bridge Inverter
One phase leg of an inverter with (a) two
levels, (b) three levels, and (c) n levels
Types of Multilevel Inverter:-
MULTILEVEL INVERTER
Single DC source Multiple DC source
Diode Clamped
(DC) Flying Capacitor (CF) Cascade H bridge
Hybrid/Dual Fed
Symmetrical Multilevel Inverter
A-Symmetrical Multilevel Inverter
Classifications of Multilevel Inverters
In General, the multilevel inverters are named Single DC source and Multiple DC sources or Several Separate DC Sources (SDCS).Both the Diode Clamped Multilevel Inverter and the Flying Capacitor inverter goes under the classification of Single DC source where the information supply is taken from a solitary DC source.
Output voltage in three-level diode- clamped inverter (a) leg voltage (b) output phase voltage
Cascaded H-Bridge multilevel Inverter
:-The fell H-interface multilevel Inverter uses segregate dc sources (SDCSs). The multilevel inverter using fell inverter with SDCSs fuses a pined for voltage from a couple of self-ruling wellsprings of dc voltages, which may be gained from batteries, vitality parts, or sun controlled cells. This course of action starting late ends up being greatly predominant in aerating and cooling power supply and portable speed drive applications. This new inverter can avoid extra supporting diodes or voltage changing capacitors. Again, the fell multilevel inverters are orchestrated depending the kind of DC sources used all through the data.S3
S2
Vdc/2
S1
S4
S1'
S2' S3'
S4' Vdc/2
R Phase
Symmetrical five level Cascaded H-Birdge
inverter
Output waveform of Symmetrical Cascaded
H-Bridge multilevel Inverter
LITERATURE SURVEY
A
Five-Level
Single-Phase
Grid-BridgeedConverter
for
Renewable
Distributed
Systems
[3]GiampaoloButicchi,Student
Member,
IEEE, Emilio Lorenzani,Member, IEEE, and
GiovanniFranceschini:-
As to harmonic distortion content, control variables, and dc parts, the yield current of lattice associated control converters must agree to the prerequisites of power supply organizations. As of late, converter topologies utilizing a high-recurrence transformer rather than a line recurrence one have been explored with a specific end goal to diminish size and weight. The tradeoff between high proficiency and ease is a harderrand for these models since they require a few power stages. Then again, in low-control applications, universal guidelines permit the utilization of network associated control converters with no galvanic confinement, in this way permitting the supposed transformer less models [3].
This paper concerns the utilization of multilevel topologies for single-stage converters, however keeping in mind the end goal to stay bridged to a down to earth execution, the unipolar PWM bridged to a full scaffold topology is taken as reference. It is essential to take note of that, in this paper, the term unipolar PWM alludes to a three-level yield voltage, who’s first exchanging consonant lives at double the exchanging recurrence. The unipolar PWM is constantly bridged to a full-bridge structure.
Multilevel topologies permit decreasing the symphonious substance of the converter yield voltage, permitting the utilization of littler and less expensive yield channels. Additionally, these topologies are typically described by a solid diminishment of the exchanging voltages over the power switches, permitting the decrease of exchanging power misfortunes and electromagnetic obstruction (EMI) [3].
NPC Hybrid full-bridge
Five-level full-bridge topology proposed
Active Capacitor Voltage Balancing in
Single-Phase Flying-Capacitor Multilevel Power
Converters
[16]MostafaKhazraei,Student
Member, IEEE, HosseinSepahvand,Student
Member, IEEE, Keith A. Corzine, Senior
Member, IEEE, and Mehdi Ferdowsi,
Member,Voltage-Balancing Circuit Based on a
Resonant Switched-Capacitor Converter for
Multilevel
Inverters
[17]Kenichiro
Sano,Student Member, IEEE, and Hideaki
Fujita,Member, IEEE
:-Diode-clipped three-level (nonpartisan point-cinched) inverters have been put into down to practical applications, for example, 3.3-kV mechanical customizable speed engine drive frameworks, Nozomi 700 super express prepares, et cetera [17]. A multilevel inverter has ability of integrating a higher yield voltage than the voltage rating of each exchanging gadgets, which incorporates less music at a generally low exchanging recurrence. In this manner, multilevel inverters are reasonable for medium voltage applications. As of late, numerous analysts and architects have been taking a shot at multilevel inverters fit for integrating voltage waveforms with at least five levels. A diode-clipped five-level inverter utilizes arrangement associated dc capacitors to part the dc-interface voltage into four. The dc-capacitor voltages have a tendency to be lopsided hypothetically, in light of the fact that a measure of dc current streams into the capacitors through the bracing diodes.RSCC voltage-balancing circuit
The circuit essentially acts as a switched-capacitor converter or a charge pump circuit, which stores transferred energy inthe resonant capacitors, instead of an inductor. The resonant inductorLord makes it possible to suppress the spike currents, power losses, and electromagnetic.
EXISTING CONCEPT
Introduction:-
As of late, inexhaustible and practical vitality sources like photovoltaic (PV) and wind turbine frameworks have been perceived as a profitable substitution for fossil vitality sources due to their solid reaction and business benefits. So as to manage across the board utilizing these new vitality assets, the yield execution of general framework ought to be enhanced through raising the yield control quality waveforms, diminishing the aggregate misfortune and furthermore decreasing the yield channel and transformer measure. Among the different kinds of surely understood inverters consolidated into sustainable power source frameworks, multilevel inverters (MLIs) can producea staircase voltage waveform at the yield with high caliber in a scene which yields a low aggregate consonant contortion (THD), low voltage weights on switches, and furthermore no requirement for extensive yield channels [1]– [4]. When all is said in done, there are three ordered ordinary composes for MLI setups acknowledged by diode braced [5], flying capacitors (FCMLIs) [6]– [7] and course H-Bridge (CHB) [8]– [9]. The fundamental condition for producing different number of voltage levels at the yield is to utilize the numerous disengaged dc control supplies or virtual dc bridgeions, for example, capacitors or transformers with commitment of a few exchanging gadgets [4]. Be that as it may, these prerequisites make an awesome constraint for MLIs in mechanical applications and it isn't favored on the feature of business utility. In late examinations, analysts have attempted to hinder these previously mentioned confinements through presenting the recently created MLI structures.
Next the new SCMLI structure (in view of proposed SCC modules) is presented which offers considerably higher voltage levels than existing created topologies and can be formulized to expanded condition. The proposed SCMLI does not require H-bridge cell to change the yield voltage extremity and this will prompt less required power switch numbers in contrast with traditional MLI structures. For moment, in light of proposed SCMLI topology, 137 voltage levels can be created at the yield by utilizing just 18 control switches and four unbalanced disengaged dc control supplies. The power misfortune examination and capacitance assurance for the essential structure of proposed SCMLI are given in detail..
capacitor C is charged to Vdc and when the switch Sa turns ON, the diode winds up invert one-sided and capacitor is released. In this mode, the vitality put away in control supply and capacitor C is exchanged to the yield. Clearly the proposed fundamental unit does not require any additional charge adjusting control circuits which is the significant preferred standpoint of this structure..
(a)
(b)
(c)
(d) (a) Proposed switched-capacitor dc/dc converter (SCC). (b) Currentflow path of first output voltage level. (c) Current flow path of second outputvoltage level. (d) Current flow path of2noutput voltage level
ON SwitchingStatesofProposedSCC
)], the quantity of required power switches or confined entryway bipolar transistor (IGBT) (NIGBT, u) or door drivers (NDriver, u), control diodes (Ndiode, u), and yield voltage levels(N-level, u)are figured by the accompanying conditions, separately
As indicated by (3.4), the proposed circuit has a decent lift ability without utilizing the transformer. This component decreases the size and cost of the framework and in stops the effectiveness. The factor
can be characterized as
Besides, this structure can relieve the aggregate blocked voltage. The low blocked voltage will lead in decreased conduction misfortunes, effectiveness, and cost. For this situation, add up to estimation of
blocked voltage is formulized as (3.6)
PROPOSED SCMLI:-
Keeping in mind the endgoal to change over the yield extremity of SCC and make yield voltage levels (even and odd), a full H-bridge cell can be added to the proposed SCC piece like other existing structures, however utilizing the full H-bridge cell may expand the quantity of required semiconductor gadgets and current way parts. In the introduced circuit of Fig. 3.3, rather than utilizing full H-bridge unit a novel structure has been proposed so as to make the most extreme number of yield voltage ,levels with less number of changes in contrasted with which is very unique with FCMCs topologies. In the proposed fundamental SCMLI topology showed by Fig. 3.3, sets phase of SCC units and six unidirectional power changes are required to change the extremity of the yield voltage
.
Proposed SCMLI topology
The exchanging example of proposed SCMLI is condensed in Table II by seven diverse exchanging states. From this Table and proposed SCMLI topology, unmistakably to keep away from the short out issue, switches SU and SD ought not to be turned ON at the same time despite the fact that they are in current way in positive and negative half cycles of yield voltage, individually. Additionally take note of that, switches SU1, SD1 and S'U1, S'D1 have reciprocal activity with each other. Along these lines, number of required IGBTs and furthermore required power diodes for essential structure of proposed SCMLI can be communicated as following conditions, individually::
(square with) or awry (uneven). Be that as it may, to accomplish the most extreme number of voltage levels at the yield, the second separated dc control supply ought to be embraced by
Therefore, maximum number of output voltage levels in asymmetric form is equal to
To dodge a few limitations in proposed SCMLI worried about existing spikes over the capacitors in every one of SCC units, particularly in high power proportion and furthermore to recommend a down to earth structure with least number of switches, the lift factor (β) for every one of SCC units is been two. Subsequently with deference ton=1, proposed essential SCMLI can produce 17 voltage levels at the yield condition, separately. So the proposed topology requires two disbridgeed dc voltage sources, two capacitor, ten power switches, and two power diodes. As indicated by (3.9) and with considering n=1, keeping in mind the end goal to create the greater part of the voltage levels at the yield in view of halter kilter shape, the extent of dc voltage hotspots for SCCL,1 and SCCR,1 ought to be determined to Vdc and 3Vdc, separately.
Proposed 137-level SCMLI topology
So the yield voltage of SCC units can be chosen as Vdc and 3Vdc (by parallel exchanging mode) and 2Vdc and 6Vdc (by arrangement exchanging mode) as specified in the past segment. Keeping in mind the end goal to expand the quantity of yield voltage levels in proposed SCMLI and furthermore characterize a general structure in light of n=1, the third SCC unit (SCCL,2) is embedded into the proposed fundamental SCMLI topology as appeared in Fig. 3.4. So to accomplish the greatest number of yield voltage levels, the greatness of third dc voltage source can be ascertained by (3.11).Thus, with legitimate series– parallel exchanging in third SCC unit, 9Vdc and 18 Vdc can be produced at its yield
(3.11) In this manner, 49-level voltage (24 positive level
To generate maximum number of output voltage levels withrespect to all of the steps, the magnitude of
added dc voltagesources for each SCC unit should be adopted by the followingiterative equations:
.13) .14) Based on Fig. 3.6, the number of required IGBTs, capacitors, power diodes, and also maximum number of current path components are obtained by the following equations, respectively:
Where is assumed to be half of isolated dc power supply numbers. Therefore, the number of output voltage levels, maximum value of output voltage, and also total value of blocked voltage are summarized by the following equations, respectively:
PROPOSED CONCEPT
misfortunes (littler voltage on the influence gadget) in examination with two level apparatuses, permitting expanding exchanging recurrence and as result diminish prerequisites for responsive parts. This, thusly, brings about converter weight, measurement and cost lessening.
PHOTOVOLTAIC (PV) SYSTEM
:-In thecrystalline silicon PV module, the perplexing material science of the PV cell can be spoken to by the identical electrical circuit appeared in Fig. 5. For that equal circuit, an arrangement of conditions have been determined, in light of standard hypothesis, which permits the task of a solitary sun oriented cell to be reenacted utilizing information from makers or field tests
.
Equivalent electrical circuit of a PV module
The arrangement protection RS speaks to the interior misfortunes because of the present stream. Shunt protection Rsh, in parallel with diode, this relates to the spillage current to the ground. The single exponential condition which models a PV cell is removed from the material science of the PN intersection and is generally concurred as reverberating the conduct of the PV cell
The quantity of PV modules associated in parallel and arrangement in PV exhibit are utilized as a part of articulation. The Vt is moreover
Proposed block diagram
3vdc I0,dc2 Sb LOAD Vdc I0,dc1 su1 su11 su Vc1 Vc2 Sa sb sa1 sb1 SD1 io SD11 L O A D SUB CIRCUIT1 SUB CIRCUIT2 SUB CIRCUIT3 3vdc I0,dc 2 Sb LOAD Vdc I0,dc 1 su1 su11 su Vc1 Vc2 Sasb sa1
sb1 SD1 io SD11 3vdc I0,dc 2 Sb LOAD Vdc I0,dc 1 su1 su11 su Vc1 Vc2 Sasb sa1
sb1 SD1 io SD11 3vdc I0,dc 2 Sb LOAD Vdc I0,dc 1 su1 su11 su Vc1 Vc2 Sa sb sa1 sb1 SD1 io SD11
MATLAB AND SIMULINK MODEL
MATLAB:
-At first created by a teacher in 1970's to enable understudies to learn direct variable based math. It was later promoted and further created under Math Works Inc. (established in 1984) www.mathworks.com. MATLAB is a product bundlewhich can be utilized to perform examination and take care of numerical and designing issues. It has brilliant programming highlights and illustrations ability – simple to learn and adaptable. Accessible in numerous working frameworks – Windows, Macintosh, UNIX, DOS It has a few tool kits to tackle particular issues. MATLAB (grid lab) is a multi-worldview numerical figuring condition and fourth-age programming dialect. A restrictive programming dialect created by Math Works, MATLAB permits lattice controls, plotting of capacities and information, usage of calculations, formation of UIs, and interfacing with programs written in different dialects, including C, C++, Java, Fortran and Python. In spite of the fact that MATLAB is planned basically for numerical processing, a discretionary tool kit utilizes the MuPAD emblematic motor, enabling access to representative figuring capacities. An extra bundle, Simulink, includes graphical multi-area reproduction and model-based outline for dynamic and inserted frameworks.
SIMULINK:-
Simulink, created by Math Works, is a graphical programming condition for demonstrating, recreating and breaking down multidomain dynamic frameworks. Its essential interface is a graphical piece charting device and an adjustable arrangement of square libraries. It offers tight joining with whatever remains of the MATLAB condition and can either drive MATLAB or be scripted from it. Simulink is generally utilized as a part of programmed control and computerized flag handling for multidomain recreation and Model-Based Design. Used to display, break down and reenact dynamic frameworks utilizing square outlines. Completely incorporated with MATLAB, simple and quick to learn and adaptable. It has extensive piece library which can be utilized to reenact straight, non– direct or discrete frameworks – brilliant research devices. C codes can be produced from Simulink models for installed applications and quick prototyping of control frameworks.Simulink and its Relation to MATLAB:-
The MATLAB and Simulink conditions are incorporated into one element, and in this manner we can dissect, recreate, and modify our models in either condition anytime. We conjure Simulink from inside MATLAB.be utilized as an intelligent apparatus or as an abnormal state programming dialect. It gives a viable domain to both the fledgling and for the expert specialist and researcher. SIMULINKTM is an expansion to MATLAB that gives an iconographic programming condition to the arrangement of differential conditions and other dynamic frameworks.
mat lab/simulink circuit diagram and results
single phase switched capacitor of simulation
diagram
z
Simulation output voltage and no load
condition
Simulation wave forms under r-l load
condition across voltage of c1,
Blocking wave forms across switches
Output wave forms for voltage and current
Output wave form for voltage and current
Proposed simulation diagram:-
Three phase voltage and current output wave
form:-
CONCLUSION
This examination proposes another SCC topology with least switches numbers. With ideal number of switches and segregated dc voltage sources, the info voltage has been helped fundamentally. The SCC circuit charges the capacitors by proposed parallel deviated calculation as self-adjusting with no need the confused charge adjusting circuit. Another SCMLI topology utilizes the proposed SCC units as virtual dc bridge with just 10 dynamic power switches, two confined dc control supplies, and two capacitors with 17-level inverter has been displayed. By including just four and eight power changes to essential structure of proposed SCMLI and with one and two more SCC units, 49-and 137-level inverters will be gotten, individually. The misfortune counts have been finished. A far reaching correlation of proposed SCC structure and summed up SCMLI with a portion of the as of late proposed topologies was given. The proposed topology decreases the quantity of energy switches, diodes, and the size of aggregate blocked voltage, size, and cost of the framework in correlation with the customary comparative topologies. At last, the viability and execution of proposed 17-level SCMLI topology have been checked by different recreation and trial comes about.
REFERENCES
[1] J. Chavarria, D. Biel, F. Guinjoan, C. Meza, and J. J. Negroni, “Energybalance control of PV cascaded multilevel grid-bridgeed inverters under level-shifted and phase-shifted PWMs,”IEEE Trans. Ind. Electron.,vol. 60, no. 1, pp. 98–111, Jan. 2013. [2] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. Franquelo, B. Wu,J. Rodriguez, M. Perez, and J. Leon, “Recent advances and industrialapplications of multilevel converters,”IEEE Trans. Ind. Electron., vol. 57,no. 8, pp. 2553–2580, Aug. 2010.
[3] G. Buticchi, E. Lorenzani, and G. Franceschini, “A five-level single-phasegrid-bridgeed converter for renewable distributed systems,”IEEETrans.Ind. Electron., vol. 60, no. 3, pp. 906–918, Mar. 2013. [4] J. Rodriguez, L. Jih-Sheng, and P. Fang Zheng, “Multilevel inverters:A survey of topologies,
controls, and applications,”IEEE Trans. Ind.Electron., vol. 49, no. 4, pp. 724–738, Aug. 2002. [5] E. Ozdemir, S. Ozdemir, and M. L. Tolbert, “Fundamental-frequency modulated six-level diode-clamped multilevel inverter for three-phase standalone photovoltaic system,”IEEE Trans. Ind. Electron., vol. 56, no. 11,pp. 4407–4415, Nov. 2009. [6] M. Ben Smida and F. Ben Ammar, “Modeling and DBC-PSC-PWM control of a three-phase flying-capacitor stacked multilevel voltage sourceinverter,” IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2231– 2239, Jul.2010.
[7] J. Huang and K. A. Corzine, “Extended operation of flying capacitor multilevel inverters,” IEEE Trans. Power Electron., vol. 21, no. 1,pp. 140–147, Jan. 2006.
[8] J. Peredaand and J. Dixon, “Cascaded multilevel converters: Optimalasymmetries and floating capacitor control,”IEEE Trans. Ind. Electron.,vol. 60, no. 11, pp. 4784–4793, Nov. 2013.
[9] A. Ajami, M. R. J. Oskuee, A. Mokhberdoran, and A. Van den Bossche,“Developed cascaded multilevel inverter topology to minimize the numberof circuit devices and voltage stresses of switches,”IET Power Electron.,vol. 7, no. 8, pp. 459– 466, Feb. 2014.
[10] A. Mokhberdoran and A. Ajami, “Symmetric and asymmetric designand implementation of new cascaded multilevel inverter topology,”IEEETrans. Power Electron., vol. 29, no. 12, pp. 6712–6724, Dec. 2014.
[11] K. K. Gupta and S. Jain, “Comprehensive review of a recently proposedmultilevelinverter,”IET Power Electron., vol. 7, no. 3, pp. 467–479, Mar.2014.
[12] K. M. Tsang and W. L. Chan, "Single DC source three-stage multilevelinverter utilizing diminished number of switches,"IET Power Electron.,vol.7,no. 4, pp. 775– 783, Apr. 2014.
[13] M. FarhadiKangarlu, E. Babaei, and S. Laali, "Symmetric multilevelinverter with diminished parts in view of non-protected dc voltagesources,"IET Power Electron., vol. 5, no. 5, pp. 571– 581, May 2012.
[16] M. Khazraei, H. Sepahvand, K. A. Corzine, and M. Ferdowsi, "Activecapacitor voltage adjusting in
single-stage flying-capacitor
multilevelpowerconverters,"IEEE Trans. Ind. Electron., vol. 59, no. 2, pp. 769– 778, Feb. 2012. [17] K. Sano and H. Fujita, "Voltage-adjusting circuit in view of a resonantswitched-capacitor converter for multilevel inverters,"IEEE Trans. Ind.Appl., vol. 44, no. 6, pp. 1768– 1776, Sep. 2008.
[18] B. P. McGrath and D. G. Holmes, "Explanatory demonstrating of voltage balance dynamics for a flying capacitor multilevel converter,"IEEE Trans. PowerElectron., vol. 23, no. 2, pp. 543– 550, Mar. 2008.
[19] V. Dargahi, A. K. Sadigh, M. Abarzadeh, S. Eskandari, and K. Corzine,"A new group of particular multilevel converter in view of changed flyingcapacitor multicell converters,"IEEE Trans. Power Electron., vol. 30, no.1, pp. 138– 147, Jan. 2015.