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COMMISSION OF THE EUROPEAN COMMUNITIES

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COUPLING CAMAC CRATE CONTROLLERS TYPE »A»

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This document was prepared under the sponsorship of the Commission

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Neither the Commission of the European Communities, its contractors

M j g n o r any person acting on their behalf: p | ^ Í & | ^ | | { ^ | ^

make any warranty or representation, express or implied, with respect to the accuracy, completeness, or usefulness of the information contained in this document, or that the use of any information, apparatus, method or process disclosed in this document may not infringe privately owned

assume any liability with respect to the use of, or for damages resulting from the use of any information, apparatus, method or process disclosed in this document.

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EUR 4895 e

COUPLING CAMAC CRATE CONTROLLERS TYPE "A" TO THE PDP-11 UNIBUS by W. STÜBER

Commission of the European Communities

Joint Nuclear Research Centre - Geel Establishment (Belgium) Central Bureau for Nuclear Measurements - CBNM

Luxembourg, Octobre 1972 - 16 Pages - B.Fr. 40.—

Recently a new method has been proposed for connection of CAMAC to a PDP-11 computer, resulting in a very simple interface and simplified programming. Now such an interface is described in detail here. Some programming examples are also shown.

EUR 4895 e

COUPLING CAMAC CRATE CONTROLLERS TYPE "A" TO THE PDP-11 UNIBUS by W. STÜBER

Commission of the European Communities

Joint Nuclear Research Centre - Gccl Establishment (Belgium) Central Bureau for Nuclear Measurements - CBNM

Luxembourg, Octobre 1972 - 16 Pages - B.Fr. 40.—

Recently a new method has been proposed for connection of CAMAC to a PDP-11 computer, resulting in a very simple interface and simplified programming. Now such an interface is described in detail here. Some programming examples are also shown.

EUR 4895 e

COUPLING CAMAC CRATE CONTROLLERS TYPE "A" TO THE PDP-11 UNIBUS by W. STUBER

Commission of the European Communities

Joint Nuclear Research Centre - Geel Establishment (Belgium) Central Bureau for Nuclear Measurements - CBNM Luxembourg, Octobre 1972 - 16 Pages - B.Fr. 40.—

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EUR 4895 e

COMMISSION OF THE EUROPEAN COMMUNITIES

COUPLING CAMAC CRATE CONTROLLERS TYPE "A'

TO THE PDP-11 UNIBUS

by

W. STUBER

1972

Joint Nuclear Research Centre Geel Establishment - Belgium

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ABSTRACT

Recently a new method has been proposed for connection of CAMAC to a PDP-11 computer, resulting in a very simple interface and simplified programming. Now such an interface is described in detail here. Some programming examples are also shown.

KEYWORDS

SPECIFICATIONS ELECTRONIC EQUIPMENT PDP COMPUTERS GATING CIRCUITS

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3

-CONTENTS

Introduction 5

1. Addressing °

2. Interface implementation Ö

3. The m i n i m u m PDP-11 CAMAC interface 9

4. Interrupt facilities 12

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5

-Coupling CAMAC C r a t e C o n t r o l l e r s Type "A" to the P D P - 1 1 UNIBUS.

Introduction

CAMAC is a standardized modular instrumentation s y s t e m originally intended for interfacing of nuclear physics experiments to c o m p u t e r s . Data a r e sent in digital form

from " m o d u l e s " in a " c r a t e " to a computer or vice v e r s a via " c r a t e dataway" and "branch highway". Up to 7 CAMAC

c r a t e s can be connected in p a r a l l e l to the branch highway, each of them using a standard interface called crate

controller type "A". F o r connection of the CAMAC branch to a specific computer a specific interface, called branch d r i v e r , is needed.

This "double interfacing" (crate controller and

branch d r i v e r ) is n e c e s s a r y to get a highly standardized system, but might be too expensive for small CAMAC s y s t e m s . To

avoid this disadvantage it is possible to use special crate c o n t r o l l e r s ; which interface directly to a specific computer. Fortunately this is not n e c e s s a r y if the computer is a

P D P - 1 1 (Digital Equipment C o r p . ) . The input-output busline of this computer, the UNIBUS, is similar in s t r u c t u r e to the CAMAC branch highway and u s e s s i m i l a r signals. Many of the branch signals a r e compatible with corresponding UNIBUS signals, and the corresponding bus lines can be connected directly. In other w o r d s , crate controllers A can be connected

x)

directly to the UNIBUS '. Only for the incompatible signals

χ To be c o r r e c t , the UNIBUS t r a n s m i t t e r drive capability is lower and the c h a r a c t e r i s t i c impedance of the UNIBUS is somewhat higher than that of the CAMAC branch. N e v e r t h e l e s s , up to 7 c r a t e c o n t r o l l e r s "A" may be

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6

-a b r -a n c h interf-ace is needed. In o r d e r to keep the n u m b e r of incompatible signals low a special a d d r e s s i n g method for the CAMAC modules has been proposed . This method also simplifies p r o g r a m m i n g , so that it might be of

i n t e r e s t for l a r g e CAMAC s y s t e m s , too.

In the following first the description of the

a d d r e s s i n g scheme will be repeated briefly, and then details will be given on implementation and p r o g r a m m i n g of the interface u s e d .

1. Addressing

To a d d r e s s the CAMAC modules the following bit configuration 3 has been proposed for the t r a n s i t i o n from the CAMAC b r a n c h to the UNIBUS 2 .

CR 4, 2, 1

21 5

F 4

21 2

16,

.

N

8, 4, 2, . 2 9 .

1

A 8, 4, 2, 26 . .

1 23

F 2, 1, 8

. . 2°

CAMAC b r a n c h UNIBUS

CR = c r a t e a d d r e s s N = module a d d r e s s A = s u b a d d r e s s F = function code

In addition, the r e a d - w r i t e code line F 16 m u s t 2

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· . . . ■ 7

-out of the UNIBUS a d d r e s s w o r d and to r e p l a c e it by an

additional c r a t e a d d r e s s bit to gain m o r e a d d r e s s i n g space

for c o m p u t e r m e m o r y . The F 4 ­ l i n e m u s t then be driven

by a flipflop, which i s loaded o c c a s i o n a l l y by an e x t r a

i n s t r u c t i o n . ­ The UNIBUS a d d r e s s bit 2 m u s t not be

a " 1 " except for byte i n s t r u c t i o n s manipulating byte o p e r a n d s

at odd a d d r e s s e s . CAMAC u s e s only c o m p l e t e data w o r d s ,

not b y t e s . To c i r c u m v e n t this difficulty we d r i v e the

F 8 ­ l i n e by the UNIBUS 2 ­ a d d r e s s l i n e . F8 = l m e a n s c o m m a n d

functions which do not t r a n s m i t data. So we need not

w o r r y about data b y t e s or w o r d s .

C o n c e r n i n g the 3 or 4 m o s t significant a d d r e s s b i t s ,

t h e r e i s still some f r e e d o m left for the u s e r . They can be

u s e d e . g . to define up to 7 CAMAC c r a t e a d d r e s s e s

(one b r a n c h ) . In t h i s c a s e a o n e ­ o f ­ e i g h t d e c o d e r will s e r v e

to s e l e c t the a d d r e s s e d c r a t e . P e r c r a t e 4K w o r d a d d r e s s e s

a r e needed on the UNIBUS, i f F4 i s d r i v e n d i r e c t l y by the 12

2 bus l i n e . So this o n e ­ s t e p a d d r e s s i n g s c h e m e can only

be u s e d for s m a l l CAMAC s y s t e m s with not too m u c h

c o m p u t e r m e m o r y . It m i g h t be of advantage in s m a l l d e ­

dicated s y s t e m s with fixed configuration, b e c a u s e the i n t e r f a c e

between CAMAC and UNIBUS i s inexpensive and p r o g r a m m i n g

i s as e a s y as with d e v i c e s connected d i r e c t l y to the UNIBUS. ­ It

should be m e n t i o n e d h e r e that a CAMAC c r a t e does not u s e

all of the 4K a d d r e s s e s a l l o c a t e d to it. T h e r e a r e always some

gaps which can be u s e d for o t h e r d e v i c e s . F o r e x a m p l e ,

the c r a t e c o n t r o l l e r type A does not r e c o g n i z e c o m m a n d s

a d d r e s s e d to N ( 3 l ) . Inside such a gap of 64 consecutive

w o r d a d d r e s s e s the a d d r e s s e s of the P D P ­ 1 1 p r o c e s s o r

r e g i s t e r s and of the s t a n d a r d p e r i p h e r a l s will be situated,

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8

-F o r l a r g e s y s t e m s and those, which a r e expected to grow l a r g e or m u s t be software compatible with them , it is r e c o m m e n d e d to use a c r a t e a d d r e s s r e g i s t e r , which will drive the decoded c r a t e a d d r e s s lines BCR, and which has to be loaded at the beginning of every input-output

routine. In this r e g i s t e r also the seldom -used F 4 - b i t can be incorporated as well as s e v e r a l b r a n c h a d d r e s s b i t s . Then the binary configuration 1110 of the 4 m o s t

significant UNIBUS a d d r e s s bits would mean "CAMAC

a d d r e s s e d " . Of c o u r s e , the 2048 word a d d r e s s e s belonging to this configuration m u s t not be used for m e m o r y a d d r e s s e s , If in the beginning only one c r a t e is used, the h a r d w a r e

does not need a detector for 1110. N e v e r t h e l e s s , the software should use already these a d d r e s s e s to be compatible for l a t e r expansion.

Interface implementation

Many of the P D P - 1 1 UNIBUS-signals have equivalent counterparts on the CAMAC branch and need no interface at all. Only those lines which a r e not compatible m u s t be connected via an interface. Of these the m o s t important a r e SSYN and B T B . On the UNIBUS the leading edge of the response signal SSYN (slave synchronisation) signals the end of the t r a n s f e r cycle, w h e r e a s on the CAMAC branch the same is done by the trailing edge of BTB

(branch timing signal B). When SSYN a r r i v e s the p r o c e s s o r strobes the data and then drops the a d d r e s s lines, but CAMAC needs the a d d r e s s till the end of BTB (or at l e a s t of strobe S2).

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9

-timing. The f i r s t solution is somewhat expensive but s t r a i g h t f o r w a r d and, therefore, will not be discussed h e r e . It might be of advantage if digital r e p e a t e r s a r e n e c e s s a r y to drive a long CAMAC b r a n c h . But for the n o r m a l case we prefer the m o r e economical second

solution, which has the sole disadvantage that a small change in the p r o c e s s o r is n e c e s s a r y .

This solution is p r e s e n t e d now in the description of the m i n i m u m P D P - 1 1 to CAMAC interface. This interface is only for one CAMAC c r a t e and a computer with not m o r e than 16K of m e m o r y . More c r a t e s or m o r e computer m e m o r y can be used when a c r a t e a d d r e s s decoder and extra BTB inputs will be added. F o r a l a r g e CAMAC system the c r a t e a d d r e s s decoder m u s t be replaced by a c r a t e a d d r e s s r e g i s t e r , which

can be preloaded with the decoded c r a t e a d d r e s s e s . - In addition it is a s s u m e d that our CAMAC system contains only modules with 16 or l e s s data b i t s . Then no i n t e r -facing is r e q u i r e d for the unused upper 8 bits of the 24-bit CAMAC data word. The lower 16 bits can be

connected directly to the corresponding UNIBUS data l i n e s .

The minimum P D P - 1 1 CAMAC interface

The main t a s k of this interface i s to accommodate the UNIBUS timing to the CAMAC branch timing. This is done by flipflops 1 and 2 (fig.). When MSYN is a s s e r t e d BTA is a s s e r t e d , too, via gates 13, 19, and 23. When the crate controller responds with BTB, BTA is extinguished by

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1ο

-This m e a n s that the a d d r e s s e d CAMAC unit has taken the data. The p r o c e s s o r r e m o v e s MSYN, which brings both flipflops to their r e s t state (= p r e s e t ) . If a DATI cycle is executed, flipflop 2 is loaded to z e r o at the beginning of BTB, a s s e r t i n g again SSYN. This o c c u r s approximately at the time of CAMAC strobe SI and stimulates the p r o c e s s o r to strobe in the data. At the s a m e time an internal p r o c e s s o r pulse Ρ DATA START Η i s generated, which will clear MSYN and somewhat l a t e r also the a d d r e s s and control l i n e s .

A s the l a t t e r cannot be t o l e r a t e d by CAMAC before strobe S2, it is n e c e s s a r y to delay thie p r o c e s s o r pulse a p p r o p r i a t e l y . F o r this purpose the wire connection for this pulse has to be cut and the combination of gates 14, 15, and 20 m u s t be i n s e r t e d . Gates 14 and 15 form a flipflop, which will s t o r e the pulse till gate 20 is opened at the end of B T B . (This o c c u r s only for CAMAC -DATI s. In all other c a s e s gates 15 and 20 will work as simple i n v e r t e r s , giving only a

negligible delay).

The interface has also some other f e a t u r e s . In CAMAC s y s t e m s where the r e s p o n s e line BX is a l r e a d y implemented, the corresponding signal can be used to gate BTB in such a way, that SSYN is s u p p r e s s e d if the a d d r e s s e d module fails to respond ( t i m e - o u t ) . When A00 is a s s e r t e d (CAMAC control function), BQ is gated via gates 17 and 3 onto the data line D15. So it is possible to t e s t LAM (Look at Me) in the n o r m a l way the P D P - 1 1 p e r f o r m s a test. Unfortunately this is not possible for " T e s t Status", as this CAMAC

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-Some extra gating is required, using gates 1 , 5 , 7 , 8 , 2 3 , and 24, because the P D P - l l / 2 0 behaves also not completely logical. When a DATO bus cycle is needed, the machine will p e r f o r m first a DATIP bus cycle, which is u n n e c e s s a r y and in our case can cause e r r o r s . So we m u s t s u p p r e s s this DATIP bus cycle on the CAMAC branch and g e n e r a t e an extra SSYN on the UNIBUS, if the

condition (CAMAC a d d r e s s e d ) . (DATIP). (CAMAC control function) = " 1 " is fulfilled. In the s i m p l e s t c a s e : CAMAC addressed" = "A 15 a s s e r t e d " . A s the DATIP bus cycle m u s t not be s u p p r e s s e d for n o r m a l CAMAC r e a d operations, there a r e still some difficulties left. A w r i t e - o n l y r e g i s t e r -will not respond to the unwanted DATIP r e a d operation, which p r e c e d e s the w r i t e . To avoid a t i m e - o u t e r r o r the r e s p o n s e signal BX m u s t be generated artificially for each DATIP (gates 24, 22). In those CAMAC modules, which a r e able to execute both F(2) and F(18) at the same s u b a d d r e s s , the r e g i s t e r will be c l e a r e d unintentionally if F ( l 8 ) is

executed. Avoiding this by m e a n s of special c i r c u i t r y in the interface -will cause other difficulties. So it is advisable to avoid such CAMAC modules in connection with the P D P - l l / 2 0 .

4. Interrupt facilities

The CAMAC interface would be of a l m o s t no value without the possibility of p r o g r a m i n t e r r u p t s by L - r e q u e s t s (Look at Me). The L signals a r e available at the r e a r connector of c r a t e

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13

-c o n t r o l l e r A a n d -c a n b e b r o u g h t f r o m t h e r e to a c o r r e s p o n d i n g n u m b e r of P D P 1 1 i n t e r r u p t m o d u l e s type M 7 8 2 . (As the L s i g n a l s w i l l be g a t e d off by t h e b u s y s i g n a l of e a c h data-way c y c l e , t h e y m u s t be s t a t i c i s e d by flipflops to a v o i d m u l t i p l e i n t e r r u p t s \

T h i s m e t h o d w i l l l e a d to a v e r y f a s t i n t e r r u p t h a n d l i n g but i s q u i t e e x p e n s i v e . F o r " s l o w " i n t e r r u p t s i t i s p o s s i b l e to m a k e a g r a d e d - L s e a r c h b y p r o g r a m . Up to 16 m o d u l e L s i g n a l s c a n b e " o r e d " t o g e t h e r to c a u s e a c o m m o n B D ( B r a n c h D e m a n d ) s i g n a l . BD will t r i g g e r the L - s e a r c h r o u t i n e via a n M782 i n t e r r u p t m o d u l e . T o a v o i d m u l t i p l e i n t e r r u p t i n g b y b u s y gating

of the L - s i g n a l the b r a n c h d e m a n d s i g n a l B D m u s t be

x)

d i s a b l e d t i l l the L h a s b e e n found a n d c l e a r e d F o l l o w s a n e x a m p l e of s u c h a s e a r c h r o u t i n e .

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-

14

-; GRADED-L SEARCH 22.3.72

. = 0

GL = 167400 LOCAL = .+0 LOCAH = LOCAL+1

PIR16 = .+32. ; PIR15=.+30. INX = PIR16-0UTA-4

DISABD = 167521

,PIR14=.+28. *...,PIRl=.+2. .+42 GLS: SHIFT: OUTA: OUTB: CLRB @#DISABD MOV @#GL,LOCAL BMI OUTB MOV %0,-(%6) MOV %l*-<%6)

CLR il

MOVB LOCAH>%0 BNE SHIFT MOV #-8.»%l MOVB LOCAL>%0 BMI OUTA

DEC %l

ASLB %0 BPL SHIFT

ASL %l

ADD %7>%1

MOV INX(21>*%7 MOV PIR16*%7

DISABLE BRANCH DEMAND

READ GRADEB-L PATTERN INTO BRANCH IF HIGHEST PRIORITY SAVE REGISTERS ON STACK

MEMORY IS SET

PREPARE SHIFT COUNTER

LOAD R0 WITH HIGH BYTE OF L-PATTERN BRANCH IF AT LEAST ONE BIT IS SET BUT LOAD -8 INTO Rl IF NONE SET LOAD R0 WITH LOW BYTE OF L-PATTERN BRANCH IF HIGHEST PRIORITY

OF LOW BYTE IS SET

Rl COUNTS NUMBER OF SHIFTS (REVERSE) SHIFT LOOP SEARCHES FOR L-BIT

BRANCH BACK IF NOT FOUND

MULTIPLY COUNT BY 2 FOR WORD ADDRESS MAKE ROUTINE POSITION INDEPENDENT LOAD PC WITH ROUTINE ADDRESS

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15

-When the interrupting CAMAC module has been identified it i s eventually n e c e s s a r y to s e a r c h further for the

interrupting s u b a d d r e s s . To have an example for such a routine we a s s u m e that the CAMAC module has s e v e r a l • independent r e g i s t e r s , which can be loaded from external

data s o u r c e s . The contents of these r e g i s t e r s shall be totalized in s e p a r a t e but adjacent m e m o r y locations. - At the end of the routine the p r o c e s s o r r e g i s t e r s 0 and 1 have to be r e s t o r e d from the stack.

; INTERRUPT ROUTINE IR15 15.3.72

CAF02 = 000004 ; CAMAC F-CODE 2 (READ AND CLEAR) CATLAM = 163001 ; CAMAC REGISTER N=12 TEST LAM ENABD = 167525 ; ENABLE BRANCH DEMAND

INX1 = LOC-M-2

IR15: MOV # C A T L A M J % 1 ; LOAD Rl WITH CAMAC ADDRESS + F-CODE JSR %7*SSR ; GO TO SUBADDRESS-SEARCHROUTINE

BIS #CAF02,%1 ; INSERT NEW F-CODE IN ADDRESS FOUND M: ADD %7*%0 ; MAKE ROUTINE POSITION INDEPENDENT

ADD (%1)>INX1(%0); TRANSFER & ADD CONTENTS i OF INTERRUPTING ADDRESS CLRB @#ENABD ; ENABLE BRANCH DEMAND

; FOR FURTHER INTERRUPTS MOV (%6)+*Xl ; RESTORE REGISTERS

MOV (%6)+*%0 ; FROM STACK

RTI ; RETURN TO MAIN PROGRAM LOC:

; SUBADDRESS-SEARCHROUTINE 22.3.72

SSR: LOOP: TEST: DISABD= 167521 .= 0 MOV #8.,%0 BR TEST ADD %0,%1 TSTB @%1 BPL LOOP MOV %1,%0 BIC #177607*%0 ASR %0 ASR %0 BIC #10007*%1 RTS %7

LOAD R0 WITH SUBADDRESS-INCREMENT INCREMENT SUBADDRESS

TEST LOOK-AT-ME

BRANCH BACK IF NOT FOUND

LOAD R0 WITH INTERRUPTING ADDRESS ISOLATE SUBADDRESS FOUND

AND ADJUST IT AS A NORMAL WORD ADDRESS

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16

-These examples show c l e a r l y the ease of p r o g r a m m i n g with the proposed a d d r e s s i n g s c h e m e . On the other hand it is evident that a h a r d w a r e Graded -L s e a r c h unit (LAM-grader) would be 20 to 50 t i m e s faster than the p r o g r a m m e d G r a d e d - L s e a r c h . Thus a L A M - g r a d e r (for 24 bits) would be a considerable i m p r o v e m e n t .

R e f e r e n c e s

1. Direct Connection of CAMAC Crate Controllers Type "A" to the P D P - 1 1 UNIBUS.

by W. Stüber, CAMAC bulletin 4, 1972.

2. P D P - 1 1 handbook, Digital Equipment Corp.

3. CAMAC: Organisation of M u l t i - C r a t e Systems, EUR 4600e.

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All scientific and technical reports published by the Commission of the European Communities are announced in the monthly periodical " e u r o ­ a b s t r a c t s " . For subscription (1 year : B.Fr. 1 025,—) or free specimen copies please write to :

of the E u r o p e a n C o m m u n i t i e s Case postale 1003

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disappears the greater part of the evil which is our heritage from

darker times.

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