CAO CH-3.pptx

UNIT-3

BOOK- M.MANO

The primary goal of CISC architecture is to complete a task in as few lines of assembly as possible.

This is achieved by building processor hardware that is capable of understanding and executing a series of operations.

For this particular task, a CISC processor would come prepared with a specific instruction (we'll call it "MULT").

When executed, this instruction loads the two values into separate registers, multiplies the operands in the execution unit,

and then stores the product in the appropriate register. Thus, the entire task of multiplying two numbers can be completed with

one instruction:

MULT op1, op2

MULT is what is known as a "complex instruction." It operates directly on the computer's memory banks and does not

require the programmer to explicitly call any loading or storing functions. 

 The major characteristics of CISC architecture are:

1.     A large number of instructions—typically from 100 to 250 instructions

2.     A large variety of addressing modes—typically from 5 to 20 different modes

3.     Variable-length instruction formats

4.     Instructions that manipulate operands in memory

CISC PROCESSORS –EXAMPLES

1.      IBM 370/168

 Introduced in 1970, this CISC design is a 32 bit processor with 4 general purpose and 4 64-bit floating point registers.

2.      VAX 11/780

This CISC design is again a 32-bit processor from DEC(Digital Equipment Corporation). It supports large number of addressing

modes and machine instructions 

3.      Intel 80486

Launched in 1989, this CISC processor has instructions with their lengths varying from 1 to 11 and had 235 instructions

RISC processors only use simple instructions that can be executed within one clock cycle. Thus, the "MULT" command described

above could be divided into three separate commands: "LOAD," which moves data from the memory bank to a register, "PROD,"

which finds the product of two operands located within the registers, and "STORE," which moves data from a register to the memory banks.

In order to perform the exact series of steps described in the CISC approach, a programmer would need to code four lines of assembly:

LOAD A, reg1 LOAD B, reg2 PROD A, B

STORE reg3, A

At first, this may seem like a much less efficient way of completing the operation. Because there are more lines of code,

more RAM is needed to store the assembly level instructions.

The compiler must also perform more work to convert a high-level language statement into code of this form.

The major characteristics of a RISC processor are:

1.     Relatively few instructions

2.     Relatively few addressing modes

3.     Memory access limited to load and store instructions

4.     All operations done within the registers of the CPU

5.     Fixed-length, easily decoded instruction format

6.     Single-cycle instruction execution

Reduced Instruction Set Architectures:

1. IBM 801

2. Stanford MIPS

3. Berkeley RISC 1 and 2

DRAW THE ARCHITECTURE OF ANY RISC AND CISC PROCESSOR.

CISC

RISC

Emphasis on hardware

Emphasis on software

complex instructions

reduced instruction only

Memory-to-memory:

"LOAD" and "STORE"

incorporated in instructions

Register to register:

"LOAD" and "STORE"

are independent instructions

Small code sizes

large code sizes

Transistors used for storing

complex instructions

Memory registers

•

Addressing Modes

* Specifies a rule for interpreting or modifying the

address field of the instruction (before the operand

is actually referenced)

* Variety of addressing modes

- to give programming flexibility to the user

- to use the bits in the address field of the

instruction efficiently

•

Direct Address Mode

Instruction specifies the memory address which

can be used directly to access the memory

•

Indirect Addressing Mode

The address field of an instruction specifies the address of

a memory location that contains the address of the operand

•

Immediate Mode

e.g. ADD A,23 Adds 23 on to the value in A register.

The value 23 is part of the instruction and is called an immediate.

This addressing mode is used for constants.

•

Register Mode

Address specified in the instruction is the register address

•

Register Indirect Mode

Instruction specifies a register which contains the

memory address of the operand

•

Indexed Addressing

This mode is often used to access the elements of a table or

array where B is the address of the start of the table and C is

an index into the table.

e.g. ADD A,[B+C] Use B+C as the address of a value to add to the A

register

All machines generally provide a full set of operations for the first three

categories that are mentioned in the next slide.

All machines MUST provide instruction support for basic system functions.

Arithmetic/Logical

: Integer ALU ops.

Load/Stores

: Data transfer between memory and registers.

Control

: Instructions to change the program execution sequence.

Floating Point

:

String

: Special instruction optimized for handling ASCII character strings.

Graphics

: Pixel operations, compression and decompression.

INSTRUCTIONS-ALU(DATA MANIPULATION)

•

Three Basic Types:

Arithmetic instructions

Logical and bit manipulation instructions

Shift instructions

•

Arithmetic Instructions

Name Mnemonic

Clear CLR

Complement COM

AND AND

OR OR

Exclusive-OR XOR Clear carry CLRC Set carry SETC Complement carry COMC Enable interrupt EI Disable interrupt DI

Name Mnemonic

Logical shift right SHR Logical shift left SHL Arithmetic shift right SHRA Arithmetic shift left SHLA Rotate right ROR Rotate left ROL Rotate right thru carry RORC Rotate left thru carry ROLC

Name Mnemonic

•

Logical and Bit Manipulation Instructions

•

Shift Instructions

•

Typical Data Transfer Instructions

INSTRUCTIONS-DATA TRANSFER

Load

LD

Store

ST

Move

MOV

Exchange XCH

Input

IN

Output

OUT

Push

PUSH

Pop

POP

INSTRUCTIONS-CONTROL

INSTRUCTIONS

•

Program Control Instructions

Name Mnemonic

Branch BR

INSTRUCTION SET FORMATS

Instructions may be encoded so that they are variable in size (e.g. pentium) or fixed (PowerPC).

Variable sized instructions allow a program to take up less memory but the CPU must be more complex to deal

with the variable length. Hybrid coding forces an instruction to be one of a few fixed lengths.

Variable-length instructions (Intel 80x86) require multi-step fetch and decode, but allow for a much more

flexible and compact instruction set.

Fixed-length instructions allow easy fetch and decode, and

simplify pipelining and parallelism

LANGUAGE OF MACHINE-8086

8086 is a 16 bit microprocessor chip designed by Intel between early 1976 and mid-1978,

when it was released.”

A

computer architecture simulator

, or an architectural simulator,

is a piece of software to model computer devices (or components) to predict outputs and

performance metrics on a given input. An architectural simulator can model a target

microprocessor only ,or an entire computer system

including a processor, a memory system, and I/O devices