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Reliability

Monitor

Report

High Temperature Operating Life

Data Retention Bake

Temperature Cycle

Temperature & Humidity Bias/ HAST

Steam Pressure Pot

Second QUARTER 2011

ATMEL PROPRIETARY

(2)

RELIABILITY MONITOR -- ATMEL PROPRIETARY

Table of Contents

1. Executive Summary

1

2. HTOL (sorted by product BU)

2

3. HTOL (sorted by technology)

3 - 4

4. Data Retention Bake (sorted by product BU)

5

5. Data Retention Bake (sorted by technology)

6

6. Temperature Cycle

7

7. Temperature Humidity Bias & HAST

8

8. Steam Pressure Pot

9

9. Technology List

10

10. Failure Rate Calculations

11

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RELIABILITY MONITOR -- ATMEL PROPRIETARY 1

* indicates that preconditioning is performed prior to the stress test.

Reliability Monitor Report

Date: Apr 13, 2011

Executive Summary

The intent of the Reliability Monitor Program is to measure the reliability of previously qualified devices on a quarterly basis. This is achieved by selecting representative devices within a process, package or business unit and performing a series of reliability tests to ensure that the reliability has maintained over time. Listed below are the overall results for the last quarter.

1. High Temperature Operating Life (125° - 150°C; 0 failures)  Failure Rate: 12 FITS (4,108K device-hours)

 Note: The Exponential Model is used to derive FIT rates (60% Confidence; EA= 0.6

eV). Also, Thermal and Voltage Acceleration are used to compute the overall acceleration factor. Weighted acceleration factors (WAF) for a group of products are calculated by taking the weighted average of each device’s acceleration factor multiplied by its corresponding device hours. All failures were inconclusive.

2. Data Retention Bake (150°C; 0 failures)

 Failure Rate: 23 FITS (347K device-hours)

 Note: The Exponential Model is used to derive FIT rates (60% Confidence; EA = 0.6

eV). Since there is no bias applied during testing and the stress temperature is fixed for all devices at 150°C, the acceleration factor is 117 for all groupings.

3. Temperature Cycle (-65°C to 150°C, 500 cycles) *  Failure Rate: 0.00% (0 failures out of 231 units)

4. Temperature Humidity Bias (85°C/85%RH) and HAST (130°C/85%RH) *  Failure Rate: 0.00% (0 failures out of 308K device-hours)

 Note: A 20:1 Acceleration Factor is used to combine HAST results with THB). 5. Steam Pressure Pot (121°C/100%RH) *

(4)

High Temperature Operating Life

(sorted by FAMILY)

BU QTR Device-Hours* WAF EFR PPM FITS

REJ SS REJ SS REJ SS REJ SS

APG 1 0 82 0 82 0 82 0 82 82,000 23 0 492 LAST 4Q 0 488 0 488 0 488 0 488 488,000 31 0 60 ASIC 1 0 200 0 200 0 200 0 200 200,000 23 0 202 LAST 4Q 0 760 0 760 0 760 0 715 737,500 22 0 57 MEMORY 1 0 300 0 300 0 300 0 300 300,000 48 0 63 LAST 4Q 0 1,200 0 1,000 0 1,000 0 1,000 1,009,600 51 0 18 MCU 1 0 63,282 0 231 0 231 0 154 3,218,948 3 0 95 LAST 4Q 0 71,093 0 2,117 0 1,886 0 1,039 4,812,156 6 0 33 RFA 1 0 539 0 539 0 539 0 77 308,000 143 0 21 LAST 4Q 0 2,999 0 2,999 0 2,999 0 2,077 2,691,000 135 0 3 ATMEL 1 0 64,403 0 1,352 0 1,352 0 813 4,108,948 18 0 12 LAST 4Q 0 76,540 0 7,364 0 7,133 0 5,319 9,738,256 49 0 2 48 Hours 168 Hours 500 Hours 1K Hours

(5)

High Temperature Operating Life

(sorted by TECHNOLOGY)

TECH QTR Device-Hours* WAF EFR PPM FITS REJ SS REJ SS REJ SS REJ SS

UNI3 1 LAST 4Q 0 77 0 77 0 77 0 77 77,000 117 0 102 UHF 1 LAST 4Q 0 230 0 230 0 230 0 230 230,000 117 0 34 SCMOS2 1 LAST 4Q 0 45 0 45 0 45 0 0 22,500 3 0 14,017 SCMOS3 1 0 77 0 77 0 77 0 0 38,500 117 0 203 LAST 4Q 0 307 0 307 0 307 0 77 192,000 127 0 38 SAC2NV 1 0 231 0 231 0 231 0 0 115,500 67 0 119 LAST 4Q 0 461 0 461 0 461 0 77 269,000 81 0 42 I2L 1 LAST 4Q 0 77 0 77 0 77 0 0 38,500 117 0 203 BCDMOS 1 0 77 0 77 0 77 0 77 77,000 206 0 58 LAST 4Q 0 77 0 77 0 77 0 77 77,000 206 0 58 BICMOS2 1 LAST 4Q 0 154 0 154 0 154 0 154 154,000 117 0 51 0.5UMSPDMEE 1 LAST 4Q 0 154 0 154 0 154 0 154 154,000 117 0 51 75K 1 0 154 0 154 0 154 0 0 77,000 206 0 58 LAST 4Q 0 1,385 0 1,385 0 1,385 0 1,154 1,422,500 151 0 4 63K 1 LAST 4Q 0 300 0 100 0 100 0 100 109,600 76 0 110 58K 1 LAST 4Q 0 2,201 0 574 0 497 0 497 588,032 3 0 583 57K 1 0 100 0 100 0 100 0 100 100,000 23 0 403 LAST 4Q 0 300 0 300 0 300 0 300 300,000 23 0 134 56.9K 1 LAST 4Q 0 160 0 160 0 160 0 160 160,000 48 0 118 56K 1 0 100 0 100 0 100 0 100 100,000 23 0 403 LAST 4Q 0 400 0 400 0 400 0 400 400,000 23 0 101 46K 1 0 82 0 82 0 82 0 82 82,000 23 0 492 LAST 4Q 0 328 0 328 0 328 0 328 328,000 23 0 123 45.6K 1 LAST 4Q 0 77 0 77 0 77 0 77 77,000 142 0 84 48 Hours 168 Hours 500 Hours 1K Hours

(6)

High Temperature Operating Life

(sorted by TECHNOLOGY)

TECH QTR Device-Hours* WAF EFR PPM FITS REJ SS REJ SS REJ SS REJ SS

48 Hours 168 Hours 500 Hours 1K Hours

35K 1 0 63,582 0 531 0 531 0 454 3,518,948 7 0 38

LAST 4Q 0 69,807 0 2,458 0 2,304 0 1,457 5,139,124 14 0 13 ATMEL 1 0 64,403 0 1,352 0 1,352 0 813 4,108,948 18 0 12

LAST 4Q 0 76,540 0 7,364 0 7,133 0 5,319 9,738,256 49 0 2

* The Device-Hours computation includes additional read-outs not detailed in the report.

(7)

Data Retention Bake

(sorted by FAMILY)

BU QTR Device-Hours AF FITS

REJ SS REJ SS REJ SS

APG 1 0 0 0 0 0 0 0 117 LAST 4Q 0 0 0 0 0 0 0 117 ASIC 1 0 0 0 0 0 0 0 117 LAST 4Q 1 0 0 0 0 0 0 117 MEMORY 1 0 80 0 80 0 80 80,000 117 98 LAST 4Q 0 391 0 391 0 391 391,000 117 20 MCU 1 0 306 0 306 0 229 267,500 117 29 LAST 4Q 0 3,186 0 2,878 0 2,570 2,775,744 117 3 RFA 1 0 0 0 0 0 0 0 117 LAST 4Q 0 0 0 0 0 0 0 117 ATMEL 1 0 386 0 386 0 309 347,500 117 23 LAST 4Q 1 3,577 0 3,269 0 2,961 3,166,744 117 5 168 Hours 500 Hours 1K Hours

(8)

Data Retention Bake

(sorted by TECHNOLOGY)

TECH QTR Device-Hours AF FITS

REJ SS REJ SS REJ SS

63 K 1 0 80 0 80 0 80 80,000 117 98 LAST 4Q 0 391 0 391 0 391 391,000 117 20 58K 1 0 77 0 77 0 77 77,000 117 102 LAST 4Q 0 1,001 0 1,001 0 847 924,000 117 8 35K 1 0 229 0 229 0 152 190,500 117 41 LAST 4Q 0 2,185 0 1,877 0 1,723 1,851,744 117 4 ATMEL 1 0 386 0 386 0 309 347,500 117 23 LAST 4Q 0 3,577 0 3,269 0 2,961 3,166,744 117 2 168 Hours 500 Hours 1K Hours

(9)

Temperature Cycle

PACKAGE QTR % Defective REJ SS REJ SS REJ SS REJ SS

CASON 1 0 77 0 77 0 77 0 77 0.00% LAST 4Q 0 154 0 154 0 154 0 154 0.00% BGA 1 0 77 0 77 0 77 0 72 0.00% LAST 4Q 0 231 0 231 0 231 0 226 0.00% LGA 1 LAST 4Q 0 77 0 77 0 77 0 77 0.00% MLF / QFN 1 0 77 0 77 0 77 0 72 0.00% LAST 4Q 0 465 0 465 0 465 0 459 0.00% SOIC 1 LAST 4Q 0 462 0 462 0 462 0 457 0.00% TQFP 1 LAST 4Q 0 1,232 0 1,232 0 1,232 0 827 0.00% TSSOP 1 LAST 4Q 0 358 0 358 0 358 0 281 0.00% ATMEL 1 0 231 0 231 0 231 0 221 0.00% LAST 4Q 0 2,979 0 2,979 0 2,979 0 2,481 0.00% 100 Cycles 200 Cycles 500 Cycles 1K Cycles

(10)

Temperature Humidity Bias / HAST

PACKAGE QTR Device-Hours* % Defective

REJ SS REJ SS REJ SS REJ SS

BGA 1 0 77 0 77 0 77 0 0 77,000 0.00% LAST 4Q 0 231 0 231 0 231 0 0 231,000 0.00% MLF / QFN 1 0 77 0 77 0 77 0 0 77,000 0.00% LAST 4Q 0 308 0 308 0 308 0 157 622,000 0.00% SOIC 1 LAST 4Q 0 385 0 385 0 385 0 77 539,000 0.00% TQFP 1 LAST 4Q 0 895 0 818 0 587 0 0 715,436 0.00% TSSOP 1 LAST 4Q 0 231 0 231 0 231 0 0 231,000 0.00% ATMEL 1 0 154 0 154 0 154 0 77 308,000 0.00% LAST 4Q 0 2,050 0 1,973 0 1,742 0 465 2,800,436 0.00% HAST

168 Hours 500 Hours 1K Hours 100 Hours

Temperature Humidity Bias

(11)

Steam Pressure Pot

PACKAGE QTR % Defective

REJ SS REJ SS REJ SS

CASON 1 0 77 0 77 0 77 0.0% LAST 4Q 0 154 0 154 0 154 0.0% BGA 1 0 77 0 0 0 0 0.0% LAST 4Q 0 231 0 0 0 0 0.0% LGA 1 LAST 4Q 0 77 0 77 0 77 0.0% MLF / QFN 1 0 77 0 0 0 0 0.0% LAST 4Q 0 465 0 157 0 157 0.0% SOIC 1 LAST 4Q 0 462 0 77 0 77 0.0% TQFP 1 LAST 4Q 0 1,308 0 0 0 0 0.0% TSSOP 1 LAST 4Q 0 231 0 0 0 0 0.0% ATMEL 1 0 231 0 77 0 77 0.00% LAST 4Q 0 2,928 0 465 0 465 0.00%

96 Hours 168 Hours 240 Hours

(12)

Technology List

FAB TECH TYPE CMOS / BIP LITHOGRAPHY [µm] TYPICAL PRODUCTS / APPLICATIONS

5 15.3 EEPROM 1.8 - 2.3 sEEPROM

5 19.3 EEPROM 1.1 sEEPROM

5 19.5 Embedded Memory Configurator 1.0 Configurator

5 19.6 Embedded Memory 0.7 EEPROM, MC (Intel core), MC (AVR core)

5 19.7 EPLD 0.5 PLD

5 19.76 EPLD 0.5 PLD

5 19.8 CMOS 0.7 ASIC

5 19.8 Embedded Memory Configurator 0.7 sEEPROM, PEROM, EEPROM, Configurator

5 19.9 Embedded Memory 0.7 Smartcard, AVR, µC

5 25 BiCMOS 1.0 ASIC

5 26 Logic 0.7 ASIC

5 33.5 FLASH 0.5

5 34 EPROM 0.5 EPROM

NTO 35

5 35.5 Embedded Memory Configurator 0.35 EEPROM, FLASH, MICRO, EPLD

5 37 EEPROM 0.35 FLASH, PEROM, DATA FLASH, sEEPROM

5 39 EEPROM 0.25 DATA FLASH

5 39.1 EEPROM 0.25 FLASH, DATA FLASH

5 42 BiCMOS 0.6 ASIC CSO 43 ASIC, TX RF HNO 46 RFA 5 55 Logic 0.5 ASIC 5 55.8 CMOS 0.5 ASIC 5 56 Logic 0.35 ASIC

5 56.8 Embedded Memory 0.35 ASIC

7 57.0 CMOS 0.25 ASIC

7 57.5 CMOS 0.21 ASIC / RFA

7 58.0 CMOS 0.18 ASIC / RFA

SJO 61 CMOS 0.18 FLASH

SJO 63

HNO 75 RFA

HNO 6UH6+BICMOS RFA

HNO BCDMOS 6BD1 0.8 ASIC / RFA

HNO BICMOS ASIC / RFA

HNO BICMOS2 RFA

HNO I²L 6IL4 2 ASIC

HNO SCMOS3 RFA

HNO SIGE2 6SG1 0.8 RFA

HNO UHF 6UH6 0.5 ASIC / RFA

HNO UNI3 RFA

NTO Z86 CMOS Digital 0.8 SRAM,MICRO, VAN DLC

NTO Z91 CMOS Digital 0.6 SRAM, ASIC, MICRO

NTO Z92 CMOS Digital 0.5 ASIC, MICRO,VAN DLC

NTO Z94 CMOS + EPROM 0.5 OTP MICRO

HNO Z95 RFA

HNO Z96 RFA

(13)

RELIABILITY MONITOR -- ATMEL PROPRIETARY 11

Failure Rate Calculations

Failure Rate:

λ

χ

α

=

− ⋅ + (1 , ) 100 2 2 2

10

9

2

n

AF DH

where,

λ = Failure Rate (FITS) χ2 = Failure Estimate

α = Confidence Level (60% or 90%) n = Number of Failures

AF = Overall Acceleration Factor (TAF x VAF) DH = Device Hours Thermal Acceleration:

TAF

e

e k T P T P a f f JAf s s JAs

=

⋅ + ⋅ − + ⋅         1 1 ( θ ) ( θ ) where,

TAF = Thermal Acceleration Factor EA = Activation Energy (eV)

k = Boltzman’s Constant (8.617 x 10-5 eV/°K)

T = Temperature (°K) f = Field Conditions s = Stress Conditions

P = Power Dissipation (W)

θJA = Thermal Resistance Coefficient - Junction to Ambient (°C/W)

Voltage Acceleration:

[

]

VAF

e

Z VS Vn

=

⋅ −

where,

VAF = Voltage Acceleration Factor Vs = Stress Voltage (V)

Vn = Nominal Voltage (V)

(14)

RELIABILITY MONITOR -- ATMEL PROPRIETARY 12

Definitions

Data Retention Bake (DRB): This test is used to measure a device’s ability to retain a charge for extended periods of time without applying voltage bias. Stressing at high temperatures (150°C for plastic packages) accelerates any discharge causing the memory state to change.

Failures In Time (FITS): This is the unit measure for expressing failure rates and is identical to the expression PPM/K hours. For example, three failures out of a million components tested for one thousand hours equates to 3 FITS. High Temperature Operating Life (HTOL): The purpose of this test is to

accelerate thermally activated failure mechanisms through the use of high temperatures (typically between 125°C and 150°C), increased voltage, and dynamic bias conditions. Readouts at various time points are taken to determine the Early Failure Rate (EFR) and Intrinsic Failure Rate (IFR). EFR is expressed in defective parts per million (DPPM) and IFR is expressed in Failures in Time (FITS at 55°C).

Highly Accelerated Stress Test (HAST): The purpose of this test is to evaluate a plastic packaged component’s ability to withstand harsh environmental conditions with extreme temperature and humidity levels. The parts are stressed to high temperature (130°C) and relative humidity (85%RH) conditions in a biased state to achieve maximum acceleration.

Steam Pressure Pot (SPP): The test is used to evaluate a plastic packaged component’s ability to withstand severe conditions of pressure (15 psig), temperature (121°C), and humidity (100%RH).

Temperature Cycle (TC): This test is used to measure a product’s sensitivity to thermal stresses due to differences in expansion and contraction characteristics of the die and mold compound by repeated alternating temperature dwells between high and low temperature extremes.

Temperature Humidity Bias (THB): The purpose of this test (85°C/85%RH) is identical to HAST. The only difference is that HAST accelerates THB by a factor of 20:1 due to the increase in temperature during test.

References

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