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CMOS Low Power, High Speed Dual-Modulus 32/33 Prescaler in sub-nanometer Technology

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Figure

Fig. 1: TSPC DFF
Figure 3. Divided By 2 output of Prescaler When MC=0 its output is divided by 3, which is 801.28MHz and power dissipation is 61.47µW during divide by 2 operation
Fig. 6: Divided By 32 output of Prescaler The figure 7 and 8shows the transient analysis of the 32/33 prescaler respectively
Table. 1: Divide by 32/33 Performance Summary

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